1 /*arch/powerpc/platforms/8xx/mpc86xads_setup.c
3 * Platform setup for the Freescale mpc86xads board
5 * Vitaly Bordug <vbordug@ru.mvista.com>
7 * Copyright 2005 MontaVista Software Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/ioport.h>
19 #include <linux/device.h>
20 #include <linux/delay.h>
21 #include <linux/root_dev.h>
23 #include <linux/fs_enet_pd.h>
24 #include <linux/fs_uart_pd.h>
25 #include <linux/mii.h>
27 #include <asm/delay.h>
29 #include <asm/machdep.h>
31 #include <asm/processor.h>
32 #include <asm/system.h>
34 #include <asm/mpc8xx.h>
35 #include <asm/8xx_immap.h>
36 #include <asm/commproc.h>
37 #include <asm/fs_pd.h>
40 #include <sysdev/commproc.h>
42 static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
43 static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
44 static void init_scc1_ioports(struct fs_platform_info* ptr);
46 void __init mpc86xads_board_setup(void)
49 unsigned int *bcsr_io;
52 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
53 cp = (cpm8xx_t *)immr_map(im_cpm);
55 if (bcsr_io == NULL) {
56 printk(KERN_CRIT "Could not remap BCSR\n");
59 #ifdef CONFIG_SERIAL_CPM_SMC1
60 clrbits32(bcsr_io, BCSR1_RS232EN_1);
61 clrbits32(&cp->cp_simode, 0xe0000000 >> 17); /* brg1 */
62 tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
63 out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
64 clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
66 setbits32(bcsr_io,BCSR1_RS232EN_1);
67 out_be16(&cp->cp_smc[0].smc_smcmr, 0);
68 out_8(&cp->cp_smc[0].smc_smce, 0);
71 #ifdef CONFIG_SERIAL_CPM_SMC2
72 clrbits32(bcsr_io,BCSR1_RS232EN_2);
73 clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
74 setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
75 tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
76 out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
77 clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
79 init_smc2_uart_ioports(0);
81 setbits32(bcsr_io,BCSR1_RS232EN_2);
82 out_be16(&cp->cp_smc[1].smc_smcmr, 0);
83 out_8(&cp->cp_smc[1].smc_smce, 0);
90 static void init_fec1_ioports(struct fs_platform_info* ptr)
92 iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
94 /* configure FEC1 pins */
96 setbits16(&io_port->iop_pdpar, 0x1fff);
97 setbits16(&io_port->iop_pddir, 0x1fff);
102 void init_fec_ioports(struct fs_platform_info *fpi)
104 int fec_no = fs_get_fec_index(fpi->fs_no);
108 init_fec1_ioports(fpi);
111 printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
116 static void init_scc1_ioports(struct fs_platform_info* fpi)
122 bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
123 io_port = (iop8xx_t *)immr_map(im_ioport);
124 cp = (cpm8xx_t *)immr_map(im_cpm);
126 if (bcsr_io == NULL) {
127 printk(KERN_CRIT "Could not remap BCSR\n");
131 /* Configure port A pins for Txd and Rxd.
133 setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
134 clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
135 clrbits16(&io_port->iop_paodr, PA_ENET_TXD);
137 /* Configure port C pins to enable CLSN and RENA.
139 clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
140 clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
141 setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
143 /* Configure port A for TCLK and RCLK.
145 setbits16(&io_port->iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
146 clrbits16(&io_port->iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
147 clrbits32(&cp->cp_pbpar, PB_ENET_TENA);
148 clrbits32(&cp->cp_pbdir, PB_ENET_TENA);
150 /* Configure Serial Interface clock routing.
151 * First, clear all SCC bits to zero, then set the ones we want.
153 clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
154 setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
156 /* In the original SCC enet driver the following code is placed at
157 the end of the initialization */
158 setbits32(&cp->cp_pbpar, PB_ENET_TENA);
159 setbits32(&cp->cp_pbdir, PB_ENET_TENA);
161 clrbits32(bcsr_io+1, BCSR1_ETHEN);
167 void init_scc_ioports(struct fs_platform_info *fpi)
169 int scc_no = fs_get_scc_index(fpi->fs_no);
173 init_scc1_ioports(fpi);
176 printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
183 static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
186 cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
188 setbits32(&cp->cp_pbpar, 0x000000c0);
189 clrbits32(&cp->cp_pbdir, 0x000000c0);
190 clrbits16(&cp->cp_pbodr, 0x00c0);
193 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
195 if (bcsr_io == NULL) {
196 printk(KERN_CRIT "Could not remap BCSR1\n");
199 clrbits32(bcsr_io,BCSR1_RS232EN_1);
203 static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
206 cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
208 setbits32(&cp->cp_pbpar, 0x00000c00);
209 clrbits32(&cp->cp_pbdir, 0x00000c00);
210 clrbits16(&cp->cp_pbodr, 0x0c00);
213 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
215 if (bcsr_io == NULL) {
216 printk(KERN_CRIT "Could not remap BCSR1\n");
219 clrbits32(bcsr_io,BCSR1_RS232EN_2);
223 void init_smc_ioports(struct fs_uart_platform_info *data)
225 int smc_no = fs_uart_id_fsid2smc(data->fs_no);
229 init_smc1_uart_ioports(data);
230 data->brg = data->clk_rx;
233 init_smc2_uart_ioports(data);
234 data->brg = data->clk_rx;
237 printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
242 int platform_device_skip(const char *model, int id)
247 static void __init mpc86xads_setup_arch(void)
251 mpc86xads_board_setup();
256 static int __init mpc86xads_probe(void)
258 char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
262 if (strcmp(model, "MPC866ADS"))
268 define_machine(mpc86x_ads) {
269 .name = "MPC86x ADS",
270 .probe = mpc86xads_probe,
271 .setup_arch = mpc86xads_setup_arch,
272 .init_IRQ = m8xx_pic_init,
273 .get_irq = mpc8xx_get_irq,
274 .restart = mpc8xx_restart,
275 .calibrate_decr = mpc8xx_calibrate_decr,
276 .set_rtc_time = mpc8xx_set_rtc_time,
277 .get_rtc_time = mpc8xx_get_rtc_time,