Merge branch 'nfs-server-stable' of git://linux-nfs.org/~bfields/linux
[linux-2.6] / arch / powerpc / platforms / 8xx / mpc86xads_setup.c
1 /*arch/powerpc/platforms/8xx/mpc86xads_setup.c
2  *
3  * Platform setup for the Freescale mpc86xads board
4  *
5  * Vitaly Bordug <vbordug@ru.mvista.com>
6  *
7  * Copyright 2005 MontaVista Software Inc.
8  *
9  * This file is licensed under the terms of the GNU General Public License
10  * version 2. This program is licensed "as is" without any warranty of any
11  * kind, whether express or implied.
12  */
13
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/ioport.h>
19 #include <linux/device.h>
20 #include <linux/delay.h>
21 #include <linux/root_dev.h>
22
23 #include <linux/fs_enet_pd.h>
24 #include <linux/fs_uart_pd.h>
25 #include <linux/mii.h>
26
27 #include <asm/delay.h>
28 #include <asm/io.h>
29 #include <asm/machdep.h>
30 #include <asm/page.h>
31 #include <asm/processor.h>
32 #include <asm/system.h>
33 #include <asm/time.h>
34 #include <asm/mpc8xx.h>
35 #include <asm/8xx_immap.h>
36 #include <asm/commproc.h>
37 #include <asm/fs_pd.h>
38 #include <asm/prom.h>
39
40 #include <sysdev/commproc.h>
41
42 static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
43 static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
44 static void init_scc1_ioports(struct fs_platform_info* ptr);
45
46 void __init mpc86xads_board_setup(void)
47 {
48         cpm8xx_t *cp;
49         unsigned int *bcsr_io;
50         u8 tmpval8;
51
52         bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
53         cp = (cpm8xx_t *)immr_map(im_cpm);
54
55         if (bcsr_io == NULL) {
56                 printk(KERN_CRIT "Could not remap BCSR\n");
57                 return;
58         }
59 #ifdef CONFIG_SERIAL_CPM_SMC1
60         clrbits32(bcsr_io, BCSR1_RS232EN_1);
61         clrbits32(&cp->cp_simode, 0xe0000000 >> 17);    /* brg1 */
62         tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
63         out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
64         clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
65 #else
66         setbits32(bcsr_io,BCSR1_RS232EN_1);
67         out_be16(&cp->cp_smc[0].smc_smcmr, 0);
68         out_8(&cp->cp_smc[0].smc_smce, 0);
69 #endif
70
71 #ifdef CONFIG_SERIAL_CPM_SMC2
72         clrbits32(bcsr_io,BCSR1_RS232EN_2);
73         clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
74         setbits32(&cp->cp_simode, 0x20000000 >> 1);     /* brg2 */
75         tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
76         out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
77         clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
78
79         init_smc2_uart_ioports(0);
80 #else
81         setbits32(bcsr_io,BCSR1_RS232EN_2);
82         out_be16(&cp->cp_smc[1].smc_smcmr, 0);
83         out_8(&cp->cp_smc[1].smc_smce, 0);
84 #endif
85         immr_unmap(cp);
86         iounmap(bcsr_io);
87 }
88
89
90 static void init_fec1_ioports(struct fs_platform_info* ptr)
91 {
92         iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
93
94         /* configure FEC1 pins  */
95
96         setbits16(&io_port->iop_pdpar, 0x1fff);
97         setbits16(&io_port->iop_pddir, 0x1fff);
98
99         immr_unmap(io_port);
100 }
101
102 void init_fec_ioports(struct fs_platform_info *fpi)
103 {
104         int fec_no = fs_get_fec_index(fpi->fs_no);
105
106         switch (fec_no) {
107         case 0:
108                 init_fec1_ioports(fpi);
109                 break;
110         default:
111                 printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
112                 return;
113         }
114 }
115
116 static void init_scc1_ioports(struct fs_platform_info* fpi)
117 {
118         unsigned *bcsr_io;
119         iop8xx_t *io_port;
120         cpm8xx_t *cp;
121
122         bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
123         io_port = (iop8xx_t *)immr_map(im_ioport);
124         cp = (cpm8xx_t *)immr_map(im_cpm);
125
126         if (bcsr_io == NULL) {
127                 printk(KERN_CRIT "Could not remap BCSR\n");
128                 return;
129         }
130
131         /* Configure port A pins for Txd and Rxd.
132          */
133         setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
134         clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
135         clrbits16(&io_port->iop_paodr, PA_ENET_TXD);
136
137         /* Configure port C pins to enable CLSN and RENA.
138          */
139         clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
140         clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
141         setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
142
143         /* Configure port A for TCLK and RCLK.
144          */
145         setbits16(&io_port->iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
146         clrbits16(&io_port->iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
147         clrbits32(&cp->cp_pbpar, PB_ENET_TENA);
148         clrbits32(&cp->cp_pbdir, PB_ENET_TENA);
149
150         /* Configure Serial Interface clock routing.
151          * First, clear all SCC bits to zero, then set the ones we want.
152          */
153         clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
154         setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
155
156         /* In the original SCC enet driver the following code is placed at
157            the end of the initialization */
158         setbits32(&cp->cp_pbpar, PB_ENET_TENA);
159         setbits32(&cp->cp_pbdir, PB_ENET_TENA);
160
161         clrbits32(bcsr_io+1, BCSR1_ETHEN);
162         iounmap(bcsr_io);
163         immr_unmap(cp);
164         immr_unmap(io_port);
165 }
166
167 void init_scc_ioports(struct fs_platform_info *fpi)
168 {
169         int scc_no = fs_get_scc_index(fpi->fs_no);
170
171         switch (scc_no) {
172         case 0:
173                 init_scc1_ioports(fpi);
174                 break;
175         default:
176                 printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
177                 return;
178         }
179 }
180
181
182
183 static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
184 {
185         unsigned *bcsr_io;
186         cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
187
188         setbits32(&cp->cp_pbpar, 0x000000c0);
189         clrbits32(&cp->cp_pbdir, 0x000000c0);
190         clrbits16(&cp->cp_pbodr, 0x00c0);
191         immr_unmap(cp);
192
193         bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
194
195         if (bcsr_io == NULL) {
196                 printk(KERN_CRIT "Could not remap BCSR1\n");
197                 return;
198         }
199         clrbits32(bcsr_io,BCSR1_RS232EN_1);
200         iounmap(bcsr_io);
201 }
202
203 static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
204 {
205         unsigned *bcsr_io;
206         cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
207
208         setbits32(&cp->cp_pbpar, 0x00000c00);
209         clrbits32(&cp->cp_pbdir, 0x00000c00);
210         clrbits16(&cp->cp_pbodr, 0x0c00);
211         immr_unmap(cp);
212
213         bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
214
215         if (bcsr_io == NULL) {
216                 printk(KERN_CRIT "Could not remap BCSR1\n");
217                 return;
218         }
219         clrbits32(bcsr_io,BCSR1_RS232EN_2);
220         iounmap(bcsr_io);
221 }
222
223 void init_smc_ioports(struct fs_uart_platform_info *data)
224 {
225         int smc_no = fs_uart_id_fsid2smc(data->fs_no);
226
227         switch (smc_no) {
228         case 0:
229                 init_smc1_uart_ioports(data);
230                 data->brg = data->clk_rx;
231                 break;
232         case 1:
233                 init_smc2_uart_ioports(data);
234                 data->brg = data->clk_rx;
235                 break;
236         default:
237                 printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
238                 return;
239         }
240 }
241
242 int platform_device_skip(const char *model, int id)
243 {
244         return 0;
245 }
246
247 static void __init mpc86xads_setup_arch(void)
248 {
249         cpm_reset();
250
251         mpc86xads_board_setup();
252
253         ROOT_DEV = Root_NFS;
254 }
255
256 static int __init mpc86xads_probe(void)
257 {
258         char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
259                                           "model", NULL);
260         if (model == NULL)
261                 return 0;
262         if (strcmp(model, "MPC866ADS"))
263                 return 0;
264
265         return 1;
266 }
267
268 define_machine(mpc86x_ads) {
269         .name                   = "MPC86x ADS",
270         .probe                  = mpc86xads_probe,
271         .setup_arch             = mpc86xads_setup_arch,
272         .init_IRQ               = m8xx_pic_init,
273         .get_irq                = mpc8xx_get_irq,
274         .restart                = mpc8xx_restart,
275         .calibrate_decr         = mpc8xx_calibrate_decr,
276         .set_rtc_time           = mpc8xx_set_rtc_time,
277         .get_rtc_time           = mpc8xx_get_rtc_time,
278 };