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   1 /*
   2  *      au1000.c  --  Sound driver for Alchemy Au1000 MIPS Internet Edge
   3  *                    Processor.
   4  *
   5  * Copyright 2001 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc.
   7  *              stevel@mvista.com or source@mvista.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  *
  29  *
  30  * Module command line parameters:
  31  *
  32  *  Supported devices:
  33  *  /dev/dsp    standard OSS /dev/dsp device
  34  *  /dev/mixer  standard OSS /dev/mixer device
  35  *
  36  * Notes:
  37  *
  38  *  1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
  39  *     taken, slightly modified or not at all, from the ES1371 driver,
  40  *     so refer to the credits in es1371.c for those. The rest of the
  41  *     code (probe, open, read, write, the ISR, etc.) is new.
  42  *
  43  *  Revision history
  44  *    06.27.2001  Initial version
  45  *    03.20.2002  Added mutex locks around read/write methods, to prevent
  46  *                simultaneous access on SMP or preemptible kernels. Also
  47  *                removed the counter/pointer fragment aligning at the end
  48  *                of read/write methods [stevel].
  49  *    03.21.2002  Add support for coherent DMA on the audio read/write DMA
  50  *                channels [stevel].
  51  *
  52  */
  53 #include <linux/module.h>
  54 #include <linux/string.h>
  55 #include <linux/ioport.h>
  56 #include <linux/sched.h>
  57 #include <linux/delay.h>
  58 #include <linux/sound.h>
  59 #include <linux/slab.h>
  60 #include <linux/soundcard.h>
  61 #include <linux/init.h>
  62 #include <linux/page-flags.h>
  63 #include <linux/poll.h>
  64 #include <linux/pci.h>
  65 #include <linux/bitops.h>
  66 #include <linux/proc_fs.h>
  67 #include <linux/spinlock.h>
  68 #include <linux/smp_lock.h>
  69 #include <linux/ac97_codec.h>
  70 #include <linux/interrupt.h>
  71 #include <asm/io.h>
  72 #include <asm/uaccess.h>
  73 #include <asm/mach-au1x00/au1000.h>
  74 #include <asm/mach-au1x00/au1000_dma.h>
  75
  76 /* --------------------------------------------------------------------- */
  77
  78 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
  79 #undef AU1000_DEBUG
  80 #undef AU1000_VERBOSE_DEBUG
  81
  82 #define AU1000_MODULE_NAME "Au1000 audio"
  83 #define PFX AU1000_MODULE_NAME
  84
  85 #ifdef AU1000_DEBUG
  86 #define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg)
  87 #else
  88 #define dbg(format, arg...) do {} while (0)
  89 #endif
  90 #define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg)
  91 #define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg)
  92 #define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg)
  93
  94
  95 /* misc stuff */
  96 #define POLL_COUNT   0x5000
  97 #define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
  98
  99 /* Boot options */
 100 static int      vra = 0;        // 0 = no VRA, 1 = use VRA if codec supports it
 101 MODULE_PARM(vra, "i");
 102 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
 103
 104
 105 /* --------------------------------------------------------------------- */
 106
 107 struct au1000_state {
 108         /* soundcore stuff */
 109         int             dev_audio;
 110
 111 #ifdef AU1000_DEBUG
 112         /* debug /proc entry */
 113         struct proc_dir_entry *ps;
 114         struct proc_dir_entry *ac97_ps;
 115 #endif                          /* AU1000_DEBUG */
 116
 117         struct ac97_codec codec;
 118         unsigned        codec_base_caps;// AC'97 reg 00h, "Reset Register"
 119         unsigned        codec_ext_caps; // AC'97 reg 28h, "Extended Audio ID"
 120         int             no_vra; // do not use VRA
 121
 122         spinlock_t      lock;
 123         struct semaphore open_sem;
 124         struct semaphore sem;
 125         mode_t          open_mode;
 126         wait_queue_head_t open_wait;
 127
 128         struct dmabuf {
 129                 unsigned int    dmanr;  // DMA Channel number
 130                 unsigned        sample_rate;    // Hz
 131                 unsigned src_factor;     // SRC interp/decimation (no vra)
 132                 unsigned        sample_size;    // 8 or 16
 133                 int             num_channels;   // 1 = mono, 2 = stereo, 4, 6
 134                 int dma_bytes_per_sample;// DMA bytes per audio sample frame
 135                 int user_bytes_per_sample;// User bytes per audio sample frame
 136                 int cnt_factor;          // user-to-DMA bytes per audio
 137                 //  sample frame
 138                 void           *rawbuf;
 139                 dma_addr_t      dmaaddr;
 140                 unsigned        buforder;
 141                 unsigned numfrag;        // # of DMA fragments in DMA buffer
 142                 unsigned        fragshift;
 143                 void           *nextIn; // ptr to next-in to DMA buffer
 144                 void           *nextOut;// ptr to next-out from DMA buffer
 145                 int             count;  // current byte count in DMA buffer
 146                 unsigned        total_bytes;    // total bytes written or read
 147                 unsigned        error;  // over/underrun
 148                 wait_queue_head_t wait;
 149                 /* redundant, but makes calculations easier */
 150                 unsigned fragsize;       // user perception of fragment size
 151                 unsigned dma_fragsize;   // DMA (real) fragment size
 152                 unsigned dmasize;        // Total DMA buffer size
 153                 //   (mult. of DMA fragsize)
 154                 /* OSS stuff */
 155                 unsigned        mapped:1;
 156                 unsigned        ready:1;
 157                 unsigned        stopped:1;
 158                 unsigned        ossfragshift;
 159                 int             ossmaxfrags;
 160                 unsigned        subdivision;
 161         } dma_dac      , dma_adc;
 162 } au1000_state;
 163
 164 /* --------------------------------------------------------------------- */
 165
 166
 167 static inline unsigned ld2(unsigned int x)
 168 {
 169         unsigned        r = 0;
 170
 171         if (x >= 0x10000) {
 172                 x >>= 16;
 173                 r += 16;
 174         }
 175         if (x >= 0x100) {
 176                 x >>= 8;
 177                 r += 8;
 178         }
 179         if (x >= 0x10) {
 180                 x >>= 4;
 181                 r += 4;
 182         }
 183         if (x >= 4) {
 184                 x >>= 2;
 185                 r += 2;
 186         }
 187         if (x >= 2)
 188                 r++;
 189         return r;
 190 }
 191
 192 /* --------------------------------------------------------------------- */
 193
 194 static void au1000_delay(int msec)
 195 {
 196         unsigned long   tmo;
 197         signed long     tmo2;
 198
 199         if (in_interrupt())
 200                 return;
 201
 202         tmo = jiffies + (msec * HZ) / 1000;
 203         for (;;) {
 204                 tmo2 = tmo - jiffies;
 205                 if (tmo2 <= 0)
 206                         break;
 207                 schedule_timeout(tmo2);
 208         }
 209 }
 210
 211
 212 /* --------------------------------------------------------------------- */
 213
 214 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 215 {
 216         struct au1000_state *s = (struct au1000_state *)codec->private_data;
 217         unsigned long   flags;
 218         u32             cmd;
 219         u16             data;
 220         int             i;
 221
 222         spin_lock_irqsave(&s->lock, flags);
 223
 224         for (i = 0; i < POLL_COUNT; i++)
 225                 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
 226                         break;
 227         if (i == POLL_COUNT)
 228                 err("rdcodec: codec cmd pending expired!");
 229
 230         cmd = (u32) addr & AC97C_INDEX_MASK;
 231         cmd |= AC97C_READ;      // read command
 232         au_writel(cmd, AC97C_CMD);
 233
 234         /* now wait for the data */
 235         for (i = 0; i < POLL_COUNT; i++)
 236                 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
 237                         break;
 238         if (i == POLL_COUNT) {
 239                 err("rdcodec: read poll expired!");
 240                 return 0;
 241         }
 242
 243         data = au_readl(AC97C_CMD) & 0xffff;
 244
 245         spin_unlock_irqrestore(&s->lock, flags);
 246
 247         return data;
 248 }
 249
 250
 251 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 252 {
 253         struct au1000_state *s = (struct au1000_state *)codec->private_data;
 254         unsigned long   flags;
 255         u32             cmd;
 256         int             i;
 257
 258         spin_lock_irqsave(&s->lock, flags);
 259
 260         for (i = 0; i < POLL_COUNT; i++)
 261                 if (!(au_readl(AC97C_STATUS) & AC97C_CP))
 262                         break;
 263         if (i == POLL_COUNT)
 264                 err("wrcodec: codec cmd pending expired!");
 265
 266         cmd = (u32) addr & AC97C_INDEX_MASK;
 267         cmd &= ~AC97C_READ;     // write command
 268         cmd |= ((u32) data << AC97C_WD_BIT);    // OR in the data word
 269         au_writel(cmd, AC97C_CMD);
 270
 271         spin_unlock_irqrestore(&s->lock, flags);
 272 }
 273
 274 static void waitcodec(struct ac97_codec *codec)
 275 {
 276         u16             temp;
 277         int             i;
 278
 279         /* codec_wait is used to wait for a ready state after
 280            an AC97C_RESET. */
 281         au1000_delay(10);
 282
 283         // first poll the CODEC_READY tag bit
 284         for (i = 0; i < POLL_COUNT; i++)
 285                 if (au_readl(AC97C_STATUS) & AC97C_READY)
 286                         break;
 287         if (i == POLL_COUNT) {
 288                 err("waitcodec: CODEC_READY poll expired!");
 289                 return;
 290         }
 291         // get AC'97 powerdown control/status register
 292         temp = rdcodec(codec, AC97_POWER_CONTROL);
 293
 294         // If anything is powered down, power'em up
 295         if (temp & 0x7f00) {
 296                 // Power on
 297                 wrcodec(codec, AC97_POWER_CONTROL, 0);
 298                 au1000_delay(100);
 299                 // Reread
 300                 temp = rdcodec(codec, AC97_POWER_CONTROL);
 301         }
 302
 303         // Check if Codec REF,ANL,DAC,ADC ready
 304         if ((temp & 0x7f0f) != 0x000f)
 305                 err("codec reg 26 status (0x%x) not ready!!", temp);
 306 }
 307
 308
 309 /* --------------------------------------------------------------------- */
 310
 311 /* stop the ADC before calling */
 312 static void set_adc_rate(struct au1000_state *s, unsigned rate)
 313 {
 314         struct dmabuf  *adc = &s->dma_adc;
 315         struct dmabuf  *dac = &s->dma_dac;
 316         unsigned        adc_rate, dac_rate;
 317         u16             ac97_extstat;
 318
 319         if (s->no_vra) {
 320                 // calc SRC factor
 321                 adc->src_factor = ((96000 / rate) + 1) >> 1;
 322                 adc->sample_rate = 48000 / adc->src_factor;
 323                 return;
 324         }
 325
 326         adc->src_factor = 1;
 327
 328         ac97_extstat = rdcodec(&s->codec, AC97_EXTENDED_STATUS);
 329
 330         rate = rate > 48000 ? 48000 : rate;
 331
 332         // enable VRA
 333         wrcodec(&s->codec, AC97_EXTENDED_STATUS,
 334                 ac97_extstat | AC97_EXTSTAT_VRA);
 335         // now write the sample rate
 336         wrcodec(&s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
 337         // read it back for actual supported rate
 338         adc_rate = rdcodec(&s->codec, AC97_PCM_LR_ADC_RATE);
 339
 340 #ifdef AU1000_VERBOSE_DEBUG
 341         dbg("%s: set to %d Hz", __FUNCTION__, adc_rate);
 342 #endif
 343
 344         // some codec's don't allow unequal DAC and ADC rates, in which case
 345         // writing one rate reg actually changes both.
 346         dac_rate = rdcodec(&s->codec, AC97_PCM_FRONT_DAC_RATE);
 347         if (dac->num_channels > 2)
 348                 wrcodec(&s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
 349         if (dac->num_channels > 4)
 350                 wrcodec(&s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
 351
 352         adc->sample_rate = adc_rate;
 353         dac->sample_rate = dac_rate;
 354 }
 355
 356 /* stop the DAC before calling */
 357 static void set_dac_rate(struct au1000_state *s, unsigned rate)
 358 {
 359         struct dmabuf  *dac = &s->dma_dac;
 360         struct dmabuf  *adc = &s->dma_adc;
 361         unsigned        adc_rate, dac_rate;
 362         u16             ac97_extstat;
 363
 364         if (s->no_vra) {
 365                 // calc SRC factor
 366                 dac->src_factor = ((96000 / rate) + 1) >> 1;
 367                 dac->sample_rate = 48000 / dac->src_factor;
 368                 return;
 369         }
 370
 371         dac->src_factor = 1;
 372
 373         ac97_extstat = rdcodec(&s->codec, AC97_EXTENDED_STATUS);
 374
 375         rate = rate > 48000 ? 48000 : rate;
 376
 377         // enable VRA
 378         wrcodec(&s->codec, AC97_EXTENDED_STATUS,
 379                 ac97_extstat | AC97_EXTSTAT_VRA);
 380         // now write the sample rate
 381         wrcodec(&s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
 382         // I don't support different sample rates for multichannel,
 383         // so make these channels the same.
 384         if (dac->num_channels > 2)
 385                 wrcodec(&s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
 386         if (dac->num_channels > 4)
 387                 wrcodec(&s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
 388         // read it back for actual supported rate
 389         dac_rate = rdcodec(&s->codec, AC97_PCM_FRONT_DAC_RATE);
 390
 391 #ifdef AU1000_VERBOSE_DEBUG
 392         dbg("%s: set to %d Hz", __FUNCTION__, dac_rate);
 393 #endif
 394
 395         // some codec's don't allow unequal DAC and ADC rates, in which case
 396         // writing one rate reg actually changes both.
 397         adc_rate = rdcodec(&s->codec, AC97_PCM_LR_ADC_RATE);
 398
 399         dac->sample_rate = dac_rate;
 400         adc->sample_rate = adc_rate;
 401 }
 402
 403 static void stop_dac(struct au1000_state *s)
 404 {
 405         struct dmabuf  *db = &s->dma_dac;
 406         unsigned long   flags;
 407
 408         if (db->stopped)
 409                 return;
 410
 411         spin_lock_irqsave(&s->lock, flags);
 412
 413         disable_dma(db->dmanr);
 414
 415         db->stopped = 1;
 416
 417         spin_unlock_irqrestore(&s->lock, flags);
 418 }
 419
 420 static void  stop_adc(struct au1000_state *s)
 421 {
 422         struct dmabuf  *db = &s->dma_adc;
 423         unsigned long   flags;
 424
 425         if (db->stopped)
 426                 return;
 427
 428         spin_lock_irqsave(&s->lock, flags);
 429
 430         disable_dma(db->dmanr);
 431
 432         db->stopped = 1;
 433
 434         spin_unlock_irqrestore(&s->lock, flags);
 435 }
 436
 437
 438 static void set_xmit_slots(int num_channels)
 439 {
 440         u32 ac97_config = au_readl(AC97C_CONFIG) & ~AC97C_XMIT_SLOTS_MASK;
 441
 442         switch (num_channels) {
 443         case 1:         // mono
 444         case 2:         // stereo, slots 3,4
 445                 ac97_config |= (0x3 << AC97C_XMIT_SLOTS_BIT);
 446                 break;
 447         case 4:         // stereo with surround, slots 3,4,7,8
 448                 ac97_config |= (0x33 << AC97C_XMIT_SLOTS_BIT);
 449                 break;
 450         case 6:         // stereo with surround and center/LFE, slots 3,4,6,7,8,9
 451                 ac97_config |= (0x7b << AC97C_XMIT_SLOTS_BIT);
 452                 break;
 453         }
 454
 455         au_writel(ac97_config, AC97C_CONFIG);
 456 }
 457
 458 static void     set_recv_slots(int num_channels)
 459 {
 460         u32 ac97_config = au_readl(AC97C_CONFIG) & ~AC97C_RECV_SLOTS_MASK;
 461
 462         /*
 463          * Always enable slots 3 and 4 (stereo). Slot 6 is
 464          * optional Mic ADC, which I don't support yet.
 465          */
 466         ac97_config |= (0x3 << AC97C_RECV_SLOTS_BIT);
 467
 468         au_writel(ac97_config, AC97C_CONFIG);
 469 }
 470
 471 static void start_dac(struct au1000_state *s)
 472 {
 473         struct dmabuf  *db = &s->dma_dac;
 474         unsigned long   flags;
 475         unsigned long   buf1, buf2;
 476
 477         if (!db->stopped)
 478                 return;
 479
 480         spin_lock_irqsave(&s->lock, flags);
 481
 482         au_readl(AC97C_STATUS); // read status to clear sticky bits
 483
 484         // reset Buffer 1 and 2 pointers to nextOut and nextOut+dma_fragsize
 485         buf1 = virt_to_phys(db->nextOut);
 486         buf2 = buf1 + db->dma_fragsize;
 487         if (buf2 >= db->dmaaddr + db->dmasize)
 488                 buf2 -= db->dmasize;
 489
 490         set_xmit_slots(db->num_channels);
 491
 492         init_dma(db->dmanr);
 493         if (get_dma_active_buffer(db->dmanr) == 0) {
 494                 clear_dma_done0(db->dmanr);     // clear DMA done bit
 495                 set_dma_addr0(db->dmanr, buf1);
 496                 set_dma_addr1(db->dmanr, buf2);
 497         } else {
 498                 clear_dma_done1(db->dmanr);     // clear DMA done bit
 499                 set_dma_addr1(db->dmanr, buf1);
 500                 set_dma_addr0(db->dmanr, buf2);
 501         }
 502         set_dma_count(db->dmanr, db->dma_fragsize>>1);
 503         enable_dma_buffers(db->dmanr);
 504
 505         start_dma(db->dmanr);
 506
 507 #ifdef AU1000_VERBOSE_DEBUG
 508         dump_au1000_dma_channel(db->dmanr);
 509 #endif
 510
 511         db->stopped = 0;
 512
 513         spin_unlock_irqrestore(&s->lock, flags);
 514 }
 515
 516 static void start_adc(struct au1000_state *s)
 517 {
 518         struct dmabuf  *db = &s->dma_adc;
 519         unsigned long   flags;
 520         unsigned long   buf1, buf2;
 521
 522         if (!db->stopped)
 523                 return;
 524
 525         spin_lock_irqsave(&s->lock, flags);
 526
 527         au_readl(AC97C_STATUS); // read status to clear sticky bits
 528
 529         // reset Buffer 1 and 2 pointers to nextIn and nextIn+dma_fragsize
 530         buf1 = virt_to_phys(db->nextIn);
 531         buf2 = buf1 + db->dma_fragsize;
 532         if (buf2 >= db->dmaaddr + db->dmasize)
 533                 buf2 -= db->dmasize;
 534
 535         set_recv_slots(db->num_channels);
 536
 537         init_dma(db->dmanr);
 538         if (get_dma_active_buffer(db->dmanr) == 0) {
 539                 clear_dma_done0(db->dmanr);     // clear DMA done bit
 540                 set_dma_addr0(db->dmanr, buf1);
 541                 set_dma_addr1(db->dmanr, buf2);
 542         } else {
 543                 clear_dma_done1(db->dmanr);     // clear DMA done bit
 544                 set_dma_addr1(db->dmanr, buf1);
 545                 set_dma_addr0(db->dmanr, buf2);
 546         }
 547         set_dma_count(db->dmanr, db->dma_fragsize>>1);
 548         enable_dma_buffers(db->dmanr);
 549
 550         start_dma(db->dmanr);
 551
 552 #ifdef AU1000_VERBOSE_DEBUG
 553         dump_au1000_dma_channel(db->dmanr);
 554 #endif
 555
 556         db->stopped = 0;
 557
 558         spin_unlock_irqrestore(&s->lock, flags);
 559 }
 560
 561 /* --------------------------------------------------------------------- */
 562
 563 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 564 #define DMABUF_MINORDER 1
 565
 566 static inline void dealloc_dmabuf(struct au1000_state *s, struct dmabuf *db)
 567 {
 568         struct page    *page, *pend;
 569
 570         if (db->rawbuf) {
 571                 /* undo marking the pages as reserved */
 572                 pend = virt_to_page(db->rawbuf +
 573                                     (PAGE_SIZE << db->buforder) - 1);
 574                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 575                         ClearPageReserved(page);
 576                 dma_free_noncoherent(NULL,
 577                                 PAGE_SIZE << db->buforder,
 578                                 db->rawbuf,
 579                                 db->dmaaddr);
 580         }
 581         db->rawbuf = db->nextIn = db->nextOut = NULL;
 582         db->mapped = db->ready = 0;
 583 }
 584
 585 static int prog_dmabuf(struct au1000_state *s, struct dmabuf *db)
 586 {
 587         int             order;
 588         unsigned user_bytes_per_sec;
 589         unsigned        bufs;
 590         struct page    *page, *pend;
 591         unsigned        rate = db->sample_rate;
 592
 593         if (!db->rawbuf) {
 594                 db->ready = db->mapped = 0;
 595                 for (order = DMABUF_DEFAULTORDER;
 596                      order >= DMABUF_MINORDER; order--)
 597                         if ((db->rawbuf = dma_alloc_noncoherent(NULL,
 598                                                 PAGE_SIZE << order,
 599                                                 &db->dmaaddr,
 600                                                 0)))
 601                                 break;
 602                 if (!db->rawbuf)
 603                         return -ENOMEM;
 604                 db->buforder = order;
 605                 /* now mark the pages as reserved;
 606                    otherwise remap_pfn_range doesn't do what we want */
 607                 pend = virt_to_page(db->rawbuf +
 608                                     (PAGE_SIZE << db->buforder) - 1);
 609                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 610                         SetPageReserved(page);
 611         }
 612
 613         db->cnt_factor = 1;
 614         if (db->sample_size == 8)
 615                 db->cnt_factor *= 2;
 616         if (db->num_channels == 1)
 617                 db->cnt_factor *= 2;
 618         db->cnt_factor *= db->src_factor;
 619
 620         db->count = 0;
 621         db->nextIn = db->nextOut = db->rawbuf;
 622
 623         db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels;
 624         db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ?
 625                                         2 : db->num_channels);
 626
 627         user_bytes_per_sec = rate * db->user_bytes_per_sample;
 628         bufs = PAGE_SIZE << db->buforder;
 629         if (db->ossfragshift) {
 630                 if ((1000 << db->ossfragshift) < user_bytes_per_sec)
 631                         db->fragshift = ld2(user_bytes_per_sec/1000);
 632                 else
 633                         db->fragshift = db->ossfragshift;
 634         } else {
 635                 db->fragshift = ld2(user_bytes_per_sec / 100 /
 636                                     (db->subdivision ? db->subdivision : 1));
 637                 if (db->fragshift < 3)
 638                         db->fragshift = 3;
 639         }
 640
 641         db->fragsize = 1 << db->fragshift;
 642         db->dma_fragsize = db->fragsize * db->cnt_factor;
 643         db->numfrag = bufs / db->dma_fragsize;
 644
 645         while (db->numfrag < 4 && db->fragshift > 3) {
 646                 db->fragshift--;
 647                 db->fragsize = 1 << db->fragshift;
 648                 db->dma_fragsize = db->fragsize * db->cnt_factor;
 649                 db->numfrag = bufs / db->dma_fragsize;
 650         }
 651
 652         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 653                 db->numfrag = db->ossmaxfrags;
 654
 655         db->dmasize = db->dma_fragsize * db->numfrag;
 656         memset(db->rawbuf, 0, bufs);
 657
 658 #ifdef AU1000_VERBOSE_DEBUG
 659         dbg("rate=%d, samplesize=%d, channels=%d",
 660             rate, db->sample_size, db->num_channels);
 661         dbg("fragsize=%d, cnt_factor=%d, dma_fragsize=%d",
 662             db->fragsize, db->cnt_factor, db->dma_fragsize);
 663         dbg("numfrag=%d, dmasize=%d", db->numfrag, db->dmasize);
 664 #endif
 665
 666         db->ready = 1;
 667         return 0;
 668 }
 669
 670 static inline int prog_dmabuf_adc(struct au1000_state *s)
 671 {
 672         stop_adc(s);
 673         return prog_dmabuf(s, &s->dma_adc);
 674
 675 }
 676
 677 static inline int prog_dmabuf_dac(struct au1000_state *s)
 678 {
 679         stop_dac(s);
 680         return prog_dmabuf(s, &s->dma_dac);
 681 }
 682
 683
 684 /* hold spinlock for the following */
 685 static irqreturn_t dac_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 686 {
 687         struct au1000_state *s = (struct au1000_state *) dev_id;
 688         struct dmabuf  *dac = &s->dma_dac;
 689         unsigned long   newptr;
 690         u32 ac97c_stat, buff_done;
 691
 692         ac97c_stat = au_readl(AC97C_STATUS);
 693 #ifdef AU1000_VERBOSE_DEBUG
 694         if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
 695                 dbg("AC97C status = 0x%08x", ac97c_stat);
 696 #endif
 697
 698         if ((buff_done = get_dma_buffer_done(dac->dmanr)) == 0) {
 699                 /* fastpath out, to ease interrupt sharing */
 700                 return IRQ_HANDLED;
 701         }
 702
 703         spin_lock(&s->lock);
 704
 705         if (buff_done != (DMA_D0 | DMA_D1)) {
 706                 dac->nextOut += dac->dma_fragsize;
 707                 if (dac->nextOut >= dac->rawbuf + dac->dmasize)
 708                         dac->nextOut -= dac->dmasize;
 709
 710                 /* update playback pointers */
 711                 newptr = virt_to_phys(dac->nextOut) + dac->dma_fragsize;
 712                 if (newptr >= dac->dmaaddr + dac->dmasize)
 713                         newptr -= dac->dmasize;
 714
 715                 dac->count -= dac->dma_fragsize;
 716                 dac->total_bytes += dac->dma_fragsize;
 717
 718                 if (dac->count <= 0) {
 719 #ifdef AU1000_VERBOSE_DEBUG
 720                         dbg("dac underrun");
 721 #endif
 722                         spin_unlock(&s->lock);
 723                         stop_dac(s);
 724                         spin_lock(&s->lock);
 725                         dac->count = 0;
 726                         dac->nextIn = dac->nextOut;
 727                 } else if (buff_done == DMA_D0) {
 728                         clear_dma_done0(dac->dmanr);    // clear DMA done bit
 729                         set_dma_count0(dac->dmanr, dac->dma_fragsize>>1);
 730                         set_dma_addr0(dac->dmanr, newptr);
 731                         enable_dma_buffer0(dac->dmanr); // reenable
 732                 } else {
 733                         clear_dma_done1(dac->dmanr);    // clear DMA done bit
 734                         set_dma_count1(dac->dmanr, dac->dma_fragsize>>1);
 735                         set_dma_addr1(dac->dmanr, newptr);
 736                         enable_dma_buffer1(dac->dmanr); // reenable
 737                 }
 738         } else {
 739                 // both done bits set, we missed an interrupt
 740                 spin_unlock(&s->lock);
 741                 stop_dac(s);
 742                 spin_lock(&s->lock);
 743
 744                 dac->nextOut += 2*dac->dma_fragsize;
 745                 if (dac->nextOut >= dac->rawbuf + dac->dmasize)
 746                         dac->nextOut -= dac->dmasize;
 747
 748                 dac->count -= 2*dac->dma_fragsize;
 749                 dac->total_bytes += 2*dac->dma_fragsize;
 750
 751                 if (dac->count > 0) {
 752                         spin_unlock(&s->lock);
 753                         start_dac(s);
 754                         spin_lock(&s->lock);
 755                 }
 756         }
 757
 758         /* wake up anybody listening */
 759         if (waitqueue_active(&dac->wait))
 760                 wake_up(&dac->wait);
 761
 762         spin_unlock(&s->lock);
 763
 764         return IRQ_HANDLED;
 765 }
 766
 767
 768 static irqreturn_t adc_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 769 {
 770         struct au1000_state *s = (struct au1000_state *) dev_id;
 771         struct dmabuf  *adc = &s->dma_adc;
 772         unsigned long   newptr;
 773         u32 ac97c_stat, buff_done;
 774
 775         ac97c_stat = au_readl(AC97C_STATUS);
 776 #ifdef AU1000_VERBOSE_DEBUG
 777         if (ac97c_stat & (AC97C_RU | AC97C_RO))
 778                 dbg("AC97C status = 0x%08x", ac97c_stat);
 779 #endif
 780
 781         if ((buff_done = get_dma_buffer_done(adc->dmanr)) == 0) {
 782                 /* fastpath out, to ease interrupt sharing */
 783                 return IRQ_HANDLED;
 784         }
 785
 786         spin_lock(&s->lock);
 787
 788         if (buff_done != (DMA_D0 | DMA_D1)) {
 789                 if (adc->count + adc->dma_fragsize > adc->dmasize) {
 790                         // Overrun. Stop ADC and log the error
 791                         spin_unlock(&s->lock);
 792                         stop_adc(s);
 793                         adc->error++;
 794                         err("adc overrun");
 795                         return IRQ_NONE;
 796                 }
 797
 798                 adc->nextIn += adc->dma_fragsize;
 799                 if (adc->nextIn >= adc->rawbuf + adc->dmasize)
 800                         adc->nextIn -= adc->dmasize;
 801
 802                 /* update capture pointers */
 803                 newptr = virt_to_phys(adc->nextIn) + adc->dma_fragsize;
 804                 if (newptr >= adc->dmaaddr + adc->dmasize)
 805                         newptr -= adc->dmasize;
 806
 807                 adc->count += adc->dma_fragsize;
 808                 adc->total_bytes += adc->dma_fragsize;
 809
 810                 if (buff_done == DMA_D0) {
 811                         clear_dma_done0(adc->dmanr);    // clear DMA done bit
 812                         set_dma_count0(adc->dmanr, adc->dma_fragsize>>1);
 813                         set_dma_addr0(adc->dmanr, newptr);
 814                         enable_dma_buffer0(adc->dmanr); // reenable
 815                 } else {
 816                         clear_dma_done1(adc->dmanr);    // clear DMA done bit
 817                         set_dma_count1(adc->dmanr, adc->dma_fragsize>>1);
 818                         set_dma_addr1(adc->dmanr, newptr);
 819                         enable_dma_buffer1(adc->dmanr); // reenable
 820                 }
 821         } else {
 822                 // both done bits set, we missed an interrupt
 823                 spin_unlock(&s->lock);
 824                 stop_adc(s);
 825                 spin_lock(&s->lock);
 826
 827                 if (adc->count + 2*adc->dma_fragsize > adc->dmasize) {
 828                         // Overrun. Log the error
 829                         adc->error++;
 830                         err("adc overrun");
 831                         spin_unlock(&s->lock);
 832                         return IRQ_NONE;
 833                 }
 834
 835                 adc->nextIn += 2*adc->dma_fragsize;
 836                 if (adc->nextIn >= adc->rawbuf + adc->dmasize)
 837                         adc->nextIn -= adc->dmasize;
 838
 839                 adc->count += 2*adc->dma_fragsize;
 840                 adc->total_bytes += 2*adc->dma_fragsize;
 841
 842                 spin_unlock(&s->lock);
 843                 start_adc(s);
 844                 spin_lock(&s->lock);
 845         }
 846
 847         /* wake up anybody listening */
 848         if (waitqueue_active(&adc->wait))
 849                 wake_up(&adc->wait);
 850
 851         spin_unlock(&s->lock);
 852
 853         return IRQ_HANDLED;
 854 }
 855
 856 /* --------------------------------------------------------------------- */
 857
 858 static loff_t au1000_llseek(struct file *file, loff_t offset, int origin)
 859 {
 860         return -ESPIPE;
 861 }
 862
 863
 864 static int au1000_open_mixdev(struct inode *inode, struct file *file)
 865 {
 866         file->private_data = &au1000_state;
 867         return nonseekable_open(inode, file);
 868 }
 869
 870 static int au1000_release_mixdev(struct inode *inode, struct file *file)
 871 {
 872         return 0;
 873 }
 874
 875 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
 876                         unsigned long arg)
 877 {
 878         return codec->mixer_ioctl(codec, cmd, arg);
 879 }
 880
 881 static int au1000_ioctl_mixdev(struct inode *inode, struct file *file,
 882                                unsigned int cmd, unsigned long arg)
 883 {
 884         struct au1000_state *s = (struct au1000_state *)file->private_data;
 885         struct ac97_codec *codec = &s->codec;
 886
 887         return mixdev_ioctl(codec, cmd, arg);
 888 }
 889
 890 static /*const */ struct file_operations au1000_mixer_fops = {
 891         .owner          = THIS_MODULE,
 892         .llseek         = au1000_llseek,
 893         .ioctl          = au1000_ioctl_mixdev,
 894         .open           = au1000_open_mixdev,
 895         .release        = au1000_release_mixdev,
 896 };
 897
 898 /* --------------------------------------------------------------------- */
 899
 900 static int drain_dac(struct au1000_state *s, int nonblock)
 901 {
 902         unsigned long   flags;
 903         int             count, tmo;
 904
 905         if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
 906                 return 0;
 907
 908         for (;;) {
 909                 spin_lock_irqsave(&s->lock, flags);
 910                 count = s->dma_dac.count;
 911                 spin_unlock_irqrestore(&s->lock, flags);
 912                 if (count <= 0)
 913                         break;
 914                 if (signal_pending(current))
 915                         break;
 916                 if (nonblock)
 917                         return -EBUSY;
 918                 tmo = 1000 * count / (s->no_vra ?
 919                                       48000 : s->dma_dac.sample_rate);
 920                 tmo /= s->dma_dac.dma_bytes_per_sample;
 921                 au1000_delay(tmo);
 922         }
 923         if (signal_pending(current))
 924                 return -ERESTARTSYS;
 925         return 0;
 926 }
 927
 928 /* --------------------------------------------------------------------- */
 929
 930 static inline u8 S16_TO_U8(s16 ch)
 931 {
 932         return (u8) (ch >> 8) + 0x80;
 933 }
 934 static inline s16 U8_TO_S16(u8 ch)
 935 {
 936         return (s16) (ch - 0x80) << 8;
 937 }
 938
 939 /*
 940  * Translates user samples to dma buffer suitable for AC'97 DAC data:
 941  *     If mono, copy left channel to right channel in dma buffer.
 942  *     If 8 bit samples, cvt to 16-bit before writing to dma buffer.
 943  *     If interpolating (no VRA), duplicate every audio frame src_factor times.
 944  */
 945 static int translate_from_user(struct dmabuf *db,
 946                                char* dmabuf,
 947                                char* userbuf,
 948                                int dmacount)
 949 {
 950         int             sample, i;
 951         int             interp_bytes_per_sample;
 952         int             num_samples;
 953         int             mono = (db->num_channels == 1);
 954         char            usersample[12];
 955         s16             ch, dmasample[6];
 956
 957         if (db->sample_size == 16 && !mono && db->src_factor == 1) {
 958                 // no translation necessary, just copy
 959                 if (copy_from_user(dmabuf, userbuf, dmacount))
 960                         return -EFAULT;
 961                 return dmacount;
 962         }
 963
 964         interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
 965         num_samples = dmacount / interp_bytes_per_sample;
 966
 967         for (sample = 0; sample < num_samples; sample++) {
 968                 if (copy_from_user(usersample, userbuf,
 969                                    db->user_bytes_per_sample)) {
 970                         dbg("%s: fault", __FUNCTION__);
 971                         return -EFAULT;
 972                 }
 973
 974                 for (i = 0; i < db->num_channels; i++) {
 975                         if (db->sample_size == 8)
 976                                 ch = U8_TO_S16(usersample[i]);
 977                         else
 978                                 ch = *((s16 *) (&usersample[i * 2]));
 979                         dmasample[i] = ch;
 980                         if (mono)
 981                                 dmasample[i + 1] = ch;  // right channel
 982                 }
 983
 984                 // duplicate every audio frame src_factor times
 985                 for (i = 0; i < db->src_factor; i++)
 986                         memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
 987
 988                 userbuf += db->user_bytes_per_sample;
 989                 dmabuf += interp_bytes_per_sample;
 990         }
 991
 992         return num_samples * interp_bytes_per_sample;
 993 }
 994
 995 /*
 996  * Translates AC'97 ADC samples to user buffer:
 997  *     If mono, send only left channel to user buffer.
 998  *     If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer.
 999  *     If decimating (no VRA), skip over src_factor audio frames.
1000  */
1001 static int translate_to_user(struct dmabuf *db,
1002                              char* userbuf,
1003                              char* dmabuf,
1004                              int dmacount)
1005 {
1006         int             sample, i;
1007         int             interp_bytes_per_sample;
1008         int             num_samples;
1009         int             mono = (db->num_channels == 1);
1010         char            usersample[12];
1011
1012         if (db->sample_size == 16 && !mono && db->src_factor == 1) {
1013                 // no translation necessary, just copy
1014                 if (copy_to_user(userbuf, dmabuf, dmacount))
1015                         return -EFAULT;
1016                 return dmacount;
1017         }
1018
1019         interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
1020         num_samples = dmacount / interp_bytes_per_sample;
1021
1022         for (sample = 0; sample < num_samples; sample++) {
1023                 for (i = 0; i < db->num_channels; i++) {
1024                         if (db->sample_size == 8)
1025                                 usersample[i] =
1026                                         S16_TO_U8(*((s16 *) (&dmabuf[i * 2])));
1027                         else
1028                                 *((s16 *) (&usersample[i * 2])) =
1029                                         *((s16 *) (&dmabuf[i * 2]));
1030                 }
1031
1032                 if (copy_to_user(userbuf, usersample,
1033                                  db->user_bytes_per_sample)) {
1034                         dbg("%s: fault", __FUNCTION__);
1035                         return -EFAULT;
1036                 }
1037
1038                 userbuf += db->user_bytes_per_sample;
1039                 dmabuf += interp_bytes_per_sample;
1040         }
1041
1042         return num_samples * interp_bytes_per_sample;
1043 }
1044
1045 /*
1046  * Copy audio data to/from user buffer from/to dma buffer, taking care
1047  * that we wrap when reading/writing the dma buffer. Returns actual byte
1048  * count written to or read from the dma buffer.
1049  */
1050 static int copy_dmabuf_user(struct dmabuf *db, char* userbuf,
1051                             int count, int to_user)
1052 {
1053         char           *bufptr = to_user ? db->nextOut : db->nextIn;
1054         char           *bufend = db->rawbuf + db->dmasize;
1055         int             cnt, ret;
1056
1057         if (bufptr + count > bufend) {
1058                 int             partial = (int) (bufend - bufptr);
1059                 if (to_user) {
1060                         if ((cnt = translate_to_user(db, userbuf,
1061                                                      bufptr, partial)) < 0)
1062                                 return cnt;
1063                         ret = cnt;
1064                         if ((cnt = translate_to_user(db, userbuf + partial,
1065                                                      db->rawbuf,
1066                                                      count - partial)) < 0)
1067                                 return cnt;
1068                         ret += cnt;
1069                 } else {
1070                         if ((cnt = translate_from_user(db, bufptr, userbuf,
1071                                                        partial)) < 0)
1072                                 return cnt;
1073                         ret = cnt;
1074                         if ((cnt = translate_from_user(db, db->rawbuf,
1075                                                        userbuf + partial,
1076                                                        count - partial)) < 0)
1077                                 return cnt;
1078                         ret += cnt;
1079                 }
1080         } else {
1081                 if (to_user)
1082                         ret = translate_to_user(db, userbuf, bufptr, count);
1083                 else
1084                         ret = translate_from_user(db, bufptr, userbuf, count);
1085         }
1086
1087         return ret;
1088 }
1089
1090
1091 static ssize_t au1000_read(struct file *file, char *buffer,
1092                            size_t count, loff_t *ppos)
1093 {
1094         struct au1000_state *s = (struct au1000_state *)file->private_data;
1095         struct dmabuf  *db = &s->dma_adc;
1096         DECLARE_WAITQUEUE(wait, current);
1097         ssize_t         ret;
1098         unsigned long   flags;
1099         int             cnt, usercnt, avail;
1100
1101         if (db->mapped)
1102                 return -ENXIO;
1103         if (!access_ok(VERIFY_WRITE, buffer, count))
1104                 return -EFAULT;
1105         ret = 0;
1106
1107         count *= db->cnt_factor;
1108
1109         down(&s->sem);
1110         add_wait_queue(&db->wait, &wait);
1111
1112         while (count > 0) {
1113                 // wait for samples in ADC dma buffer
1114                 do {
1115                         if (db->stopped)
1116                                 start_adc(s);
1117                         spin_lock_irqsave(&s->lock, flags);
1118                         avail = db->count;
1119                         if (avail <= 0)
1120                                 __set_current_state(TASK_INTERRUPTIBLE);
1121                         spin_unlock_irqrestore(&s->lock, flags);
1122                         if (avail <= 0) {
1123                                 if (file->f_flags & O_NONBLOCK) {
1124                                         if (!ret)
1125                                                 ret = -EAGAIN;
1126                                         goto out;
1127                                 }
1128                                 up(&s->sem);
1129                                 schedule();
1130                                 if (signal_pending(current)) {
1131                                         if (!ret)
1132                                                 ret = -ERESTARTSYS;
1133                                         goto out2;
1134                                 }
1135                                 down(&s->sem);
1136                         }
1137                 } while (avail <= 0);
1138
1139                 // copy from nextOut to user
1140                 if ((cnt = copy_dmabuf_user(db, buffer,
1141                                             count > avail ?
1142                                             avail : count, 1)) < 0) {
1143                         if (!ret)
1144                                 ret = -EFAULT;
1145                         goto out;
1146                 }
1147
1148                 spin_lock_irqsave(&s->lock, flags);
1149                 db->count -= cnt;
1150                 db->nextOut += cnt;
1151                 if (db->nextOut >= db->rawbuf + db->dmasize)
1152                         db->nextOut -= db->dmasize;
1153                 spin_unlock_irqrestore(&s->lock, flags);
1154
1155                 count -= cnt;
1156                 usercnt = cnt / db->cnt_factor;
1157                 buffer += usercnt;
1158                 ret += usercnt;
1159         }                       // while (count > 0)
1160
1161 out:
1162         up(&s->sem);
1163 out2:
1164         remove_wait_queue(&db->wait, &wait);
1165         set_current_state(TASK_RUNNING);
1166         return ret;
1167 }
1168
1169 static ssize_t au1000_write(struct file *file, const char *buffer,
1170                             size_t count, loff_t * ppos)
1171 {
1172         struct au1000_state *s = (struct au1000_state *)file->private_data;
1173         struct dmabuf  *db = &s->dma_dac;
1174         DECLARE_WAITQUEUE(wait, current);
1175         ssize_t         ret = 0;
1176         unsigned long   flags;
1177         int             cnt, usercnt, avail;
1178
1179 #ifdef AU1000_VERBOSE_DEBUG
1180         dbg("write: count=%d", count);
1181 #endif
1182
1183         if (db->mapped)
1184                 return -ENXIO;
1185         if (!access_ok(VERIFY_READ, buffer, count))
1186                 return -EFAULT;
1187
1188         count *= db->cnt_factor;
1189
1190         down(&s->sem);
1191         add_wait_queue(&db->wait, &wait);
1192
1193         while (count > 0) {
1194                 // wait for space in playback buffer
1195                 do {
1196                         spin_lock_irqsave(&s->lock, flags);
1197                         avail = (int) db->dmasize - db->count;
1198                         if (avail <= 0)
1199                                 __set_current_state(TASK_INTERRUPTIBLE);
1200                         spin_unlock_irqrestore(&s->lock, flags);
1201                         if (avail <= 0) {
1202                                 if (file->f_flags & O_NONBLOCK) {
1203                                         if (!ret)
1204                                                 ret = -EAGAIN;
1205                                         goto out;
1206                                 }
1207                                 up(&s->sem);
1208                                 schedule();
1209                                 if (signal_pending(current)) {
1210                                         if (!ret)
1211                                                 ret = -ERESTARTSYS;
1212                                         goto out2;
1213                                 }
1214                                 down(&s->sem);
1215                         }
1216                 } while (avail <= 0);
1217
1218                 // copy from user to nextIn
1219                 if ((cnt = copy_dmabuf_user(db, (char *) buffer,
1220                                             count > avail ?
1221                                             avail : count, 0)) < 0) {
1222                         if (!ret)
1223                                 ret = -EFAULT;
1224                         goto out;
1225                 }
1226
1227                 spin_lock_irqsave(&s->lock, flags);
1228                 db->count += cnt;
1229                 db->nextIn += cnt;
1230                 if (db->nextIn >= db->rawbuf + db->dmasize)
1231                         db->nextIn -= db->dmasize;
1232                 spin_unlock_irqrestore(&s->lock, flags);
1233                 if (db->stopped)
1234                         start_dac(s);
1235
1236                 count -= cnt;
1237                 usercnt = cnt / db->cnt_factor;
1238                 buffer += usercnt;
1239                 ret += usercnt;
1240         }                       // while (count > 0)
1241
1242 out:
1243         up(&s->sem);
1244 out2:
1245         remove_wait_queue(&db->wait, &wait);
1246         set_current_state(TASK_RUNNING);
1247         return ret;
1248 }
1249
1250
1251 /* No kernel lock - we have our own spinlock */
1252 static unsigned int au1000_poll(struct file *file,
1253                                 struct poll_table_struct *wait)
1254 {
1255         struct au1000_state *s = (struct au1000_state *)file->private_data;
1256         unsigned long   flags;
1257         unsigned int    mask = 0;
1258
1259         if (file->f_mode & FMODE_WRITE) {
1260                 if (!s->dma_dac.ready)
1261                         return 0;
1262                 poll_wait(file, &s->dma_dac.wait, wait);
1263         }
1264         if (file->f_mode & FMODE_READ) {
1265                 if (!s->dma_adc.ready)
1266                         return 0;
1267                 poll_wait(file, &s->dma_adc.wait, wait);
1268         }
1269
1270         spin_lock_irqsave(&s->lock, flags);
1271
1272         if (file->f_mode & FMODE_READ) {
1273                 if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
1274                         mask |= POLLIN | POLLRDNORM;
1275         }
1276         if (file->f_mode & FMODE_WRITE) {
1277                 if (s->dma_dac.mapped) {
1278                         if (s->dma_dac.count >=
1279                             (signed)s->dma_dac.dma_fragsize)
1280                                 mask |= POLLOUT | POLLWRNORM;
1281                 } else {
1282                         if ((signed) s->dma_dac.dmasize >=
1283                             s->dma_dac.count + (signed)s->dma_dac.dma_fragsize)
1284                                 mask |= POLLOUT | POLLWRNORM;
1285                 }
1286         }
1287         spin_unlock_irqrestore(&s->lock, flags);
1288         return mask;
1289 }
1290
1291 static int au1000_mmap(struct file *file, struct vm_area_struct *vma)
1292 {
1293         struct au1000_state *s = (struct au1000_state *)file->private_data;
1294         struct dmabuf  *db;
1295         unsigned long   size;
1296         int ret = 0;
1297
1298         dbg("%s", __FUNCTION__);
1299
1300         lock_kernel();
1301         down(&s->sem);
1302         if (vma->vm_flags & VM_WRITE)
1303                 db = &s->dma_dac;
1304         else if (vma->vm_flags & VM_READ)
1305                 db = &s->dma_adc;
1306         else {
1307                 ret = -EINVAL;
1308                 goto out;
1309         }
1310         if (vma->vm_pgoff != 0) {
1311                 ret = -EINVAL;
1312                 goto out;
1313         }
1314         size = vma->vm_end - vma->vm_start;
1315         if (size > (PAGE_SIZE << db->buforder)) {
1316                 ret = -EINVAL;
1317                 goto out;
1318         }
1319         if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(db->rawbuf),
1320                              size, vma->vm_page_prot)) {
1321                 ret = -EAGAIN;
1322                 goto out;
1323         }
1324         vma->vm_flags &= ~VM_IO;
1325         db->mapped = 1;
1326 out:
1327         up(&s->sem);
1328         unlock_kernel();
1329         return ret;
1330 }
1331
1332
1333 #ifdef AU1000_VERBOSE_DEBUG
1334 static struct ioctl_str_t {
1335         unsigned int    cmd;
1336         const char     *str;
1337 } ioctl_str[] = {
1338         {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1339         {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1340         {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1341         {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1342         {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1343         {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1344         {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1345         {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1346         {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1347         {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1348         {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1349         {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1350         {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1351         {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1352         {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1353         {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1354         {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1355         {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1356         {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1357         {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1358         {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1359         {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1360         {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1361         {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1362         {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1363         {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1364         {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1365         {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1366         {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1367         {OSS_GETVERSION, "OSS_GETVERSION"},
1368         {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1369         {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1370         {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1371         {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1372 };
1373 #endif
1374
1375 // Need to hold a spin-lock before calling this!
1376 static int dma_count_done(struct dmabuf *db)
1377 {
1378         if (db->stopped)
1379                 return 0;
1380
1381         return db->dma_fragsize - get_dma_residue(db->dmanr);
1382 }
1383
1384
1385 static int au1000_ioctl(struct inode *inode, struct file *file,
1386                         unsigned int cmd, unsigned long arg)
1387 {
1388         struct au1000_state *s = (struct au1000_state *)file->private_data;
1389         unsigned long   flags;
1390         audio_buf_info  abinfo;
1391         count_info      cinfo;
1392         int             count;
1393         int             val, mapped, ret, diff;
1394
1395         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1396                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1397
1398 #ifdef AU1000_VERBOSE_DEBUG
1399         for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) {
1400                 if (ioctl_str[count].cmd == cmd)
1401                         break;
1402         }
1403         if (count < sizeof(ioctl_str) / sizeof(ioctl_str[0]))
1404                 dbg("ioctl %s, arg=0x%lx", ioctl_str[count].str, arg);
1405         else
1406                 dbg("ioctl 0x%x unknown, arg=0x%lx", cmd, arg);
1407 #endif
1408
1409         switch (cmd) {
1410         case OSS_GETVERSION:
1411                 return put_user(SOUND_VERSION, (int *) arg);
1412
1413         case SNDCTL_DSP_SYNC:
1414                 if (file->f_mode & FMODE_WRITE)
1415                         return drain_dac(s, file->f_flags & O_NONBLOCK);
1416                 return 0;
1417
1418         case SNDCTL_DSP_SETDUPLEX:
1419                 return 0;
1420
1421         case SNDCTL_DSP_GETCAPS:
1422                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
1423                                 DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1424
1425         case SNDCTL_DSP_RESET:
1426                 if (file->f_mode & FMODE_WRITE) {
1427                         stop_dac(s);
1428                         synchronize_irq();
1429                         s->dma_dac.count = s->dma_dac.total_bytes = 0;
1430                         s->dma_dac.nextIn = s->dma_dac.nextOut =
1431                                 s->dma_dac.rawbuf;
1432                 }
1433                 if (file->f_mode & FMODE_READ) {
1434                         stop_adc(s);
1435                         synchronize_irq();
1436                         s->dma_adc.count = s->dma_adc.total_bytes = 0;
1437                         s->dma_adc.nextIn = s->dma_adc.nextOut =
1438                                 s->dma_adc.rawbuf;
1439                 }
1440                 return 0;
1441
1442         case SNDCTL_DSP_SPEED:
1443                 if (get_user(val, (int *) arg))
1444                         return -EFAULT;
1445                 if (val >= 0) {
1446                         if (file->f_mode & FMODE_READ) {
1447                                 stop_adc(s);
1448                                 set_adc_rate(s, val);
1449                         }
1450                         if (file->f_mode & FMODE_WRITE) {
1451                                 stop_dac(s);
1452                                 set_dac_rate(s, val);
1453                         }
1454                         if (s->open_mode & FMODE_READ)
1455                                 if ((ret = prog_dmabuf_adc(s)))
1456                                         return ret;
1457                         if (s->open_mode & FMODE_WRITE)
1458                                 if ((ret = prog_dmabuf_dac(s)))
1459                                         return ret;
1460                 }
1461                 return put_user((file->f_mode & FMODE_READ) ?
1462                                 s->dma_adc.sample_rate :
1463                                 s->dma_dac.sample_rate,
1464                                 (int *)arg);
1465
1466         case SNDCTL_DSP_STEREO:
1467                 if (get_user(val, (int *) arg))
1468                         return -EFAULT;
1469                 if (file->f_mode & FMODE_READ) {
1470                         stop_adc(s);
1471                         s->dma_adc.num_channels = val ? 2 : 1;
1472                         if ((ret = prog_dmabuf_adc(s)))
1473                                 return ret;
1474                 }
1475                 if (file->f_mode & FMODE_WRITE) {
1476                         stop_dac(s);
1477                         s->dma_dac.num_channels = val ? 2 : 1;
1478                         if (s->codec_ext_caps & AC97_EXT_DACS) {
1479                                 // disable surround and center/lfe in AC'97
1480                                 u16 ext_stat = rdcodec(&s->codec,
1481                                                        AC97_EXTENDED_STATUS);
1482                                 wrcodec(&s->codec, AC97_EXTENDED_STATUS,
1483                                         ext_stat | (AC97_EXTSTAT_PRI |
1484                                                     AC97_EXTSTAT_PRJ |
1485                                                     AC97_EXTSTAT_PRK));
1486                         }
1487                         if ((ret = prog_dmabuf_dac(s)))
1488                                 return ret;
1489                 }
1490                 return 0;
1491
1492         case SNDCTL_DSP_CHANNELS:
1493                 if (get_user(val, (int *) arg))
1494                         return -EFAULT;
1495                 if (val != 0) {
1496                         if (file->f_mode & FMODE_READ) {
1497                                 if (val < 0 || val > 2)
1498                                         return -EINVAL;
1499                                 stop_adc(s);
1500                                 s->dma_adc.num_channels = val;
1501                                 if ((ret = prog_dmabuf_adc(s)))
1502                                         return ret;
1503                         }
1504                         if (file->f_mode & FMODE_WRITE) {
1505                                 switch (val) {
1506                                 case 1:
1507                                 case 2:
1508                                         break;
1509                                 case 3:
1510                                 case 5:
1511                                         return -EINVAL;
1512                                 case 4:
1513                                         if (!(s->codec_ext_caps &
1514                                               AC97_EXTID_SDAC))
1515                                                 return -EINVAL;
1516                                         break;
1517                                 case 6:
1518                                         if ((s->codec_ext_caps &
1519                                              AC97_EXT_DACS) != AC97_EXT_DACS)
1520                                                 return -EINVAL;
1521                                         break;
1522                                 default:
1523                                         return -EINVAL;
1524                                 }
1525
1526                                 stop_dac(s);
1527                                 if (val <= 2 &&
1528                                     (s->codec_ext_caps & AC97_EXT_DACS)) {
1529                                         // disable surround and center/lfe
1530                                         // channels in AC'97
1531                                         u16             ext_stat =
1532                                                 rdcodec(&s->codec,
1533                                                         AC97_EXTENDED_STATUS);
1534                                         wrcodec(&s->codec,
1535                                                 AC97_EXTENDED_STATUS,
1536                                                 ext_stat | (AC97_EXTSTAT_PRI |
1537                                                             AC97_EXTSTAT_PRJ |
1538                                                             AC97_EXTSTAT_PRK));
1539                                 } else if (val >= 4) {
1540                                         // enable surround, center/lfe
1541                                         // channels in AC'97
1542                                         u16             ext_stat =
1543                                                 rdcodec(&s->codec,
1544                                                         AC97_EXTENDED_STATUS);
1545                                         ext_stat &= ~AC97_EXTSTAT_PRJ;
1546                                         if (val == 6)
1547                                                 ext_stat &=
1548                                                         ~(AC97_EXTSTAT_PRI |
1549                                                           AC97_EXTSTAT_PRK);
1550                                         wrcodec(&s->codec,
1551                                                 AC97_EXTENDED_STATUS,
1552                                                 ext_stat);
1553                                 }
1554
1555                                 s->dma_dac.num_channels = val;
1556                                 if ((ret = prog_dmabuf_dac(s)))
1557                                         return ret;
1558                         }
1559                 }
1560                 return put_user(val, (int *) arg);
1561
1562         case SNDCTL_DSP_GETFMTS:        /* Returns a mask */
1563                 return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
1564
1565         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */
1566                 if (get_user(val, (int *) arg))
1567                         return -EFAULT;
1568                 if (val != AFMT_QUERY) {
1569                         if (file->f_mode & FMODE_READ) {
1570                                 stop_adc(s);
1571                                 if (val == AFMT_S16_LE)
1572                                         s->dma_adc.sample_size = 16;
1573                                 else {
1574                                         val = AFMT_U8;
1575                                         s->dma_adc.sample_size = 8;
1576                                 }
1577                                 if ((ret = prog_dmabuf_adc(s)))
1578                                         return ret;
1579                         }
1580                         if (file->f_mode & FMODE_WRITE) {
1581                                 stop_dac(s);
1582                                 if (val == AFMT_S16_LE)
1583                                         s->dma_dac.sample_size = 16;
1584                                 else {
1585                                         val = AFMT_U8;
1586                                         s->dma_dac.sample_size = 8;
1587                                 }
1588                                 if ((ret = prog_dmabuf_dac(s)))
1589                                         return ret;
1590                         }
1591                 } else {
1592                         if (file->f_mode & FMODE_READ)
1593                                 val = (s->dma_adc.sample_size == 16) ?
1594                                         AFMT_S16_LE : AFMT_U8;
1595                         else
1596                                 val = (s->dma_dac.sample_size == 16) ?
1597                                         AFMT_S16_LE : AFMT_U8;
1598                 }
1599                 return put_user(val, (int *) arg);
1600
1601         case SNDCTL_DSP_POST:
1602                 return 0;
1603
1604         case SNDCTL_DSP_GETTRIGGER:
1605                 val = 0;
1606                 spin_lock_irqsave(&s->lock, flags);
1607                 if (file->f_mode & FMODE_READ && !s->dma_adc.stopped)
1608                         val |= PCM_ENABLE_INPUT;
1609                 if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped)
1610                         val |= PCM_ENABLE_OUTPUT;
1611                 spin_unlock_irqrestore(&s->lock, flags);
1612                 return put_user(val, (int *) arg);
1613
1614         case SNDCTL_DSP_SETTRIGGER:
1615                 if (get_user(val, (int *) arg))
1616                         return -EFAULT;
1617                 if (file->f_mode & FMODE_READ) {
1618                         if (val & PCM_ENABLE_INPUT)
1619                                 start_adc(s);
1620                         else
1621                                 stop_adc(s);
1622                 }
1623                 if (file->f_mode & FMODE_WRITE) {
1624                         if (val & PCM_ENABLE_OUTPUT)
1625                                 start_dac(s);
1626                         else
1627                                 stop_dac(s);
1628                 }
1629                 return 0;
1630
1631         case SNDCTL_DSP_GETOSPACE:
1632                 if (!(file->f_mode & FMODE_WRITE))
1633                         return -EINVAL;
1634                 abinfo.fragsize = s->dma_dac.fragsize;
1635                 spin_lock_irqsave(&s->lock, flags);
1636                 count = s->dma_dac.count;
1637                 count -= dma_count_done(&s->dma_dac);
1638                 spin_unlock_irqrestore(&s->lock, flags);
1639                 if (count < 0)
1640                         count = 0;
1641                 abinfo.bytes = (s->dma_dac.dmasize - count) /
1642                         s->dma_dac.cnt_factor;
1643                 abinfo.fragstotal = s->dma_dac.numfrag;
1644                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1645 #ifdef AU1000_VERBOSE_DEBUG
1646                 dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
1647 #endif
1648                 return copy_to_user((void *) arg, &abinfo,
1649                                     sizeof(abinfo)) ? -EFAULT : 0;
1650
1651         case SNDCTL_DSP_GETISPACE:
1652                 if (!(file->f_mode & FMODE_READ))
1653                         return -EINVAL;
1654                 abinfo.fragsize = s->dma_adc.fragsize;
1655                 spin_lock_irqsave(&s->lock, flags);
1656                 count = s->dma_adc.count;
1657                 count += dma_count_done(&s->dma_adc);
1658                 spin_unlock_irqrestore(&s->lock, flags);
1659                 if (count < 0)
1660                         count = 0;
1661                 abinfo.bytes = count / s->dma_adc.cnt_factor;
1662                 abinfo.fragstotal = s->dma_adc.numfrag;
1663                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1664                 return copy_to_user((void *) arg, &abinfo,
1665                                     sizeof(abinfo)) ? -EFAULT : 0;
1666
1667         case SNDCTL_DSP_NONBLOCK:
1668                 file->f_flags |= O_NONBLOCK;
1669                 return 0;
1670
1671         case SNDCTL_DSP_GETODELAY:
1672                 if (!(file->f_mode & FMODE_WRITE))
1673                         return -EINVAL;
1674                 spin_lock_irqsave(&s->lock, flags);
1675                 count = s->dma_dac.count;
1676                 count -= dma_count_done(&s->dma_dac);
1677                 spin_unlock_irqrestore(&s->lock, flags);
1678                 if (count < 0)
1679                         count = 0;
1680                 count /= s->dma_dac.cnt_factor;
1681                 return put_user(count, (int *) arg);
1682
1683         case SNDCTL_DSP_GETIPTR:
1684                 if (!(file->f_mode & FMODE_READ))
1685                         return -EINVAL;
1686                 spin_lock_irqsave(&s->lock, flags);
1687                 cinfo.bytes = s->dma_adc.total_bytes;
1688                 count = s->dma_adc.count;
1689                 if (!s->dma_adc.stopped) {
1690                         diff = dma_count_done(&s->dma_adc);
1691                         count += diff;
1692                         cinfo.bytes += diff;
1693                         cinfo.ptr =  virt_to_phys(s->dma_adc.nextIn) + diff -
1694                                 s->dma_adc.dmaaddr;
1695                 } else
1696                         cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) -
1697                                 s->dma_adc.dmaaddr;
1698                 if (s->dma_adc.mapped)
1699                         s->dma_adc.count &= (s->dma_adc.dma_fragsize-1);
1700                 spin_unlock_irqrestore(&s->lock, flags);
1701                 if (count < 0)
1702                         count = 0;
1703                 cinfo.blocks = count >> s->dma_adc.fragshift;
1704                 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1705
1706         case SNDCTL_DSP_GETOPTR:
1707                 if (!(file->f_mode & FMODE_READ))
1708                         return -EINVAL;
1709                 spin_lock_irqsave(&s->lock, flags);
1710                 cinfo.bytes = s->dma_dac.total_bytes;
1711                 count = s->dma_dac.count;
1712                 if (!s->dma_dac.stopped) {
1713                         diff = dma_count_done(&s->dma_dac);
1714                         count -= diff;
1715                         cinfo.bytes += diff;
1716                         cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff -
1717                                 s->dma_dac.dmaaddr;
1718                 } else
1719                         cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) -
1720                                 s->dma_dac.dmaaddr;
1721                 if (s->dma_dac.mapped)
1722                         s->dma_dac.count &= (s->dma_dac.dma_fragsize-1);
1723                 spin_unlock_irqrestore(&s->lock, flags);
1724                 if (count < 0)
1725                         count = 0;
1726                 cinfo.blocks = count >> s->dma_dac.fragshift;
1727                 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1728
1729         case SNDCTL_DSP_GETBLKSIZE:
1730                 if (file->f_mode & FMODE_WRITE)
1731                         return put_user(s->dma_dac.fragsize, (int *) arg);
1732                 else
1733                         return put_user(s->dma_adc.fragsize, (int *) arg);
1734
1735         case SNDCTL_DSP_SETFRAGMENT:
1736                 if (get_user(val, (int *) arg))
1737                         return -EFAULT;
1738                 if (file->f_mode & FMODE_READ) {
1739                         stop_adc(s);
1740                         s->dma_adc.ossfragshift = val & 0xffff;
1741                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1742                         if (s->dma_adc.ossfragshift < 4)
1743                                 s->dma_adc.ossfragshift = 4;
1744                         if (s->dma_adc.ossfragshift > 15)
1745                                 s->dma_adc.ossfragshift = 15;
1746                         if (s->dma_adc.ossmaxfrags < 4)
1747                                 s->dma_adc.ossmaxfrags = 4;
1748                         if ((ret = prog_dmabuf_adc(s)))
1749                                 return ret;
1750                 }
1751                 if (file->f_mode & FMODE_WRITE) {
1752                         stop_dac(s);
1753                         s->dma_dac.ossfragshift = val & 0xffff;
1754                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1755                         if (s->dma_dac.ossfragshift < 4)
1756                                 s->dma_dac.ossfragshift = 4;
1757                         if (s->dma_dac.ossfragshift > 15)
1758                                 s->dma_dac.ossfragshift = 15;
1759                         if (s->dma_dac.ossmaxfrags < 4)
1760                                 s->dma_dac.ossmaxfrags = 4;
1761                         if ((ret = prog_dmabuf_dac(s)))
1762                                 return ret;
1763                 }
1764                 return 0;
1765
1766         case SNDCTL_DSP_SUBDIVIDE:
1767                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1768                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1769                         return -EINVAL;
1770                 if (get_user(val, (int *) arg))
1771                         return -EFAULT;
1772                 if (val != 1 && val != 2 && val != 4)
1773                         return -EINVAL;
1774                 if (file->f_mode & FMODE_READ) {
1775                         stop_adc(s);
1776                         s->dma_adc.subdivision = val;
1777                         if ((ret = prog_dmabuf_adc(s)))
1778                                 return ret;
1779                 }
1780                 if (file->f_mode & FMODE_WRITE) {
1781                         stop_dac(s);
1782                         s->dma_dac.subdivision = val;
1783                         if ((ret = prog_dmabuf_dac(s)))
1784                                 return ret;
1785                 }
1786                 return 0;
1787
1788         case SOUND_PCM_READ_RATE:
1789                 return put_user((file->f_mode & FMODE_READ) ?
1790                                 s->dma_adc.sample_rate :
1791                                 s->dma_dac.sample_rate,
1792                                 (int *)arg);
1793
1794         case SOUND_PCM_READ_CHANNELS:
1795                 if (file->f_mode & FMODE_READ)
1796                         return put_user(s->dma_adc.num_channels, (int *)arg);
1797                 else
1798                         return put_user(s->dma_dac.num_channels, (int *)arg);
1799
1800         case SOUND_PCM_READ_BITS:
1801                 if (file->f_mode & FMODE_READ)
1802                         return put_user(s->dma_adc.sample_size, (int *)arg);
1803                 else
1804                         return put_user(s->dma_dac.sample_size, (int *)arg);
1805
1806         case SOUND_PCM_WRITE_FILTER:
1807         case SNDCTL_DSP_SETSYNCRO:
1808         case SOUND_PCM_READ_FILTER:
1809                 return -EINVAL;
1810         }
1811
1812         return mixdev_ioctl(&s->codec, cmd, arg);
1813 }
1814
1815
1816 static int  au1000_open(struct inode *inode, struct file *file)
1817 {
1818         int             minor = iminor(inode);
1819         DECLARE_WAITQUEUE(wait, current);
1820         struct au1000_state *s = &au1000_state;
1821         int             ret;
1822
1823 #ifdef AU1000_VERBOSE_DEBUG
1824         if (file->f_flags & O_NONBLOCK)
1825                 dbg("%s: non-blocking", __FUNCTION__);
1826         else
1827                 dbg("%s: blocking", __FUNCTION__);
1828 #endif
1829
1830         file->private_data = s;
1831         /* wait for device to become free */
1832         down(&s->open_sem);
1833         while (s->open_mode & file->f_mode) {
1834                 if (file->f_flags & O_NONBLOCK) {
1835                         up(&s->open_sem);
1836                         return -EBUSY;
1837                 }
1838                 add_wait_queue(&s->open_wait, &wait);
1839                 __set_current_state(TASK_INTERRUPTIBLE);
1840                 up(&s->open_sem);
1841                 schedule();
1842                 remove_wait_queue(&s->open_wait, &wait);
1843                 set_current_state(TASK_RUNNING);
1844                 if (signal_pending(current))
1845                         return -ERESTARTSYS;
1846                 down(&s->open_sem);
1847         }
1848
1849         stop_dac(s);
1850         stop_adc(s);
1851
1852         if (file->f_mode & FMODE_READ) {
1853                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
1854                         s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
1855                 s->dma_adc.num_channels = 1;
1856                 s->dma_adc.sample_size = 8;
1857                 set_adc_rate(s, 8000);
1858                 if ((minor & 0xf) == SND_DEV_DSP16)
1859                         s->dma_adc.sample_size = 16;
1860         }
1861
1862         if (file->f_mode & FMODE_WRITE) {
1863                 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
1864                         s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
1865                 s->dma_dac.num_channels = 1;
1866                 s->dma_dac.sample_size = 8;
1867                 set_dac_rate(s, 8000);
1868                 if ((minor & 0xf) == SND_DEV_DSP16)
1869                         s->dma_dac.sample_size = 16;
1870         }
1871
1872         if (file->f_mode & FMODE_READ) {
1873                 if ((ret = prog_dmabuf_adc(s)))
1874                         return ret;
1875         }
1876         if (file->f_mode & FMODE_WRITE) {
1877                 if ((ret = prog_dmabuf_dac(s)))
1878                         return ret;
1879         }
1880
1881         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1882         up(&s->open_sem);
1883         init_MUTEX(&s->sem);
1884         return nonseekable_open(inode, file);
1885 }
1886
1887 static int au1000_release(struct inode *inode, struct file *file)
1888 {
1889         struct au1000_state *s = (struct au1000_state *)file->private_data;
1890
1891         lock_kernel();
1892
1893         if (file->f_mode & FMODE_WRITE) {
1894                 unlock_kernel();
1895                 drain_dac(s, file->f_flags & O_NONBLOCK);
1896                 lock_kernel();
1897         }
1898
1899         down(&s->open_sem);
1900         if (file->f_mode & FMODE_WRITE) {
1901                 stop_dac(s);
1902                 dealloc_dmabuf(s, &s->dma_dac);
1903         }
1904         if (file->f_mode & FMODE_READ) {
1905                 stop_adc(s);
1906                 dealloc_dmabuf(s, &s->dma_adc);
1907         }
1908         s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE));
1909         up(&s->open_sem);
1910         wake_up(&s->open_wait);
1911         unlock_kernel();
1912         return 0;
1913 }
1914
1915 static /*const */ struct file_operations au1000_audio_fops = {
1916         .owner          = THIS_MODULE,
1917         .llseek         = au1000_llseek,
1918         .read           = au1000_read,
1919         .write          = au1000_write,
1920         .poll           = au1000_poll,
1921         .ioctl          = au1000_ioctl,
1922         .mmap           = au1000_mmap,
1923         .open           = au1000_open,
1924         .release        = au1000_release,
1925 };
1926
1927
1928 /* --------------------------------------------------------------------- */
1929
1930
1931 /* --------------------------------------------------------------------- */
1932
1933 /*
1934  * for debugging purposes, we'll create a proc device that dumps the
1935  * CODEC chipstate
1936  */
1937
1938 #ifdef AU1000_DEBUG
1939 static int proc_au1000_dump(char *buf, char **start, off_t fpos,
1940                             int length, int *eof, void *data)
1941 {
1942         struct au1000_state *s = &au1000_state;
1943         int             cnt, len = 0;
1944
1945         /* print out header */
1946         len += sprintf(buf + len, "\n\t\tAU1000 Audio Debug\n\n");
1947
1948         // print out digital controller state
1949         len += sprintf(buf + len, "AU1000 Audio Controller registers\n");
1950         len += sprintf(buf + len, "---------------------------------\n");
1951         len += sprintf (buf + len, "AC97C_CONFIG = %08x\n",
1952                         au_readl(AC97C_CONFIG));
1953         len += sprintf (buf + len, "AC97C_STATUS = %08x\n",
1954                         au_readl(AC97C_STATUS));
1955         len += sprintf (buf + len, "AC97C_CNTRL  = %08x\n",
1956                         au_readl(AC97C_CNTRL));
1957
1958         /* print out CODEC state */
1959         len += sprintf(buf + len, "\nAC97 CODEC registers\n");
1960         len += sprintf(buf + len, "----------------------\n");
1961         for (cnt = 0; cnt <= 0x7e; cnt += 2)
1962                 len += sprintf(buf + len, "reg %02x = %04x\n",
1963                                cnt, rdcodec(&s->codec, cnt));
1964
1965         if (fpos >= len) {
1966                 *start = buf;
1967                 *eof = 1;
1968                 return 0;
1969         }
1970         *start = buf + fpos;
1971         if ((len -= fpos) > length)
1972                 return length;
1973         *eof = 1;
1974         return len;
1975
1976 }
1977 #endif /* AU1000_DEBUG */
1978
1979 /* --------------------------------------------------------------------- */
1980
1981 MODULE_AUTHOR("Monta Vista Software, stevel@mvista.com");
1982 MODULE_DESCRIPTION("Au1000 Audio Driver");
1983
1984 /* --------------------------------------------------------------------- */
1985
1986 static int __devinit au1000_probe(void)
1987 {
1988         struct au1000_state *s = &au1000_state;
1989         int             val;
1990 #ifdef AU1000_DEBUG
1991         char            proc_str[80];
1992 #endif
1993
1994         memset(s, 0, sizeof(struct au1000_state));
1995
1996         init_waitqueue_head(&s->dma_adc.wait);
1997         init_waitqueue_head(&s->dma_dac.wait);
1998         init_waitqueue_head(&s->open_wait);
1999         init_MUTEX(&s->open_sem);
2000         spin_lock_init(&s->lock);
2001         s->codec.private_data = s;
2002         s->codec.id = 0;
2003         s->codec.codec_read = rdcodec;
2004         s->codec.codec_write = wrcodec;
2005         s->codec.codec_wait = waitcodec;
2006
2007         if (!request_mem_region(CPHYSADDR(AC97C_CONFIG),
2008                             0x14, AU1000_MODULE_NAME)) {
2009                 err("AC'97 ports in use");
2010                 return -1;
2011         }
2012         // Allocate the DMA Channels
2013         if ((s->dma_dac.dmanr = request_au1000_dma(DMA_ID_AC97C_TX,
2014                                                    "audio DAC",
2015                                                    dac_dma_interrupt,
2016                                                    SA_INTERRUPT, s)) < 0) {
2017                 err("Can't get DAC DMA");
2018                 goto err_dma1;
2019         }
2020         if ((s->dma_adc.dmanr = request_au1000_dma(DMA_ID_AC97C_RX,
2021                                                    "audio ADC",
2022                                                    adc_dma_interrupt,
2023                                                    SA_INTERRUPT, s)) < 0) {
2024                 err("Can't get ADC DMA");
2025                 goto err_dma2;
2026         }
2027
2028         info("DAC: DMA%d/IRQ%d, ADC: DMA%d/IRQ%d",
2029              s->dma_dac.dmanr, get_dma_done_irq(s->dma_dac.dmanr),
2030              s->dma_adc.dmanr, get_dma_done_irq(s->dma_adc.dmanr));
2031
2032         // enable DMA coherency in read/write DMA channels
2033         set_dma_mode(s->dma_dac.dmanr,
2034                      get_dma_mode(s->dma_dac.dmanr) & ~DMA_NC);
2035         set_dma_mode(s->dma_adc.dmanr,
2036                      get_dma_mode(s->dma_adc.dmanr) & ~DMA_NC);
2037
2038         /* register devices */
2039
2040         if ((s->dev_audio = register_sound_dsp(&au1000_audio_fops, -1)) < 0)
2041                 goto err_dev1;
2042         if ((s->codec.dev_mixer =
2043              register_sound_mixer(&au1000_mixer_fops, -1)) < 0)
2044                 goto err_dev2;
2045
2046 #ifdef AU1000_DEBUG
2047         /* intialize the debug proc device */
2048         s->ps = create_proc_read_entry(AU1000_MODULE_NAME, 0, NULL,
2049                                        proc_au1000_dump, NULL);
2050 #endif /* AU1000_DEBUG */
2051
2052         // configure pins for AC'97
2053         au_writel(au_readl(SYS_PINFUNC) & ~0x02, SYS_PINFUNC);
2054
2055         // Assert reset for 10msec to the AC'97 controller, and enable clock
2056         au_writel(AC97C_RS | AC97C_CE, AC97C_CNTRL);
2057         au1000_delay(10);
2058         au_writel(AC97C_CE, AC97C_CNTRL);
2059         au1000_delay(10);       // wait for clock to stabilize
2060
2061         /* cold reset the AC'97 */
2062         au_writel(AC97C_RESET, AC97C_CONFIG);
2063         au1000_delay(10);
2064         au_writel(0, AC97C_CONFIG);
2065         /* need to delay around 500msec(bleech) to give
2066            some CODECs enough time to wakeup */
2067         au1000_delay(500);
2068
2069         /* warm reset the AC'97 to start the bitclk */
2070         au_writel(AC97C_SG | AC97C_SYNC, AC97C_CONFIG);
2071         udelay(100);
2072         au_writel(0, AC97C_CONFIG);
2073
2074         /* codec init */
2075         if (!ac97_probe_codec(&s->codec))
2076                 goto err_dev3;
2077
2078         s->codec_base_caps = rdcodec(&s->codec, AC97_RESET);
2079         s->codec_ext_caps = rdcodec(&s->codec, AC97_EXTENDED_ID);
2080         info("AC'97 Base/Extended ID = %04x/%04x",
2081              s->codec_base_caps, s->codec_ext_caps);
2082
2083         /*
2084          * On the Pb1000, audio playback is on the AUX_OUT
2085          * channel (which defaults to LNLVL_OUT in AC'97
2086          * rev 2.2) so make sure this channel is listed
2087          * as supported (soundcard.h calls this channel
2088          * ALTPCM). ac97_codec.c does not handle detection
2089          * of this channel correctly.
2090          */
2091         s->codec.supported_mixers |= SOUND_MASK_ALTPCM;
2092         /*
2093          * Now set AUX_OUT's default volume.
2094          */
2095         val = 0x4343;
2096         mixdev_ioctl(&s->codec, SOUND_MIXER_WRITE_ALTPCM,
2097                      (unsigned long) &val);
2098
2099         if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
2100                 // codec does not support VRA
2101                 s->no_vra = 1;
2102         } else if (!vra) {
2103                 // Boot option says disable VRA
2104                 u16 ac97_extstat = rdcodec(&s->codec, AC97_EXTENDED_STATUS);
2105                 wrcodec(&s->codec, AC97_EXTENDED_STATUS,
2106                         ac97_extstat & ~AC97_EXTSTAT_VRA);
2107                 s->no_vra = 1;
2108         }
2109         if (s->no_vra)
2110                 info("no VRA, interpolating and decimating");
2111
2112         /* set mic to be the recording source */
2113         val = SOUND_MASK_MIC;
2114         mixdev_ioctl(&s->codec, SOUND_MIXER_WRITE_RECSRC,
2115                      (unsigned long) &val);
2116
2117 #ifdef AU1000_DEBUG
2118         sprintf(proc_str, "driver/%s/%d/ac97", AU1000_MODULE_NAME,
2119                 s->codec.id);
2120         s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
2121                                              ac97_read_proc, &s->codec);
2122 #endif
2123
2124 #ifdef CONFIG_MIPS_XXS1500
2125         /* deassert eapd */
2126         wrcodec(&s->codec, AC97_POWER_CONTROL,
2127                         rdcodec(&s->codec, AC97_POWER_CONTROL) & ~0x8000);
2128         /* mute a number of signals which seem to be causing problems
2129          * if not muted.
2130          */
2131         wrcodec(&s->codec, AC97_PCBEEP_VOL, 0x8000);
2132         wrcodec(&s->codec, AC97_PHONE_VOL, 0x8008);
2133         wrcodec(&s->codec, AC97_MIC_VOL, 0x8008);
2134         wrcodec(&s->codec, AC97_LINEIN_VOL, 0x8808);
2135         wrcodec(&s->codec, AC97_CD_VOL, 0x8808);
2136         wrcodec(&s->codec, AC97_VIDEO_VOL, 0x8808);
2137         wrcodec(&s->codec, AC97_AUX_VOL, 0x8808);
2138         wrcodec(&s->codec, AC97_PCMOUT_VOL, 0x0808);
2139         wrcodec(&s->codec, AC97_GENERAL_PURPOSE, 0x2000);
2140 #endif
2141
2142         return 0;
2143
2144  err_dev3:
2145         unregister_sound_mixer(s->codec.dev_mixer);
2146  err_dev2:
2147         unregister_sound_dsp(s->dev_audio);
2148  err_dev1:
2149         free_au1000_dma(s->dma_adc.dmanr);
2150  err_dma2:
2151         free_au1000_dma(s->dma_dac.dmanr);
2152  err_dma1:
2153         release_mem_region(CPHYSADDR(AC97C_CONFIG), 0x14);
2154         return -1;
2155 }
2156
2157 static void au1000_remove(void)
2158 {
2159         struct au1000_state *s = &au1000_state;
2160
2161         if (!s)
2162                 return;
2163 #ifdef AU1000_DEBUG
2164         if (s->ps)
2165                 remove_proc_entry(AU1000_MODULE_NAME, NULL);
2166 #endif /* AU1000_DEBUG */
2167         synchronize_irq();
2168         free_au1000_dma(s->dma_adc.dmanr);
2169         free_au1000_dma(s->dma_dac.dmanr);
2170         release_mem_region(CPHYSADDR(AC97C_CONFIG), 0x14);
2171         unregister_sound_dsp(s->dev_audio);
2172         unregister_sound_mixer(s->codec.dev_mixer);
2173 }
2174
2175 static int __init init_au1000(void)
2176 {
2177         info("stevel@mvista.com, built " __TIME__ " on " __DATE__);
2178         return au1000_probe();
2179 }
2180
2181 static void __exit cleanup_au1000(void)
2182 {
2183         info("unloading");
2184         au1000_remove();
2185 }
2186
2187 module_init(init_au1000);
2188 module_exit(cleanup_au1000);
2189
2190 /* --------------------------------------------------------------------- */
2191
2192 #ifndef MODULE
2193
2194 static int __init au1000_setup(char *options)
2195 {
2196         char           *this_opt;
2197
2198         if (!options || !*options)
2199                 return 0;
2200
2201         while ((this_opt = strsep(&options, ","))) {
2202                 if (!*this_opt)
2203                         continue;
2204                 if (!strncmp(this_opt, "vra", 3)) {
2205                         vra = 1;
2206                 }
2207         }
2208
2209         return 1;
2210 }
2211
2212 __setup("au1000_audio=", au1000_setup);
2213
2214 #endif /* MODULE */