2 * Low-Level PCI Support for SGI Visual Workstation
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/kernel.h>
9 #include <linux/init.h>
11 #include <asm/setup.h>
12 #include <asm/visws/cobalt.h>
13 #include <asm/visws/lithium.h>
17 static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; }
18 static void pci_visws_disable_irq(struct pci_dev *dev) { }
20 /* int (*pcibios_enable_irq)(struct pci_dev *dev) = &pci_visws_enable_irq; */
21 /* void (*pcibios_disable_irq)(struct pci_dev *dev) = &pci_visws_disable_irq; */
23 /* void __init pcibios_penalize_isa_irq(int irq, int active) {} */
26 unsigned int pci_bus0, pci_bus1;
28 static inline u8 bridge_swizzle(u8 pin, u8 slot)
30 return (((pin - 1) + slot) % 4) + 1;
33 static u8 __init visws_swizzle(struct pci_dev *dev, u8 *pinp)
37 while (dev->bus->self) { /* Move up the chain of bridges. */
38 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
43 return PCI_SLOT(dev->devfn);
46 static int __init visws_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
48 int irq, bus = dev->bus->number;
52 /* Nothing useful at PIIX4 pin 1 */
53 if (bus == pci_bus0 && slot == 4 && pin == 0)
56 /* PIIX4 USB is on Bus 0, Slot 4, Line 3 */
57 if (bus == pci_bus0 && slot == 4 && pin == 3) {
58 irq = CO_IRQ(CO_APIC_PIIX4_USB);
62 /* First pin spread down 1 APIC entry per slot */
64 irq = CO_IRQ((bus == pci_bus0 ? CO_APIC_PCIB_BASE0 :
65 CO_APIC_PCIA_BASE0) + slot);
69 /* lines 1,2,3 from any slot is shared in this twirly pattern */
70 if (bus == pci_bus1) {
71 /* lines 1-3 from devices 0 1 rotate over 2 apic entries */
72 irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((slot + (pin - 1)) % 2));
73 } else { /* bus == pci_bus0 */
74 /* lines 1-3 from devices 0-3 rotate over 3 apic entries */
76 slot = 3; /* same pattern */
77 irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((3 - slot) + (pin - 1) % 3));
80 printk(KERN_DEBUG "PCI: Bus %d Slot %d Line %d -> IRQ %d\n", bus, slot, pin, irq);
84 void __init pcibios_update_irq(struct pci_dev *dev, int irq)
86 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
89 static int __init pci_visws_init(void)
91 /* The VISWS supports configuration access type 1 only */
92 pci_probe = (pci_probe | PCI_PROBE_CONF1) &
93 ~(PCI_PROBE_BIOS | PCI_PROBE_CONF2);
95 pci_bus0 = li_pcib_read16(LI_PCI_BUSNUM) & 0xff;
96 pci_bus1 = li_pcia_read16(LI_PCI_BUSNUM) & 0xff;
98 printk(KERN_INFO "PCI: Lithium bridge A bus: %u, "
99 "bridge B (PIIX4) bus: %u\n", pci_bus1, pci_bus0);
101 raw_pci_ops = &pci_direct_conf1;
102 pci_scan_bus_with_sysdata(pci_bus0);
103 pci_scan_bus_with_sysdata(pci_bus1);
104 pci_fixup_irqs(visws_swizzle, visws_map_irq);
105 pcibios_resource_survey();
109 static __init int pci_subsys_init(void)
114 pcibios_enable_irq = &pci_visws_enable_irq;
115 pcibios_disable_irq = &pci_visws_disable_irq;
122 subsys_initcall(pci_subsys_init);