2 * Copyright (C) 2005 Intel Corporation
3 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
4 * - Added _PDC for SMP C-states on Intel CPUs
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/init.h>
10 #include <linux/acpi.h>
11 #include <linux/cpu.h>
12 #include <linux/sched.h>
14 #include <acpi/processor.h>
18 * Initialize bm_flags based on the CPU cache properties
19 * On SMP it depends on cache configuration
20 * - When cache is not shared among all CPUs, we flush cache
22 * - When cache is shared among all CPUs, we use bm_check
23 * mechanism as in UP case
25 * This routine is called only after all the CPUs are online
27 void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
30 struct cpuinfo_x86 *c = &cpu_data(cpu);
33 if (num_online_cpus() == 1)
35 else if (c->x86_vendor == X86_VENDOR_INTEL) {
37 * Today all CPUs that support C3 share cache.
38 * TBD: This needs to look at cache shared map, once
39 * multi-core detection patch makes to the base.
44 EXPORT_SYMBOL(acpi_processor_power_init_bm_check);
46 /* The code below handles cstate entry with monitor-mwait pair on Intel*/
52 } states[ACPI_PROCESSOR_MAX_POWER];
54 static struct cstate_entry *cpu_cstate_entry; /* per CPU ptr */
56 static short mwait_supported[ACPI_PROCESSOR_MAX_POWER];
58 #define MWAIT_SUBSTATE_MASK (0xf)
59 #define MWAIT_SUBSTATE_SIZE (4)
61 #define CPUID_MWAIT_LEAF (5)
62 #define CPUID5_ECX_EXTENSIONS_SUPPORTED (0x1)
63 #define CPUID5_ECX_INTERRUPT_BREAK (0x2)
65 #define MWAIT_ECX_INTERRUPT_BREAK (0x1)
67 #define NATIVE_CSTATE_BEYOND_HALT (2)
69 int acpi_processor_ffh_cstate_probe(unsigned int cpu,
70 struct acpi_processor_cx *cx, struct acpi_power_register *reg)
72 struct cstate_entry *percpu_entry;
73 struct cpuinfo_x86 *c = &cpu_data(cpu);
76 cpumask_of_cpu_ptr(new_mask, cpu);
78 unsigned int eax, ebx, ecx, edx;
79 unsigned int edx_part;
80 unsigned int cstate_type; /* C-state type and not ACPI C-state type */
81 unsigned int num_cstate_subtype;
83 if (!cpu_cstate_entry || c->cpuid_level < CPUID_MWAIT_LEAF )
86 if (reg->bit_offset != NATIVE_CSTATE_BEYOND_HALT)
89 percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
90 percpu_entry->states[cx->index].eax = 0;
91 percpu_entry->states[cx->index].ecx = 0;
93 /* Make sure we are running on right CPU */
94 saved_mask = current->cpus_allowed;
95 retval = set_cpus_allowed_ptr(current, new_mask);
99 cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
101 /* Check whether this particular cx_type (in CST) is supported or not */
102 cstate_type = (cx->address >> MWAIT_SUBSTATE_SIZE) + 1;
103 edx_part = edx >> (cstate_type * MWAIT_SUBSTATE_SIZE);
104 num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;
107 if (num_cstate_subtype < (cx->address & MWAIT_SUBSTATE_MASK)) {
112 /* mwait ecx extensions INTERRUPT_BREAK should be supported for C2/C3 */
113 if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
114 !(ecx & CPUID5_ECX_INTERRUPT_BREAK)) {
118 percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK;
120 /* Use the hint in CST */
121 percpu_entry->states[cx->index].eax = cx->address;
123 if (!mwait_supported[cstate_type]) {
124 mwait_supported[cstate_type] = 1;
125 printk(KERN_DEBUG "Monitor-Mwait will be used to enter C-%d "
126 "state\n", cx->type);
128 snprintf(cx->desc, ACPI_CX_DESC_LEN, "ACPI FFH INTEL MWAIT 0x%x",
132 set_cpus_allowed_ptr(current, &saved_mask);
135 EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
137 void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
139 unsigned int cpu = smp_processor_id();
140 struct cstate_entry *percpu_entry;
142 percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
143 mwait_idle_with_hints(percpu_entry->states[cx->index].eax,
144 percpu_entry->states[cx->index].ecx);
146 EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_enter);
148 static int __init ffh_cstate_init(void)
150 struct cpuinfo_x86 *c = &boot_cpu_data;
151 if (c->x86_vendor != X86_VENDOR_INTEL)
154 cpu_cstate_entry = alloc_percpu(struct cstate_entry);
158 static void __exit ffh_cstate_exit(void)
160 free_percpu(cpu_cstate_entry);
161 cpu_cstate_entry = NULL;
164 arch_initcall(ffh_cstate_init);
165 __exitcall(ffh_cstate_exit);