Merge branch 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6
[linux-2.6] / arch / arm / mach-pxa / trizeps4.c
1 /*
2  *  linux/arch/arm/mach-pxa/trizeps4.c
3  *
4  *  Support for the Keith und Koep Trizeps4 Module Platform.
5  *
6  *  Author:     Jürgen Schindele
7  *  Created:    20 02, 2006
8  *  Copyright:  Jürgen Schindele
9  *
10  *  This program is free software; you can redistribute it and/or modify
11  *  it under the terms of the GNU General Public License version 2 as
12  *  published by the Free Software Foundation.
13  */
14
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/delay.h>
25 #include <linux/serial_8250.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/physmap.h>
28 #include <linux/mtd/partitions.h>
29
30 #include <asm/types.h>
31 #include <asm/setup.h>
32 #include <asm/memory.h>
33 #include <asm/mach-types.h>
34 #include <asm/hardware.h>
35 #include <asm/irq.h>
36 #include <asm/sizes.h>
37
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41 #include <asm/mach/flash.h>
42
43 #include <asm/arch/pxa-regs.h>
44 #include <asm/arch/trizeps4.h>
45 #include <asm/arch/audio.h>
46 #include <asm/arch/pxafb.h>
47 #include <asm/arch/mmc.h>
48 #include <asm/arch/irda.h>
49 #include <asm/arch/ohci.h>
50
51 #include "generic.h"
52 #include "devices.h"
53
54 /********************************************************************************************
55  * ONBOARD FLASH
56  ********************************************************************************************/
57 static struct mtd_partition trizeps4_partitions[] = {
58         {
59                 .name =         "Bootloader",
60                 .offset =       0x00000000,
61                 .size =         0x00040000,
62                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
63         },{
64                 .name =         "Backup",
65                 .offset =       0x00040000,
66                 .size =         0x00040000,
67         },{
68                 .name =         "Image",
69                 .offset =       0x00080000,
70                 .size =         0x01080000,
71         },{
72                 .name =         "IPSM",
73                 .offset =       0x01100000,
74                 .size =         0x00e00000,
75         },{
76                 .name =         "Registry",
77                 .offset =       0x01f00000,
78                 .size =         MTDPART_SIZ_FULL,
79         }
80 };
81
82 static struct physmap_flash_data trizeps4_flash_data[] = {
83         {
84                 .width          = 4,                    /* bankwidth in bytes */
85                 .parts          = trizeps4_partitions,
86                 .nr_parts       = ARRAY_SIZE(trizeps4_partitions)
87         }
88 };
89
90 static struct resource flash_resource = {
91         .start  = PXA_CS0_PHYS,
92         .end    = PXA_CS0_PHYS + SZ_32M - 1,
93         .flags  = IORESOURCE_MEM,
94 };
95
96 static struct platform_device flash_device = {
97         .name           = "physmap-flash",
98         .id             = 0,
99         .dev = {
100                 .platform_data = trizeps4_flash_data,
101         },
102         .resource = &flash_resource,
103         .num_resources = 1,
104 };
105
106 /********************************************************************************************
107  * DAVICOM DM9000 Ethernet
108  ********************************************************************************************/
109 static struct resource dm9000_resources[] = {
110         [0] = {
111                 .start  = TRIZEPS4_ETH_PHYS+0x300,
112                 .end    = TRIZEPS4_ETH_PHYS+0x400-1,
113                 .flags  = IORESOURCE_MEM,
114         },
115         [1] = {
116                 .start  = TRIZEPS4_ETH_PHYS+0x8300,
117                 .end    = TRIZEPS4_ETH_PHYS+0x8400-1,
118                 .flags  = IORESOURCE_MEM,
119         },
120         [2] = {
121                 .start  = TRIZEPS4_ETH_IRQ,
122                 .end    = TRIZEPS4_ETH_IRQ,
123                 .flags  = (IORESOURCE_IRQ | IRQT_RISING),
124         },
125 };
126
127 static struct platform_device dm9000_device = {
128         .name           = "dm9000",
129         .id             = -1,
130         .num_resources  = ARRAY_SIZE(dm9000_resources),
131         .resource       = dm9000_resources,
132 };
133
134 /********************************************************************************************
135  * PXA270 serial ports
136  ********************************************************************************************/
137 static struct plat_serial8250_port tri_serial_ports[] = {
138 #ifdef CONFIG_SERIAL_PXA
139         /* this uses the own PXA driver */
140         {
141                 0,
142         },
143 #else
144         /* this uses the generic 8520 driver */
145         [0] = {
146                 .membase        = (void *)&FFUART,
147                 .irq            = IRQ_FFUART,
148                 .flags          = UPF_BOOT_AUTOCONF,
149                 .iotype         = UPIO_MEM32,
150                 .regshift       = 2,
151                 .uartclk        = (921600*16),
152         },
153         [1] = {
154                 .membase        = (void *)&BTUART,
155                 .irq            = IRQ_BTUART,
156                 .flags          = UPF_BOOT_AUTOCONF,
157                 .iotype         = UPIO_MEM32,
158                 .regshift       = 2,
159                 .uartclk        = (921600*16),
160         },
161         {
162                 0,
163         },
164 #endif
165 };
166
167 static struct platform_device uart_devices = {
168         .name           = "serial8250",
169         .id             = 0,
170         .dev            = {
171                 .platform_data  = tri_serial_ports,
172         },
173         .num_resources  = 0,
174         .resource       = NULL,
175 };
176
177 /********************************************************************************************
178  * PXA270 ac97 sound codec
179  ********************************************************************************************/
180 static struct platform_device ac97_audio_device = {
181         .name           = "pxa2xx-ac97",
182         .id             = -1,
183 };
184
185 static struct platform_device * trizeps4_devices[] __initdata = {
186         &flash_device,
187         &uart_devices,
188         &dm9000_device,
189         &ac97_audio_device,
190 };
191
192 #ifdef CONFIG_MACH_TRIZEPS4_CONXS
193 static short trizeps_conxs_bcr;
194
195 /* PCCARD power switching supports only 3,3V */
196 void board_pcmcia_power(int power)
197 {
198         if (power) {
199                 /* switch power on, put in reset and enable buffers */
200                 trizeps_conxs_bcr |= power;
201                 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
202                 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
203                 ConXS_BCR = trizeps_conxs_bcr;
204                 /* wait a little */
205                 udelay(2000);
206                 /* take reset away */
207                 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
208                 ConXS_BCR = trizeps_conxs_bcr;
209                 udelay(2000);
210         } else {
211                 /* put in reset */
212                 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
213                 ConXS_BCR = trizeps_conxs_bcr;
214                 udelay(1000);
215                 /* switch power off */
216                 trizeps_conxs_bcr &= ~(0xf);
217                 ConXS_BCR = trizeps_conxs_bcr;
218
219         }
220         pr_debug("%s: o%s 0x%x\n", __FUNCTION__, power ? "n": "ff", trizeps_conxs_bcr);
221 }
222
223 /* backlight power switching for LCD panel */
224 static void board_backlight_power(int on)
225 {
226         if (on) {
227                 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
228         } else {
229                 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
230         }
231         pr_debug("%s: o%s 0x%x\n", __FUNCTION__, on ? "n" : "ff", trizeps_conxs_bcr);
232         ConXS_BCR = trizeps_conxs_bcr;
233 }
234
235 /* Powersupply for MMC/SD cardslot */
236 static void board_mci_power(struct device *dev, unsigned int vdd)
237 {
238         struct pxamci_platform_data* p_d = dev->platform_data;
239
240         if (( 1 << vdd) & p_d->ocr_mask) {
241                 pr_debug("%s: on\n", __FUNCTION__);
242                 /* FIXME fill in values here */
243         } else {
244                 pr_debug("%s: off\n", __FUNCTION__);
245                 /* FIXME fill in values here */
246         }
247 }
248
249 static short trizeps_conxs_ircr;
250
251 /* Switch modes and Power for IRDA receiver */
252 static void board_irda_mode(struct device *dev, int mode)
253 {
254         unsigned long flags;
255
256         local_irq_save(flags);
257         if (mode & IR_SIRMODE) {
258                 /* Slow mode */
259                 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
260         } else if (mode & IR_FIRMODE) {
261                 /* Fast mode */
262                 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
263         }
264         if (mode & IR_OFF) {
265                 trizeps_conxs_ircr |= ConXS_IRCR_SD;
266         } else {
267                 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
268         }
269         /* FIXME write values to register */
270         local_irq_restore(flags);
271 }
272
273 #else
274 /* for other baseboards define dummies */
275 void board_pcmcia_power(int power)      {;}
276 #define board_backlight_power           NULL
277 #define board_mci_power                 NULL
278 #define board_irda_mode                 NULL
279
280 #endif          /* CONFIG_MACH_TRIZEPS4_CONXS */
281 EXPORT_SYMBOL(board_pcmcia_power);
282
283 static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
284 {
285         int err;
286         /* setup GPIO for PXA27x MMC controller */
287         pxa_gpio_mode(GPIO32_MMCCLK_MD);
288         pxa_gpio_mode(GPIO112_MMCCMD_MD);
289         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
290         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
291         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
292         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
293
294         pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
295
296         err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
297                           IRQF_DISABLED | IRQF_TRIGGER_RISING,
298                           "MMC card detect", data);
299         if (err)
300                 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
301
302         return err;
303 }
304
305 static void trizeps4_mci_exit(struct device *dev, void *data)
306 {
307         free_irq(TRIZEPS4_MMC_IRQ, data);
308 }
309
310 static struct pxamci_platform_data trizeps4_mci_platform_data = {
311         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
312         .init           = trizeps4_mci_init,
313         .exit           = trizeps4_mci_exit,
314         .setpower       = board_mci_power,
315 };
316
317 static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
318         .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
319         .transceiver_mode = board_irda_mode,
320 };
321
322 static int trizeps4_ohci_init(struct device *dev)
323 {
324         /* setup Port1 GPIO pin. */
325         pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN);  /* USBHPWR1 */
326         pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
327
328         /* Set the Power Control Polarity Low and Power Sense
329            Polarity Low to active low. */
330         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
331                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
332
333         return 0;
334 }
335
336 static void trizeps4_ohci_exit(struct device *dev)
337 {
338         ;
339 }
340
341 static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
342         .port_mode      = PMM_PERPORT_MODE,
343         .init           = trizeps4_ohci_init,
344         .exit           = trizeps4_ohci_exit,
345 };
346
347 static struct map_desc trizeps4_io_desc[] __initdata = {
348         {       /* ConXS CFSR */
349                 .virtual        = TRIZEPS4_CFSR_VIRT,
350                 .pfn            = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
351                 .length         = 0x00001000,
352                 .type           = MT_DEVICE
353         },
354         {       /* ConXS BCR */
355                 .virtual        = TRIZEPS4_BOCR_VIRT,
356                 .pfn            = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
357                 .length         = 0x00001000,
358                 .type           = MT_DEVICE
359         },
360         {       /* ConXS IRCR */
361                 .virtual        = TRIZEPS4_IRCR_VIRT,
362                 .pfn            = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
363                 .length         = 0x00001000,
364                 .type           = MT_DEVICE
365         },
366         {       /* ConXS DCR */
367                 .virtual        = TRIZEPS4_DICR_VIRT,
368                 .pfn            = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
369                 .length         = 0x00001000,
370                 .type           = MT_DEVICE
371         },
372         {       /* ConXS UPSR */
373                 .virtual        = TRIZEPS4_UPSR_VIRT,
374                 .pfn            = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
375                 .length         = 0x00001000,
376                 .type           = MT_DEVICE
377         }
378 };
379
380 static struct pxafb_mode_info sharp_lcd_mode = {
381     .pixclock           = 78000,
382     .xres               = 640,
383     .yres               = 480,
384     .bpp                = 8,
385     .hsync_len          = 4,
386     .left_margin        = 4,
387     .right_margin       = 4,
388     .vsync_len          = 2,
389     .upper_margin       = 0,
390     .lower_margin       = 0,
391     .sync               = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
392     .cmap_greyscale     = 0,
393 };
394
395 static struct pxafb_mach_info sharp_lcd = {
396     .modes              = &sharp_lcd_mode,
397     .num_modes  = 1,
398     .cmap_inverse       = 0,
399     .cmap_static        = 0,
400     .lccr0              = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
401     .lccr3              = 0x0340ff02,
402     .pxafb_backlight_power = board_backlight_power,
403 };
404
405 static struct pxafb_mode_info toshiba_lcd_mode = {
406     .pixclock           = 39720,
407     .xres               = 640,
408     .yres               = 480,
409     .bpp                = 8,
410     .hsync_len          = 63,
411     .left_margin        = 12,
412     .right_margin       = 12,
413     .vsync_len          = 4,
414     .upper_margin       = 32,
415     .lower_margin       = 10,
416     .sync               = 0,
417     .cmap_greyscale     = 0,
418 };
419
420 static struct pxafb_mach_info toshiba_lcd = {
421     .modes              = &toshiba_lcd_mode,
422     .num_modes  = 1,
423     .cmap_inverse       = 0,
424     .cmap_static        = 0,
425     .lccr0              = LCCR0_Color | LCCR0_Act,
426     .lccr3              = 0x03400002,
427     .pxafb_backlight_power = board_backlight_power,
428 };
429
430 static void __init trizeps4_init(void)
431 {
432         platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
433
434 /*      set_pxa_fb_info(&sharp_lcd); */
435         set_pxa_fb_info(&toshiba_lcd);
436
437         pxa_set_mci_info(&trizeps4_mci_platform_data);
438         pxa_set_ficp_info(&trizeps4_ficp_platform_data);
439         pxa_set_ohci_info(&trizeps4_ohci_platform_data);
440 }
441
442 static void __init trizeps4_map_io(void)
443 {
444         pxa_map_io();
445         iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
446
447         /* for DiskOnChip */
448         pxa_gpio_mode(GPIO15_nCS_1_MD);
449
450         /* for off-module PIC on ConXS board */
451         pxa_gpio_mode(GPIO_PIC | GPIO_IN);
452
453         /* UCB1400 irq */
454         pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
455
456         /* for DM9000 LAN */
457         pxa_gpio_mode(GPIO78_nCS_2_MD);
458         pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
459
460         /* for PCMCIA device */
461         pxa_gpio_mode(GPIO_PCD | GPIO_IN);
462         pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
463
464         /* for I2C adapter */
465         pxa_gpio_mode(GPIO117_I2CSCL_MD);
466         pxa_gpio_mode(GPIO118_I2CSDA_MD);
467
468         /* MMC_DET s.o. */
469         pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
470
471         /* whats that for ??? */
472         pxa_gpio_mode(GPIO79_nCS_3_MD);
473
474 #ifdef CONFIG_LEDS
475         pxa_gpio_mode( GPIO_SYS_BUSY_LED  | GPIO_OUT);          /* LED1 */
476         pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT);          /* LED2 */
477 #endif
478 #ifdef CONFIG_MACH_TRIZEPS4_CONXS
479 #ifdef CONFIG_IDE_PXA_CF
480         /* if boot direct from compact flash dont disable power */
481         trizeps_conxs_bcr = 0x0009;
482 #else
483         /* this is the reset value */
484         trizeps_conxs_bcr = 0x00A0;
485 #endif
486         ConXS_BCR = trizeps_conxs_bcr;
487 #endif
488
489         PWER  = 0x00000002;
490         PFER  = 0x00000000;
491         PRER  = 0x00000002;
492         PGSR0 = 0x0158C000;
493         PGSR1 = 0x00FF0080;
494         PGSR2 = 0x0001C004;
495         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
496         PCFR |= PCFR_OPDE;
497 }
498
499 MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
500         /* MAINTAINER("Jürgen Schindele") */
501         .phys_io        = 0x40000000,
502         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
503         .boot_params    = TRIZEPS4_SDRAM_BASE + 0x100,
504         .init_machine   = trizeps4_init,
505         .map_io         = trizeps4_map_io,
506         .init_irq       = pxa27x_init_irq,
507         .timer          = &pxa_timer,
508 MACHINE_END
509