git.oblomov.eu Git - linux-2.6/blob - drivers/mfd/wm8350-core.c

   1 /*
   2  * wm8350-core.c  --  Device access for Wolfson WM8350
   3  *
   4  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
   5  *
   6  * Author: Liam Girdwood, Mark Brown
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/init.h>
  18 #include <linux/bug.h>
  19 #include <linux/device.h>
  20 #include <linux/delay.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/workqueue.h>
  23
  24 #include <linux/mfd/wm8350/core.h>
  25 #include <linux/mfd/wm8350/audio.h>
  26 #include <linux/mfd/wm8350/comparator.h>
  27 #include <linux/mfd/wm8350/gpio.h>
  28 #include <linux/mfd/wm8350/pmic.h>
  29 #include <linux/mfd/wm8350/rtc.h>
  30 #include <linux/mfd/wm8350/supply.h>
  31 #include <linux/mfd/wm8350/wdt.h>
  32
  33 #define WM8350_UNLOCK_KEY               0x0013
  34 #define WM8350_LOCK_KEY                 0x0000
  35
  36 #define WM8350_CLOCK_CONTROL_1          0x28
  37 #define WM8350_AIF_TEST                 0x74
  38
  39 /* debug */
  40 #define WM8350_BUS_DEBUG 0
  41 #if WM8350_BUS_DEBUG
  42 #define dump(regs, src) do { \
  43         int i_; \
  44         u16 *src_ = src; \
  45         printk(KERN_DEBUG); \
  46         for (i_ = 0; i_ < regs; i_++) \
  47                 printk(" 0x%4.4x", *src_++); \
  48         printk("\n"); \
  49 } while (0);
  50 #else
  51 #define dump(bytes, src)
  52 #endif
  53
  54 #define WM8350_LOCK_DEBUG 0
  55 #if WM8350_LOCK_DEBUG
  56 #define ldbg(format, arg...) printk(format, ## arg)
  57 #else
  58 #define ldbg(format, arg...)
  59 #endif
  60
  61 /*
  62  * WM8350 Device IO
  63  */
  64 static DEFINE_MUTEX(io_mutex);
  65 static DEFINE_MUTEX(reg_lock_mutex);
  66
  67 /* Perform a physical read from the device.
  68  */
  69 static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
  70                             u16 *dest)
  71 {
  72         int i, ret;
  73         int bytes = num_regs * 2;
  74
  75         dev_dbg(wm8350->dev, "volatile read\n");
  76         ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
  77
  78         for (i = reg; i < reg + num_regs; i++) {
  79                 /* Cache is CPU endian */
  80                 dest[i - reg] = be16_to_cpu(dest[i - reg]);
  81
  82                 /* Satisfy non-volatile bits from cache */
  83                 dest[i - reg] &= wm8350_reg_io_map[i].vol;
  84                 dest[i - reg] |= wm8350->reg_cache[i];
  85
  86                 /* Mask out non-readable bits */
  87                 dest[i - reg] &= wm8350_reg_io_map[i].readable;
  88         }
  89
  90         dump(num_regs, dest);
  91
  92         return ret;
  93 }
  94
  95 static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
  96 {
  97         int i;
  98         int end = reg + num_regs;
  99         int ret = 0;
 100         int bytes = num_regs * 2;
 101
 102         if (wm8350->read_dev == NULL)
 103                 return -ENODEV;
 104
 105         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
 106                 dev_err(wm8350->dev, "invalid reg %x\n",
 107                         reg + num_regs - 1);
 108                 return -EINVAL;
 109         }
 110
 111         dev_dbg(wm8350->dev,
 112                 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
 113
 114 #if WM8350_BUS_DEBUG
 115         /* we can _safely_ read any register, but warn if read not supported */
 116         for (i = reg; i < end; i++) {
 117                 if (!wm8350_reg_io_map[i].readable)
 118                         dev_warn(wm8350->dev,
 119                                 "reg R%d is not readable\n", i);
 120         }
 121 #endif
 122
 123         /* if any volatile registers are required, then read back all */
 124         for (i = reg; i < end; i++)
 125                 if (wm8350_reg_io_map[i].vol)
 126                         return wm8350_phys_read(wm8350, reg, num_regs, dest);
 127
 128         /* no volatiles, then cache is good */
 129         dev_dbg(wm8350->dev, "cache read\n");
 130         memcpy(dest, &wm8350->reg_cache[reg], bytes);
 131         dump(num_regs, dest);
 132         return ret;
 133 }
 134
 135 static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
 136 {
 137         if (reg == WM8350_SECURITY ||
 138             wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
 139                 return 0;
 140
 141         if ((reg == WM8350_GPIO_CONFIGURATION_I_O) ||
 142             (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
 143              reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
 144             (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
 145              reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
 146                 return 1;
 147         return 0;
 148 }
 149
 150 static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
 151 {
 152         int i;
 153         int end = reg + num_regs;
 154         int bytes = num_regs * 2;
 155
 156         if (wm8350->write_dev == NULL)
 157                 return -ENODEV;
 158
 159         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
 160                 dev_err(wm8350->dev, "invalid reg %x\n",
 161                         reg + num_regs - 1);
 162                 return -EINVAL;
 163         }
 164
 165         /* it's generally not a good idea to write to RO or locked registers */
 166         for (i = reg; i < end; i++) {
 167                 if (!wm8350_reg_io_map[i].writable) {
 168                         dev_err(wm8350->dev,
 169                                 "attempted write to read only reg R%d\n", i);
 170                         return -EINVAL;
 171                 }
 172
 173                 if (is_reg_locked(wm8350, i)) {
 174                         dev_err(wm8350->dev,
 175                                "attempted write to locked reg R%d\n", i);
 176                         return -EINVAL;
 177                 }
 178
 179                 src[i - reg] &= wm8350_reg_io_map[i].writable;
 180
 181                 wm8350->reg_cache[i] =
 182                         (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
 183                         | src[i - reg];
 184
 185                 /* Don't store volatile bits */
 186                 wm8350->reg_cache[i] &= ~wm8350_reg_io_map[i].vol;
 187
 188                 src[i - reg] = cpu_to_be16(src[i - reg]);
 189         }
 190
 191         /* Actually write it out */
 192         return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
 193 }
 194
 195 /*
 196  * Safe read, modify, write methods
 197  */
 198 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
 199 {
 200         u16 data;
 201         int err;
 202
 203         mutex_lock(&io_mutex);
 204         err = wm8350_read(wm8350, reg, 1, &data);
 205         if (err) {
 206                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
 207                 goto out;
 208         }
 209
 210         data &= ~mask;
 211         err = wm8350_write(wm8350, reg, 1, &data);
 212         if (err)
 213                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
 214 out:
 215         mutex_unlock(&io_mutex);
 216         return err;
 217 }
 218 EXPORT_SYMBOL_GPL(wm8350_clear_bits);
 219
 220 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
 221 {
 222         u16 data;
 223         int err;
 224
 225         mutex_lock(&io_mutex);
 226         err = wm8350_read(wm8350, reg, 1, &data);
 227         if (err) {
 228                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
 229                 goto out;
 230         }
 231
 232         data |= mask;
 233         err = wm8350_write(wm8350, reg, 1, &data);
 234         if (err)
 235                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
 236 out:
 237         mutex_unlock(&io_mutex);
 238         return err;
 239 }
 240 EXPORT_SYMBOL_GPL(wm8350_set_bits);
 241
 242 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
 243 {
 244         u16 data;
 245         int err;
 246
 247         mutex_lock(&io_mutex);
 248         err = wm8350_read(wm8350, reg, 1, &data);
 249         if (err)
 250                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
 251
 252         mutex_unlock(&io_mutex);
 253         return data;
 254 }
 255 EXPORT_SYMBOL_GPL(wm8350_reg_read);
 256
 257 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
 258 {
 259         int ret;
 260         u16 data = val;
 261
 262         mutex_lock(&io_mutex);
 263         ret = wm8350_write(wm8350, reg, 1, &data);
 264         if (ret)
 265                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
 266         mutex_unlock(&io_mutex);
 267         return ret;
 268 }
 269 EXPORT_SYMBOL_GPL(wm8350_reg_write);
 270
 271 int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
 272                       u16 *dest)
 273 {
 274         int err = 0;
 275
 276         mutex_lock(&io_mutex);
 277         err = wm8350_read(wm8350, start_reg, regs, dest);
 278         if (err)
 279                 dev_err(wm8350->dev, "block read starting from R%d failed\n",
 280                         start_reg);
 281         mutex_unlock(&io_mutex);
 282         return err;
 283 }
 284 EXPORT_SYMBOL_GPL(wm8350_block_read);
 285
 286 int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
 287                        u16 *src)
 288 {
 289         int ret = 0;
 290
 291         mutex_lock(&io_mutex);
 292         ret = wm8350_write(wm8350, start_reg, regs, src);
 293         if (ret)
 294                 dev_err(wm8350->dev, "block write starting at R%d failed\n",
 295                         start_reg);
 296         mutex_unlock(&io_mutex);
 297         return ret;
 298 }
 299 EXPORT_SYMBOL_GPL(wm8350_block_write);
 300
 301 /**
 302  * wm8350_reg_lock()
 303  *
 304  * The WM8350 has a hardware lock which can be used to prevent writes to
 305  * some registers (generally those which can cause particularly serious
 306  * problems if misused).  This function enables that lock.
 307  */
 308 int wm8350_reg_lock(struct wm8350 *wm8350)
 309 {
 310         u16 key = WM8350_LOCK_KEY;
 311         int ret;
 312
 313         ldbg(__func__);
 314         mutex_lock(&io_mutex);
 315         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
 316         if (ret)
 317                 dev_err(wm8350->dev, "lock failed\n");
 318         mutex_unlock(&io_mutex);
 319         return ret;
 320 }
 321 EXPORT_SYMBOL_GPL(wm8350_reg_lock);
 322
 323 /**
 324  * wm8350_reg_unlock()
 325  *
 326  * The WM8350 has a hardware lock which can be used to prevent writes to
 327  * some registers (generally those which can cause particularly serious
 328  * problems if misused).  This function disables that lock so updates
 329  * can be performed.  For maximum safety this should be done only when
 330  * required.
 331  */
 332 int wm8350_reg_unlock(struct wm8350 *wm8350)
 333 {
 334         u16 key = WM8350_UNLOCK_KEY;
 335         int ret;
 336
 337         ldbg(__func__);
 338         mutex_lock(&io_mutex);
 339         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
 340         if (ret)
 341                 dev_err(wm8350->dev, "unlock failed\n");
 342         mutex_unlock(&io_mutex);
 343         return ret;
 344 }
 345 EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
 346
 347 static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq)
 348 {
 349         mutex_lock(&wm8350->irq_mutex);
 350
 351         if (wm8350->irq[irq].handler)
 352                 wm8350->irq[irq].handler(wm8350, irq, wm8350->irq[irq].data);
 353         else {
 354                 dev_err(wm8350->dev, "irq %d nobody cared. now masked.\n",
 355                         irq);
 356                 wm8350_mask_irq(wm8350, irq);
 357         }
 358
 359         mutex_unlock(&wm8350->irq_mutex);
 360 }
 361
 362 /*
 363  * wm8350_irq_worker actually handles the interrupts.  Since all
 364  * interrupts are clear on read the IRQ line will be reasserted and
 365  * the physical IRQ will be handled again if another interrupt is
 366  * asserted while we run - in the normal course of events this is a
 367  * rare occurrence so we save I2C/SPI reads.
 368  */
 369 static void wm8350_irq_worker(struct work_struct *work)
 370 {
 371         struct wm8350 *wm8350 = container_of(work, struct wm8350, irq_work);
 372         u16 level_one, status1, status2, comp;
 373
 374         /* TODO: Use block reads to improve performance? */
 375         level_one = wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS)
 376                 & ~wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK);
 377         status1 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_1)
 378                 & ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_1_MASK);
 379         status2 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_2)
 380                 & ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_2_MASK);
 381         comp = wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS)
 382                 & ~wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK);
 383
 384         /* over current */
 385         if (level_one & WM8350_OC_INT) {
 386                 u16 oc;
 387
 388                 oc = wm8350_reg_read(wm8350, WM8350_OVER_CURRENT_INT_STATUS);
 389                 oc &= ~wm8350_reg_read(wm8350,
 390                                        WM8350_OVER_CURRENT_INT_STATUS_MASK);
 391
 392                 if (oc & WM8350_OC_LS_EINT)     /* limit switch */
 393                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_OC_LS);
 394         }
 395
 396         /* under voltage */
 397         if (level_one & WM8350_UV_INT) {
 398                 u16 uv;
 399
 400                 uv = wm8350_reg_read(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS);
 401                 uv &= ~wm8350_reg_read(wm8350,
 402                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK);
 403
 404                 if (uv & WM8350_UV_DC1_EINT)
 405                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC1);
 406                 if (uv & WM8350_UV_DC2_EINT)
 407                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC2);
 408                 if (uv & WM8350_UV_DC3_EINT)
 409                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC3);
 410                 if (uv & WM8350_UV_DC4_EINT)
 411                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC4);
 412                 if (uv & WM8350_UV_DC5_EINT)
 413                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC5);
 414                 if (uv & WM8350_UV_DC6_EINT)
 415                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC6);
 416                 if (uv & WM8350_UV_LDO1_EINT)
 417                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO1);
 418                 if (uv & WM8350_UV_LDO2_EINT)
 419                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO2);
 420                 if (uv & WM8350_UV_LDO3_EINT)
 421                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO3);
 422                 if (uv & WM8350_UV_LDO4_EINT)
 423                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO4);
 424         }
 425
 426         /* charger, RTC */
 427         if (status1) {
 428                 if (status1 & WM8350_CHG_BAT_HOT_EINT)
 429                         wm8350_irq_call_handler(wm8350,
 430                                                 WM8350_IRQ_CHG_BAT_HOT);
 431                 if (status1 & WM8350_CHG_BAT_COLD_EINT)
 432                         wm8350_irq_call_handler(wm8350,
 433                                                 WM8350_IRQ_CHG_BAT_COLD);
 434                 if (status1 & WM8350_CHG_BAT_FAIL_EINT)
 435                         wm8350_irq_call_handler(wm8350,
 436                                                 WM8350_IRQ_CHG_BAT_FAIL);
 437                 if (status1 & WM8350_CHG_TO_EINT)
 438                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_TO);
 439                 if (status1 & WM8350_CHG_END_EINT)
 440                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_END);
 441                 if (status1 & WM8350_CHG_START_EINT)
 442                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_START);
 443                 if (status1 & WM8350_CHG_FAST_RDY_EINT)
 444                         wm8350_irq_call_handler(wm8350,
 445                                                 WM8350_IRQ_CHG_FAST_RDY);
 446                 if (status1 & WM8350_CHG_VBATT_LT_3P9_EINT)
 447                         wm8350_irq_call_handler(wm8350,
 448                                                 WM8350_IRQ_CHG_VBATT_LT_3P9);
 449                 if (status1 & WM8350_CHG_VBATT_LT_3P1_EINT)
 450                         wm8350_irq_call_handler(wm8350,
 451                                                 WM8350_IRQ_CHG_VBATT_LT_3P1);
 452                 if (status1 & WM8350_CHG_VBATT_LT_2P85_EINT)
 453                         wm8350_irq_call_handler(wm8350,
 454                                                 WM8350_IRQ_CHG_VBATT_LT_2P85);
 455                 if (status1 & WM8350_RTC_ALM_EINT)
 456                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_ALM);
 457                 if (status1 & WM8350_RTC_SEC_EINT)
 458                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_SEC);
 459                 if (status1 & WM8350_RTC_PER_EINT)
 460                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_PER);
 461         }
 462
 463         /* current sink, system, aux adc */
 464         if (status2) {
 465                 if (status2 & WM8350_CS1_EINT)
 466                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS1);
 467                 if (status2 & WM8350_CS2_EINT)
 468                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS2);
 469
 470                 if (status2 & WM8350_SYS_HYST_COMP_FAIL_EINT)
 471                         wm8350_irq_call_handler(wm8350,
 472                                                 WM8350_IRQ_SYS_HYST_COMP_FAIL);
 473                 if (status2 & WM8350_SYS_CHIP_GT115_EINT)
 474                         wm8350_irq_call_handler(wm8350,
 475                                                 WM8350_IRQ_SYS_CHIP_GT115);
 476                 if (status2 & WM8350_SYS_CHIP_GT140_EINT)
 477                         wm8350_irq_call_handler(wm8350,
 478                                                 WM8350_IRQ_SYS_CHIP_GT140);
 479                 if (status2 & WM8350_SYS_WDOG_TO_EINT)
 480                         wm8350_irq_call_handler(wm8350,
 481                                                 WM8350_IRQ_SYS_WDOG_TO);
 482
 483                 if (status2 & WM8350_AUXADC_DATARDY_EINT)
 484                         wm8350_irq_call_handler(wm8350,
 485                                                 WM8350_IRQ_AUXADC_DATARDY);
 486                 if (status2 & WM8350_AUXADC_DCOMP4_EINT)
 487                         wm8350_irq_call_handler(wm8350,
 488                                                 WM8350_IRQ_AUXADC_DCOMP4);
 489                 if (status2 & WM8350_AUXADC_DCOMP3_EINT)
 490                         wm8350_irq_call_handler(wm8350,
 491                                                 WM8350_IRQ_AUXADC_DCOMP3);
 492                 if (status2 & WM8350_AUXADC_DCOMP2_EINT)
 493                         wm8350_irq_call_handler(wm8350,
 494                                                 WM8350_IRQ_AUXADC_DCOMP2);
 495                 if (status2 & WM8350_AUXADC_DCOMP1_EINT)
 496                         wm8350_irq_call_handler(wm8350,
 497                                                 WM8350_IRQ_AUXADC_DCOMP1);
 498
 499                 if (status2 & WM8350_USB_LIMIT_EINT)
 500                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_USB_LIMIT);
 501         }
 502
 503         /* wake, codec, ext */
 504         if (comp) {
 505                 if (comp & WM8350_WKUP_OFF_STATE_EINT)
 506                         wm8350_irq_call_handler(wm8350,
 507                                                 WM8350_IRQ_WKUP_OFF_STATE);
 508                 if (comp & WM8350_WKUP_HIB_STATE_EINT)
 509                         wm8350_irq_call_handler(wm8350,
 510                                                 WM8350_IRQ_WKUP_HIB_STATE);
 511                 if (comp & WM8350_WKUP_CONV_FAULT_EINT)
 512                         wm8350_irq_call_handler(wm8350,
 513                                                 WM8350_IRQ_WKUP_CONV_FAULT);
 514                 if (comp & WM8350_WKUP_WDOG_RST_EINT)
 515                         wm8350_irq_call_handler(wm8350,
 516                                                 WM8350_IRQ_WKUP_WDOG_RST);
 517                 if (comp & WM8350_WKUP_GP_PWR_ON_EINT)
 518                         wm8350_irq_call_handler(wm8350,
 519                                                 WM8350_IRQ_WKUP_GP_PWR_ON);
 520                 if (comp & WM8350_WKUP_ONKEY_EINT)
 521                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_WKUP_ONKEY);
 522                 if (comp & WM8350_WKUP_GP_WAKEUP_EINT)
 523                         wm8350_irq_call_handler(wm8350,
 524                                                 WM8350_IRQ_WKUP_GP_WAKEUP);
 525
 526                 if (comp & WM8350_CODEC_JCK_DET_L_EINT)
 527                         wm8350_irq_call_handler(wm8350,
 528                                                 WM8350_IRQ_CODEC_JCK_DET_L);
 529                 if (comp & WM8350_CODEC_JCK_DET_R_EINT)
 530                         wm8350_irq_call_handler(wm8350,
 531                                                 WM8350_IRQ_CODEC_JCK_DET_R);
 532                 if (comp & WM8350_CODEC_MICSCD_EINT)
 533                         wm8350_irq_call_handler(wm8350,
 534                                                 WM8350_IRQ_CODEC_MICSCD);
 535                 if (comp & WM8350_CODEC_MICD_EINT)
 536                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CODEC_MICD);
 537
 538                 if (comp & WM8350_EXT_USB_FB_EINT)
 539                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_USB_FB);
 540                 if (comp & WM8350_EXT_WALL_FB_EINT)
 541                         wm8350_irq_call_handler(wm8350,
 542                                                 WM8350_IRQ_EXT_WALL_FB);
 543                 if (comp & WM8350_EXT_BAT_FB_EINT)
 544                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_BAT_FB);
 545         }
 546
 547         if (level_one & WM8350_GP_INT) {
 548                 int i;
 549                 u16 gpio;
 550
 551                 gpio = wm8350_reg_read(wm8350, WM8350_GPIO_INT_STATUS);
 552                 gpio &= ~wm8350_reg_read(wm8350,
 553                                          WM8350_GPIO_INT_STATUS_MASK);
 554
 555                 for (i = 0; i < 12; i++) {
 556                         if (gpio & (1 << i))
 557                                 wm8350_irq_call_handler(wm8350,
 558                                                         WM8350_IRQ_GPIO(i));
 559                 }
 560         }
 561
 562         enable_irq(wm8350->chip_irq);
 563 }
 564
 565 static irqreturn_t wm8350_irq(int irq, void *data)
 566 {
 567         struct wm8350 *wm8350 = data;
 568
 569         disable_irq_nosync(irq);
 570         schedule_work(&wm8350->irq_work);
 571
 572         return IRQ_HANDLED;
 573 }
 574
 575 int wm8350_register_irq(struct wm8350 *wm8350, int irq,
 576                         void (*handler) (struct wm8350 *, int, void *),
 577                         void *data)
 578 {
 579         if (irq < 0 || irq > WM8350_NUM_IRQ || !handler)
 580                 return -EINVAL;
 581
 582         if (wm8350->irq[irq].handler)
 583                 return -EBUSY;
 584
 585         mutex_lock(&wm8350->irq_mutex);
 586         wm8350->irq[irq].handler = handler;
 587         wm8350->irq[irq].data = data;
 588         mutex_unlock(&wm8350->irq_mutex);
 589
 590         return 0;
 591 }
 592 EXPORT_SYMBOL_GPL(wm8350_register_irq);
 593
 594 int wm8350_free_irq(struct wm8350 *wm8350, int irq)
 595 {
 596         if (irq < 0 || irq > WM8350_NUM_IRQ)
 597                 return -EINVAL;
 598
 599         mutex_lock(&wm8350->irq_mutex);
 600         wm8350->irq[irq].handler = NULL;
 601         mutex_unlock(&wm8350->irq_mutex);
 602         return 0;
 603 }
 604 EXPORT_SYMBOL_GPL(wm8350_free_irq);
 605
 606 int wm8350_mask_irq(struct wm8350 *wm8350, int irq)
 607 {
 608         switch (irq) {
 609         case WM8350_IRQ_CHG_BAT_HOT:
 610                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 611                                        WM8350_IM_CHG_BAT_HOT_EINT);
 612         case WM8350_IRQ_CHG_BAT_COLD:
 613                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 614                                        WM8350_IM_CHG_BAT_COLD_EINT);
 615         case WM8350_IRQ_CHG_BAT_FAIL:
 616                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 617                                        WM8350_IM_CHG_BAT_FAIL_EINT);
 618         case WM8350_IRQ_CHG_TO:
 619                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 620                                        WM8350_IM_CHG_TO_EINT);
 621         case WM8350_IRQ_CHG_END:
 622                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 623                                        WM8350_IM_CHG_END_EINT);
 624         case WM8350_IRQ_CHG_START:
 625                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 626                                        WM8350_IM_CHG_START_EINT);
 627         case WM8350_IRQ_CHG_FAST_RDY:
 628                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 629                                        WM8350_IM_CHG_FAST_RDY_EINT);
 630         case WM8350_IRQ_RTC_PER:
 631                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 632                                        WM8350_IM_RTC_PER_EINT);
 633         case WM8350_IRQ_RTC_SEC:
 634                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 635                                        WM8350_IM_RTC_SEC_EINT);
 636         case WM8350_IRQ_RTC_ALM:
 637                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 638                                        WM8350_IM_RTC_ALM_EINT);
 639         case WM8350_IRQ_CHG_VBATT_LT_3P9:
 640                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 641                                        WM8350_IM_CHG_VBATT_LT_3P9_EINT);
 642         case WM8350_IRQ_CHG_VBATT_LT_3P1:
 643                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 644                                        WM8350_IM_CHG_VBATT_LT_3P1_EINT);
 645         case WM8350_IRQ_CHG_VBATT_LT_2P85:
 646                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 647                                        WM8350_IM_CHG_VBATT_LT_2P85_EINT);
 648         case WM8350_IRQ_CS1:
 649                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 650                                        WM8350_IM_CS1_EINT);
 651         case WM8350_IRQ_CS2:
 652                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 653                                        WM8350_IM_CS2_EINT);
 654         case WM8350_IRQ_USB_LIMIT:
 655                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 656                                        WM8350_IM_USB_LIMIT_EINT);
 657         case WM8350_IRQ_AUXADC_DATARDY:
 658                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 659                                        WM8350_IM_AUXADC_DATARDY_EINT);
 660         case WM8350_IRQ_AUXADC_DCOMP4:
 661                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 662                                        WM8350_IM_AUXADC_DCOMP4_EINT);
 663         case WM8350_IRQ_AUXADC_DCOMP3:
 664                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 665                                        WM8350_IM_AUXADC_DCOMP3_EINT);
 666         case WM8350_IRQ_AUXADC_DCOMP2:
 667                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 668                                        WM8350_IM_AUXADC_DCOMP2_EINT);
 669         case WM8350_IRQ_AUXADC_DCOMP1:
 670                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 671                                        WM8350_IM_AUXADC_DCOMP1_EINT);
 672         case WM8350_IRQ_SYS_HYST_COMP_FAIL:
 673                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 674                                        WM8350_IM_SYS_HYST_COMP_FAIL_EINT);
 675         case WM8350_IRQ_SYS_CHIP_GT115:
 676                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 677                                        WM8350_IM_SYS_CHIP_GT115_EINT);
 678         case WM8350_IRQ_SYS_CHIP_GT140:
 679                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 680                                        WM8350_IM_SYS_CHIP_GT140_EINT);
 681         case WM8350_IRQ_SYS_WDOG_TO:
 682                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 683                                        WM8350_IM_SYS_WDOG_TO_EINT);
 684         case WM8350_IRQ_UV_LDO4:
 685                 return wm8350_set_bits(wm8350,
 686                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 687                                        WM8350_IM_UV_LDO4_EINT);
 688         case WM8350_IRQ_UV_LDO3:
 689                 return wm8350_set_bits(wm8350,
 690                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 691                                        WM8350_IM_UV_LDO3_EINT);
 692         case WM8350_IRQ_UV_LDO2:
 693                 return wm8350_set_bits(wm8350,
 694                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 695                                        WM8350_IM_UV_LDO2_EINT);
 696         case WM8350_IRQ_UV_LDO1:
 697                 return wm8350_set_bits(wm8350,
 698                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 699                                        WM8350_IM_UV_LDO1_EINT);
 700         case WM8350_IRQ_UV_DC6:
 701                 return wm8350_set_bits(wm8350,
 702                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 703                                        WM8350_IM_UV_DC6_EINT);
 704         case WM8350_IRQ_UV_DC5:
 705                 return wm8350_set_bits(wm8350,
 706                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 707                                        WM8350_IM_UV_DC5_EINT);
 708         case WM8350_IRQ_UV_DC4:
 709                 return wm8350_set_bits(wm8350,
 710                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 711                                        WM8350_IM_UV_DC4_EINT);
 712         case WM8350_IRQ_UV_DC3:
 713                 return wm8350_set_bits(wm8350,
 714                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 715                                        WM8350_IM_UV_DC3_EINT);
 716         case WM8350_IRQ_UV_DC2:
 717                 return wm8350_set_bits(wm8350,
 718                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 719                                        WM8350_IM_UV_DC2_EINT);
 720         case WM8350_IRQ_UV_DC1:
 721                 return wm8350_set_bits(wm8350,
 722                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 723                                        WM8350_IM_UV_DC1_EINT);
 724         case WM8350_IRQ_OC_LS:
 725                 return wm8350_set_bits(wm8350,
 726                                        WM8350_OVER_CURRENT_INT_STATUS_MASK,
 727                                        WM8350_IM_OC_LS_EINT);
 728         case WM8350_IRQ_EXT_USB_FB:
 729                 return wm8350_set_bits(wm8350,
 730                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 731                                        WM8350_IM_EXT_USB_FB_EINT);
 732         case WM8350_IRQ_EXT_WALL_FB:
 733                 return wm8350_set_bits(wm8350,
 734                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 735                                        WM8350_IM_EXT_WALL_FB_EINT);
 736         case WM8350_IRQ_EXT_BAT_FB:
 737                 return wm8350_set_bits(wm8350,
 738                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 739                                        WM8350_IM_EXT_BAT_FB_EINT);
 740         case WM8350_IRQ_CODEC_JCK_DET_L:
 741                 return wm8350_set_bits(wm8350,
 742                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 743                                        WM8350_IM_CODEC_JCK_DET_L_EINT);
 744         case WM8350_IRQ_CODEC_JCK_DET_R:
 745                 return wm8350_set_bits(wm8350,
 746                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 747                                        WM8350_IM_CODEC_JCK_DET_R_EINT);
 748         case WM8350_IRQ_CODEC_MICSCD:
 749                 return wm8350_set_bits(wm8350,
 750                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 751                                        WM8350_IM_CODEC_MICSCD_EINT);
 752         case WM8350_IRQ_CODEC_MICD:
 753                 return wm8350_set_bits(wm8350,
 754                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 755                                        WM8350_IM_CODEC_MICD_EINT);
 756         case WM8350_IRQ_WKUP_OFF_STATE:
 757                 return wm8350_set_bits(wm8350,
 758                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 759                                        WM8350_IM_WKUP_OFF_STATE_EINT);
 760         case WM8350_IRQ_WKUP_HIB_STATE:
 761                 return wm8350_set_bits(wm8350,
 762                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 763                                        WM8350_IM_WKUP_HIB_STATE_EINT);
 764         case WM8350_IRQ_WKUP_CONV_FAULT:
 765                 return wm8350_set_bits(wm8350,
 766                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 767                                        WM8350_IM_WKUP_CONV_FAULT_EINT);
 768         case WM8350_IRQ_WKUP_WDOG_RST:
 769                 return wm8350_set_bits(wm8350,
 770                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 771                                        WM8350_IM_WKUP_OFF_STATE_EINT);
 772         case WM8350_IRQ_WKUP_GP_PWR_ON:
 773                 return wm8350_set_bits(wm8350,
 774                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 775                                        WM8350_IM_WKUP_GP_PWR_ON_EINT);
 776         case WM8350_IRQ_WKUP_ONKEY:
 777                 return wm8350_set_bits(wm8350,
 778                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 779                                        WM8350_IM_WKUP_ONKEY_EINT);
 780         case WM8350_IRQ_WKUP_GP_WAKEUP:
 781                 return wm8350_set_bits(wm8350,
 782                                        WM8350_COMPARATOR_INT_STATUS_MASK,
 783                                        WM8350_IM_WKUP_GP_WAKEUP_EINT);
 784         case WM8350_IRQ_GPIO(0):
 785                 return wm8350_set_bits(wm8350,
 786                                        WM8350_GPIO_INT_STATUS_MASK,
 787                                        WM8350_IM_GP0_EINT);
 788         case WM8350_IRQ_GPIO(1):
 789                 return wm8350_set_bits(wm8350,
 790                                        WM8350_GPIO_INT_STATUS_MASK,
 791                                        WM8350_IM_GP1_EINT);
 792         case WM8350_IRQ_GPIO(2):
 793                 return wm8350_set_bits(wm8350,
 794                                        WM8350_GPIO_INT_STATUS_MASK,
 795                                        WM8350_IM_GP2_EINT);
 796         case WM8350_IRQ_GPIO(3):
 797                 return wm8350_set_bits(wm8350,
 798                                        WM8350_GPIO_INT_STATUS_MASK,
 799                                        WM8350_IM_GP3_EINT);
 800         case WM8350_IRQ_GPIO(4):
 801                 return wm8350_set_bits(wm8350,
 802                                        WM8350_GPIO_INT_STATUS_MASK,
 803                                        WM8350_IM_GP4_EINT);
 804         case WM8350_IRQ_GPIO(5):
 805                 return wm8350_set_bits(wm8350,
 806                                        WM8350_GPIO_INT_STATUS_MASK,
 807                                        WM8350_IM_GP5_EINT);
 808         case WM8350_IRQ_GPIO(6):
 809                 return wm8350_set_bits(wm8350,
 810                                        WM8350_GPIO_INT_STATUS_MASK,
 811                                        WM8350_IM_GP6_EINT);
 812         case WM8350_IRQ_GPIO(7):
 813                 return wm8350_set_bits(wm8350,
 814                                        WM8350_GPIO_INT_STATUS_MASK,
 815                                        WM8350_IM_GP7_EINT);
 816         case WM8350_IRQ_GPIO(8):
 817                 return wm8350_set_bits(wm8350,
 818                                        WM8350_GPIO_INT_STATUS_MASK,
 819                                        WM8350_IM_GP8_EINT);
 820         case WM8350_IRQ_GPIO(9):
 821                 return wm8350_set_bits(wm8350,
 822                                        WM8350_GPIO_INT_STATUS_MASK,
 823                                        WM8350_IM_GP9_EINT);
 824         case WM8350_IRQ_GPIO(10):
 825                 return wm8350_set_bits(wm8350,
 826                                        WM8350_GPIO_INT_STATUS_MASK,
 827                                        WM8350_IM_GP10_EINT);
 828         case WM8350_IRQ_GPIO(11):
 829                 return wm8350_set_bits(wm8350,
 830                                        WM8350_GPIO_INT_STATUS_MASK,
 831                                        WM8350_IM_GP11_EINT);
 832         case WM8350_IRQ_GPIO(12):
 833                 return wm8350_set_bits(wm8350,
 834                                        WM8350_GPIO_INT_STATUS_MASK,
 835                                        WM8350_IM_GP12_EINT);
 836         default:
 837                 dev_warn(wm8350->dev, "Attempting to mask unknown IRQ %d\n",
 838                          irq);
 839                 return -EINVAL;
 840         }
 841         return 0;
 842 }
 843 EXPORT_SYMBOL_GPL(wm8350_mask_irq);
 844
 845 int wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
 846 {
 847         switch (irq) {
 848         case WM8350_IRQ_CHG_BAT_HOT:
 849                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 850                                          WM8350_IM_CHG_BAT_HOT_EINT);
 851         case WM8350_IRQ_CHG_BAT_COLD:
 852                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 853                                          WM8350_IM_CHG_BAT_COLD_EINT);
 854         case WM8350_IRQ_CHG_BAT_FAIL:
 855                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 856                                          WM8350_IM_CHG_BAT_FAIL_EINT);
 857         case WM8350_IRQ_CHG_TO:
 858                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 859                                          WM8350_IM_CHG_TO_EINT);
 860         case WM8350_IRQ_CHG_END:
 861                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 862                                          WM8350_IM_CHG_END_EINT);
 863         case WM8350_IRQ_CHG_START:
 864                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 865                                          WM8350_IM_CHG_START_EINT);
 866         case WM8350_IRQ_CHG_FAST_RDY:
 867                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 868                                          WM8350_IM_CHG_FAST_RDY_EINT);
 869         case WM8350_IRQ_RTC_PER:
 870                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 871                                          WM8350_IM_RTC_PER_EINT);
 872         case WM8350_IRQ_RTC_SEC:
 873                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 874                                          WM8350_IM_RTC_SEC_EINT);
 875         case WM8350_IRQ_RTC_ALM:
 876                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 877                                          WM8350_IM_RTC_ALM_EINT);
 878         case WM8350_IRQ_CHG_VBATT_LT_3P9:
 879                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 880                                          WM8350_IM_CHG_VBATT_LT_3P9_EINT);
 881         case WM8350_IRQ_CHG_VBATT_LT_3P1:
 882                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 883                                          WM8350_IM_CHG_VBATT_LT_3P1_EINT);
 884         case WM8350_IRQ_CHG_VBATT_LT_2P85:
 885                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
 886                                          WM8350_IM_CHG_VBATT_LT_2P85_EINT);
 887         case WM8350_IRQ_CS1:
 888                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 889                                          WM8350_IM_CS1_EINT);
 890         case WM8350_IRQ_CS2:
 891                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 892                                          WM8350_IM_CS2_EINT);
 893         case WM8350_IRQ_USB_LIMIT:
 894                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 895                                          WM8350_IM_USB_LIMIT_EINT);
 896         case WM8350_IRQ_AUXADC_DATARDY:
 897                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 898                                          WM8350_IM_AUXADC_DATARDY_EINT);
 899         case WM8350_IRQ_AUXADC_DCOMP4:
 900                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 901                                          WM8350_IM_AUXADC_DCOMP4_EINT);
 902         case WM8350_IRQ_AUXADC_DCOMP3:
 903                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 904                                          WM8350_IM_AUXADC_DCOMP3_EINT);
 905         case WM8350_IRQ_AUXADC_DCOMP2:
 906                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 907                                          WM8350_IM_AUXADC_DCOMP2_EINT);
 908         case WM8350_IRQ_AUXADC_DCOMP1:
 909                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 910                                          WM8350_IM_AUXADC_DCOMP1_EINT);
 911         case WM8350_IRQ_SYS_HYST_COMP_FAIL:
 912                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 913                                          WM8350_IM_SYS_HYST_COMP_FAIL_EINT);
 914         case WM8350_IRQ_SYS_CHIP_GT115:
 915                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 916                                          WM8350_IM_SYS_CHIP_GT115_EINT);
 917         case WM8350_IRQ_SYS_CHIP_GT140:
 918                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 919                                          WM8350_IM_SYS_CHIP_GT140_EINT);
 920         case WM8350_IRQ_SYS_WDOG_TO:
 921                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
 922                                          WM8350_IM_SYS_WDOG_TO_EINT);
 923         case WM8350_IRQ_UV_LDO4:
 924                 return wm8350_clear_bits(wm8350,
 925                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 926                                          WM8350_IM_UV_LDO4_EINT);
 927         case WM8350_IRQ_UV_LDO3:
 928                 return wm8350_clear_bits(wm8350,
 929                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 930                                          WM8350_IM_UV_LDO3_EINT);
 931         case WM8350_IRQ_UV_LDO2:
 932                 return wm8350_clear_bits(wm8350,
 933                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 934                                          WM8350_IM_UV_LDO2_EINT);
 935         case WM8350_IRQ_UV_LDO1:
 936                 return wm8350_clear_bits(wm8350,
 937                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 938                                          WM8350_IM_UV_LDO1_EINT);
 939         case WM8350_IRQ_UV_DC6:
 940                 return wm8350_clear_bits(wm8350,
 941                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 942                                          WM8350_IM_UV_DC6_EINT);
 943         case WM8350_IRQ_UV_DC5:
 944                 return wm8350_clear_bits(wm8350,
 945                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 946                                          WM8350_IM_UV_DC5_EINT);
 947         case WM8350_IRQ_UV_DC4:
 948                 return wm8350_clear_bits(wm8350,
 949                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 950                                          WM8350_IM_UV_DC4_EINT);
 951         case WM8350_IRQ_UV_DC3:
 952                 return wm8350_clear_bits(wm8350,
 953                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 954                                          WM8350_IM_UV_DC3_EINT);
 955         case WM8350_IRQ_UV_DC2:
 956                 return wm8350_clear_bits(wm8350,
 957                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 958                                          WM8350_IM_UV_DC2_EINT);
 959         case WM8350_IRQ_UV_DC1:
 960                 return wm8350_clear_bits(wm8350,
 961                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
 962                                          WM8350_IM_UV_DC1_EINT);
 963         case WM8350_IRQ_OC_LS:
 964                 return wm8350_clear_bits(wm8350,
 965                                          WM8350_OVER_CURRENT_INT_STATUS_MASK,
 966                                          WM8350_IM_OC_LS_EINT);
 967         case WM8350_IRQ_EXT_USB_FB:
 968                 return wm8350_clear_bits(wm8350,
 969                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 970                                          WM8350_IM_EXT_USB_FB_EINT);
 971         case WM8350_IRQ_EXT_WALL_FB:
 972                 return wm8350_clear_bits(wm8350,
 973                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 974                                          WM8350_IM_EXT_WALL_FB_EINT);
 975         case WM8350_IRQ_EXT_BAT_FB:
 976                 return wm8350_clear_bits(wm8350,
 977                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 978                                          WM8350_IM_EXT_BAT_FB_EINT);
 979         case WM8350_IRQ_CODEC_JCK_DET_L:
 980                 return wm8350_clear_bits(wm8350,
 981                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 982                                          WM8350_IM_CODEC_JCK_DET_L_EINT);
 983         case WM8350_IRQ_CODEC_JCK_DET_R:
 984                 return wm8350_clear_bits(wm8350,
 985                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 986                                          WM8350_IM_CODEC_JCK_DET_R_EINT);
 987         case WM8350_IRQ_CODEC_MICSCD:
 988                 return wm8350_clear_bits(wm8350,
 989                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 990                                          WM8350_IM_CODEC_MICSCD_EINT);
 991         case WM8350_IRQ_CODEC_MICD:
 992                 return wm8350_clear_bits(wm8350,
 993                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 994                                          WM8350_IM_CODEC_MICD_EINT);
 995         case WM8350_IRQ_WKUP_OFF_STATE:
 996                 return wm8350_clear_bits(wm8350,
 997                                          WM8350_COMPARATOR_INT_STATUS_MASK,
 998                                          WM8350_IM_WKUP_OFF_STATE_EINT);
 999         case WM8350_IRQ_WKUP_HIB_STATE:
1000                 return wm8350_clear_bits(wm8350,
1001                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1002                                          WM8350_IM_WKUP_HIB_STATE_EINT);
1003         case WM8350_IRQ_WKUP_CONV_FAULT:
1004                 return wm8350_clear_bits(wm8350,
1005                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1006                                          WM8350_IM_WKUP_CONV_FAULT_EINT);
1007         case WM8350_IRQ_WKUP_WDOG_RST:
1008                 return wm8350_clear_bits(wm8350,
1009                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1010                                          WM8350_IM_WKUP_OFF_STATE_EINT);
1011         case WM8350_IRQ_WKUP_GP_PWR_ON:
1012                 return wm8350_clear_bits(wm8350,
1013                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1014                                          WM8350_IM_WKUP_GP_PWR_ON_EINT);
1015         case WM8350_IRQ_WKUP_ONKEY:
1016                 return wm8350_clear_bits(wm8350,
1017                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1018                                          WM8350_IM_WKUP_ONKEY_EINT);
1019         case WM8350_IRQ_WKUP_GP_WAKEUP:
1020                 return wm8350_clear_bits(wm8350,
1021                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1022                                          WM8350_IM_WKUP_GP_WAKEUP_EINT);
1023         case WM8350_IRQ_GPIO(0):
1024                 return wm8350_clear_bits(wm8350,
1025                                          WM8350_GPIO_INT_STATUS_MASK,
1026                                          WM8350_IM_GP0_EINT);
1027         case WM8350_IRQ_GPIO(1):
1028                 return wm8350_clear_bits(wm8350,
1029                                          WM8350_GPIO_INT_STATUS_MASK,
1030                                          WM8350_IM_GP1_EINT);
1031         case WM8350_IRQ_GPIO(2):
1032                 return wm8350_clear_bits(wm8350,
1033                                          WM8350_GPIO_INT_STATUS_MASK,
1034                                          WM8350_IM_GP2_EINT);
1035         case WM8350_IRQ_GPIO(3):
1036                 return wm8350_clear_bits(wm8350,
1037                                          WM8350_GPIO_INT_STATUS_MASK,
1038                                          WM8350_IM_GP3_EINT);
1039         case WM8350_IRQ_GPIO(4):
1040                 return wm8350_clear_bits(wm8350,
1041                                          WM8350_GPIO_INT_STATUS_MASK,
1042                                          WM8350_IM_GP4_EINT);
1043         case WM8350_IRQ_GPIO(5):
1044                 return wm8350_clear_bits(wm8350,
1045                                          WM8350_GPIO_INT_STATUS_MASK,
1046                                          WM8350_IM_GP5_EINT);
1047         case WM8350_IRQ_GPIO(6):
1048                 return wm8350_clear_bits(wm8350,
1049                                          WM8350_GPIO_INT_STATUS_MASK,
1050                                          WM8350_IM_GP6_EINT);
1051         case WM8350_IRQ_GPIO(7):
1052                 return wm8350_clear_bits(wm8350,
1053                                          WM8350_GPIO_INT_STATUS_MASK,
1054                                          WM8350_IM_GP7_EINT);
1055         case WM8350_IRQ_GPIO(8):
1056                 return wm8350_clear_bits(wm8350,
1057                                          WM8350_GPIO_INT_STATUS_MASK,
1058                                          WM8350_IM_GP8_EINT);
1059         case WM8350_IRQ_GPIO(9):
1060                 return wm8350_clear_bits(wm8350,
1061                                          WM8350_GPIO_INT_STATUS_MASK,
1062                                          WM8350_IM_GP9_EINT);
1063         case WM8350_IRQ_GPIO(10):
1064                 return wm8350_clear_bits(wm8350,
1065                                          WM8350_GPIO_INT_STATUS_MASK,
1066                                          WM8350_IM_GP10_EINT);
1067         case WM8350_IRQ_GPIO(11):
1068                 return wm8350_clear_bits(wm8350,
1069                                          WM8350_GPIO_INT_STATUS_MASK,
1070                                          WM8350_IM_GP11_EINT);
1071         case WM8350_IRQ_GPIO(12):
1072                 return wm8350_clear_bits(wm8350,
1073                                          WM8350_GPIO_INT_STATUS_MASK,
1074                                          WM8350_IM_GP12_EINT);
1075         default:
1076                 dev_warn(wm8350->dev, "Attempting to unmask unknown IRQ %d\n",
1077                          irq);
1078                 return -EINVAL;
1079         }
1080         return 0;
1081 }
1082 EXPORT_SYMBOL_GPL(wm8350_unmask_irq);
1083
1084 int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
1085 {
1086         u16 reg, result = 0;
1087         int tries = 5;
1088
1089         if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
1090                 return -EINVAL;
1091         if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
1092             && (scale != 0 || vref != 0))
1093                 return -EINVAL;
1094
1095         mutex_lock(&wm8350->auxadc_mutex);
1096
1097         /* Turn on the ADC */
1098         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
1099         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
1100
1101         if (scale || vref) {
1102                 reg = scale << 13;
1103                 reg |= vref << 12;
1104                 wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
1105         }
1106
1107         reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
1108         reg |= 1 << channel | WM8350_AUXADC_POLL;
1109         wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
1110
1111         do {
1112                 schedule_timeout_interruptible(1);
1113                 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
1114         } while ((reg & WM8350_AUXADC_POLL) && --tries);
1115
1116         if (!tries)
1117                 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
1118         else
1119                 result = wm8350_reg_read(wm8350,
1120                                          WM8350_AUX1_READBACK + channel);
1121
1122         /* Turn off the ADC */
1123         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
1124         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
1125                          reg & ~WM8350_AUXADC_ENA);
1126
1127         mutex_unlock(&wm8350->auxadc_mutex);
1128
1129         return result & WM8350_AUXADC_DATA1_MASK;
1130 }
1131 EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
1132
1133 /*
1134  * Cache is always host endian.
1135  */
1136 static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
1137 {
1138         int i, ret = 0;
1139         u16 value;
1140         const u16 *reg_map;
1141
1142         switch (type) {
1143         case 0:
1144                 switch (mode) {
1145 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
1146                 case 0:
1147                         reg_map = wm8350_mode0_defaults;
1148                         break;
1149 #endif
1150 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
1151                 case 1:
1152                         reg_map = wm8350_mode1_defaults;
1153                         break;
1154 #endif
1155 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
1156                 case 2:
1157                         reg_map = wm8350_mode2_defaults;
1158                         break;
1159 #endif
1160 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
1161                 case 3:
1162                         reg_map = wm8350_mode3_defaults;
1163                         break;
1164 #endif
1165                 default:
1166                         dev_err(wm8350->dev,
1167                                 "WM8350 configuration mode %d not supported\n",
1168                                 mode);
1169                         return -EINVAL;
1170                 }
1171                 break;
1172
1173         case 1:
1174                 switch (mode) {
1175 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
1176                 case 0:
1177                         reg_map = wm8351_mode0_defaults;
1178                         break;
1179 #endif
1180 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
1181                 case 1:
1182                         reg_map = wm8351_mode1_defaults;
1183                         break;
1184 #endif
1185 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
1186                 case 2:
1187                         reg_map = wm8351_mode2_defaults;
1188                         break;
1189 #endif
1190 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
1191                 case 3:
1192                         reg_map = wm8351_mode3_defaults;
1193                         break;
1194 #endif
1195                 default:
1196                         dev_err(wm8350->dev,
1197                                 "WM8351 configuration mode %d not supported\n",
1198                                 mode);
1199                         return -EINVAL;
1200                 }
1201                 break;
1202
1203         case 2:
1204                 switch (mode) {
1205 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
1206                 case 0:
1207                         reg_map = wm8352_mode0_defaults;
1208                         break;
1209 #endif
1210 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
1211                 case 1:
1212                         reg_map = wm8352_mode1_defaults;
1213                         break;
1214 #endif
1215 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
1216                 case 2:
1217                         reg_map = wm8352_mode2_defaults;
1218                         break;
1219 #endif
1220 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
1221                 case 3:
1222                         reg_map = wm8352_mode3_defaults;
1223                         break;
1224 #endif
1225                 default:
1226                         dev_err(wm8350->dev,
1227                                 "WM8352 configuration mode %d not supported\n",
1228                                 mode);
1229                         return -EINVAL;
1230                 }
1231                 break;
1232
1233         default:
1234                 dev_err(wm8350->dev,
1235                         "WM835x configuration mode %d not supported\n",
1236                         mode);
1237                 return -EINVAL;
1238         }
1239
1240         wm8350->reg_cache =
1241                 kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
1242         if (wm8350->reg_cache == NULL)
1243                 return -ENOMEM;
1244
1245         /* Read the initial cache state back from the device - this is
1246          * a PMIC so the device many not be in a virgin state and we
1247          * can't rely on the silicon values.
1248          */
1249         ret = wm8350->read_dev(wm8350, 0,
1250                                sizeof(u16) * (WM8350_MAX_REGISTER + 1),
1251                                wm8350->reg_cache);
1252         if (ret < 0) {
1253                 dev_err(wm8350->dev,
1254                         "failed to read initial cache values\n");
1255                 goto out;
1256         }
1257
1258         /* Mask out uncacheable/unreadable bits and the audio. */
1259         for (i = 0; i < WM8350_MAX_REGISTER; i++) {
1260                 if (wm8350_reg_io_map[i].readable &&
1261                     (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
1262                         value = be16_to_cpu(wm8350->reg_cache[i]);
1263                         value &= wm8350_reg_io_map[i].readable;
1264                         value &= ~wm8350_reg_io_map[i].vol;
1265                         wm8350->reg_cache[i] = value;
1266                 } else
1267                         wm8350->reg_cache[i] = reg_map[i];
1268         }
1269
1270 out:
1271         return ret;
1272 }
1273
1274 /*
1275  * Register a client device.  This is non-fatal since there is no need to
1276  * fail the entire device init due to a single platform device failing.
1277  */
1278 static void wm8350_client_dev_register(struct wm8350 *wm8350,
1279                                        const char *name,
1280                                        struct platform_device **pdev)
1281 {
1282         int ret;
1283
1284         *pdev = platform_device_alloc(name, -1);
1285         if (pdev == NULL) {
1286                 dev_err(wm8350->dev, "Failed to allocate %s\n", name);
1287                 return;
1288         }
1289
1290         (*pdev)->dev.parent = wm8350->dev;
1291         platform_set_drvdata(*pdev, wm8350);
1292         ret = platform_device_add(*pdev);
1293         if (ret != 0) {
1294                 dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
1295                 platform_device_put(*pdev);
1296                 *pdev = NULL;
1297         }
1298 }
1299
1300 int wm8350_device_init(struct wm8350 *wm8350, int irq,
1301                        struct wm8350_platform_data *pdata)
1302 {
1303         int ret;
1304         u16 id1, id2, mask_rev;
1305         u16 cust_id, mode, chip_rev;
1306
1307         /* get WM8350 revision and config mode */
1308         ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
1309         if (ret != 0) {
1310                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
1311                 goto err;
1312         }
1313
1314         ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
1315         if (ret != 0) {
1316                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
1317                 goto err;
1318         }
1319
1320         ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
1321                                &mask_rev);
1322         if (ret != 0) {
1323                 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
1324                 goto err;
1325         }
1326
1327         id1 = be16_to_cpu(id1);
1328         id2 = be16_to_cpu(id2);
1329         mask_rev = be16_to_cpu(mask_rev);
1330
1331         if (id1 != 0x6143) {
1332                 dev_err(wm8350->dev,
1333                         "Device with ID %x is not a WM8350\n", id1);
1334                 ret = -ENODEV;
1335                 goto err;
1336         }
1337
1338         mode = id2 & WM8350_CONF_STS_MASK >> 10;
1339         cust_id = id2 & WM8350_CUST_ID_MASK;
1340         chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
1341         dev_info(wm8350->dev,
1342                  "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
1343                  mode, cust_id, mask_rev, chip_rev);
1344
1345         if (cust_id != 0) {
1346                 dev_err(wm8350->dev, "Unsupported CUST_ID\n");
1347                 ret = -ENODEV;
1348                 goto err;
1349         }
1350
1351         switch (mask_rev) {
1352         case 0:
1353                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
1354                 wm8350->pmic.max_isink = WM8350_ISINK_B;
1355
1356                 switch (chip_rev) {
1357                 case WM8350_REV_E:
1358                         dev_info(wm8350->dev, "WM8350 Rev E\n");
1359                         break;
1360                 case WM8350_REV_F:
1361                         dev_info(wm8350->dev, "WM8350 Rev F\n");
1362                         break;
1363                 case WM8350_REV_G:
1364                         dev_info(wm8350->dev, "WM8350 Rev G\n");
1365                         wm8350->power.rev_g_coeff = 1;
1366                         break;
1367                 case WM8350_REV_H:
1368                         dev_info(wm8350->dev, "WM8350 Rev H\n");
1369                         wm8350->power.rev_g_coeff = 1;
1370                         break;
1371                 default:
1372                         /* For safety we refuse to run on unknown hardware */
1373                         dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
1374                         ret = -ENODEV;
1375                         goto err;
1376                 }
1377                 break;
1378
1379         case 1:
1380                 wm8350->pmic.max_dcdc = WM8350_DCDC_4;
1381                 wm8350->pmic.max_isink = WM8350_ISINK_A;
1382
1383                 switch (chip_rev) {
1384                 case 0:
1385                         dev_info(wm8350->dev, "WM8351 Rev A\n");
1386                         wm8350->power.rev_g_coeff = 1;
1387                         break;
1388
1389                 case 1:
1390                         dev_info(wm8350->dev, "WM8351 Rev B\n");
1391                         wm8350->power.rev_g_coeff = 1;
1392                         break;
1393
1394                 default:
1395                         dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
1396                         ret = -ENODEV;
1397                         goto err;
1398                 }
1399                 break;
1400
1401         case 2:
1402                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
1403                 wm8350->pmic.max_isink = WM8350_ISINK_B;
1404
1405                 switch (chip_rev) {
1406                 case 0:
1407                         dev_info(wm8350->dev, "WM8352 Rev A\n");
1408                         wm8350->power.rev_g_coeff = 1;
1409                         break;
1410
1411                 default:
1412                         dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
1413                         ret = -ENODEV;
1414                         goto err;
1415                 }
1416                 break;
1417
1418         default:
1419                 dev_err(wm8350->dev, "Unknown MASK_REV\n");
1420                 ret = -ENODEV;
1421                 goto err;
1422         }
1423
1424         ret = wm8350_create_cache(wm8350, mask_rev, mode);
1425         if (ret < 0) {
1426                 dev_err(wm8350->dev, "Failed to create register cache\n");
1427                 return ret;
1428         }
1429
1430         wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
1431         wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK, 0xFFFF);
1432         wm8350_reg_write(wm8350, WM8350_INT_STATUS_2_MASK, 0xFFFF);
1433         wm8350_reg_write(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, 0xFFFF);
1434         wm8350_reg_write(wm8350, WM8350_GPIO_INT_STATUS_MASK, 0xFFFF);
1435         wm8350_reg_write(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK, 0xFFFF);
1436
1437         mutex_init(&wm8350->auxadc_mutex);
1438         mutex_init(&wm8350->irq_mutex);
1439         INIT_WORK(&wm8350->irq_work, wm8350_irq_worker);
1440         if (irq) {
1441                 int flags = 0;
1442
1443                 if (pdata && pdata->irq_high) {
1444                         flags |= IRQF_TRIGGER_HIGH;
1445
1446                         wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
1447                                         WM8350_IRQ_POL);
1448                 } else {
1449                         flags |= IRQF_TRIGGER_LOW;
1450
1451                         wm8350_clear_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
1452                                           WM8350_IRQ_POL);
1453                 }
1454
1455                 ret = request_irq(irq, wm8350_irq, flags,
1456                                   "wm8350", wm8350);
1457                 if (ret != 0) {
1458                         dev_err(wm8350->dev, "Failed to request IRQ: %d\n",
1459                                 ret);
1460                         goto err;
1461                 }
1462         } else {
1463                 dev_err(wm8350->dev, "No IRQ configured\n");
1464                 goto err;
1465         }
1466         wm8350->chip_irq = irq;
1467
1468         if (pdata && pdata->init) {
1469                 ret = pdata->init(wm8350);
1470                 if (ret != 0) {
1471                         dev_err(wm8350->dev, "Platform init() failed: %d\n",
1472                                 ret);
1473                         goto err;
1474                 }
1475         }
1476
1477         wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
1478
1479         wm8350_client_dev_register(wm8350, "wm8350-codec",
1480                                    &(wm8350->codec.pdev));
1481         wm8350_client_dev_register(wm8350, "wm8350-gpio",
1482                                    &(wm8350->gpio.pdev));
1483         wm8350_client_dev_register(wm8350, "wm8350-power",
1484                                    &(wm8350->power.pdev));
1485         wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
1486         wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
1487
1488         return 0;
1489
1490 err:
1491         kfree(wm8350->reg_cache);
1492         return ret;
1493 }
1494 EXPORT_SYMBOL_GPL(wm8350_device_init);
1495
1496 void wm8350_device_exit(struct wm8350 *wm8350)
1497 {
1498         int i;
1499
1500         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
1501                 platform_device_unregister(wm8350->pmic.led[i].pdev);
1502
1503         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
1504                 platform_device_unregister(wm8350->pmic.pdev[i]);
1505
1506         platform_device_unregister(wm8350->wdt.pdev);
1507         platform_device_unregister(wm8350->rtc.pdev);
1508         platform_device_unregister(wm8350->power.pdev);
1509         platform_device_unregister(wm8350->gpio.pdev);
1510         platform_device_unregister(wm8350->codec.pdev);
1511
1512         free_irq(wm8350->chip_irq, wm8350);
1513         flush_work(&wm8350->irq_work);
1514         kfree(wm8350->reg_cache);
1515 }
1516 EXPORT_SYMBOL_GPL(wm8350_device_exit);
1517
1518 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
1519 MODULE_LICENSE("GPL");