git.oblomov.eu Git - linux-2.6/blob - arch/arm/mm/proc-arm720.S

   1 /*
   2  *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
   3  *
   4  *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
   5  *                     Rob Scott (rscott@mtrob.fdns.net)
   6  *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
   7  *  hacked for non-paged-MM by Hyok S. Choi, 2004.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  *
  23  *
  24  * These are the low level assembler for performing cache and TLB
  25  * functions on the ARM720T.  The ARM720T has a writethrough IDC
  26  * cache, so we don't need to clean it.
  27  *
  28  *  Changelog:
  29  *   05-09-2000 SJH     Created by moving 720 specific functions
  30  *                      out of 'proc-arm6,7.S' per RMK discussion
  31  *   07-25-2000 SJH     Added idle function.
  32  *   08-25-2000 DBS     Updated for integration of ARM Ltd version.
  33  *   04-20-2004 HSC     modified for non-paged memory management mode.
  34  */
  35 #include <linux/linkage.h>
  36 #include <linux/init.h>
  37 #include <asm/assembler.h>
  38 #include <asm/asm-offsets.h>
  39 #include <asm/pgtable-hwdef.h>
  40 #include <asm/pgtable.h>
  41 #include <asm/procinfo.h>
  42 #include <asm/ptrace.h>
  43
  44 /*
  45  * Function: arm720_proc_init (void)
  46  *         : arm720_proc_fin (void)
  47  *
  48  * Notes   : This processor does not require these
  49  */
  50 ENTRY(cpu_arm720_dcache_clean_area)
  51 ENTRY(cpu_arm720_proc_init)
  52                 mov     pc, lr
  53
  54 ENTRY(cpu_arm720_proc_fin)
  55                 stmfd   sp!, {lr}
  56                 mov     ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
  57                 msr     cpsr_c, ip
  58                 mrc     p15, 0, r0, c1, c0, 0
  59                 bic     r0, r0, #0x1000                 @ ...i............
  60                 bic     r0, r0, #0x000e                 @ ............wca.
  61                 mcr     p15, 0, r0, c1, c0, 0           @ disable caches
  62                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
  63                 ldmfd   sp!, {pc}
  64
  65 /*
  66  * Function: arm720_proc_do_idle(void)
  67  * Params  : r0 = unused
  68  * Purpose : put the processer in proper idle mode
  69  */
  70 ENTRY(cpu_arm720_do_idle)
  71                 mov     pc, lr
  72
  73 /*
  74  * Function: arm720_switch_mm(unsigned long pgd_phys)
  75  * Params  : pgd_phys   Physical address of page table
  76  * Purpose : Perform a task switch, saving the old process' state and restoring
  77  *           the new.
  78  */
  79 ENTRY(cpu_arm720_switch_mm)
  80 #ifdef CONFIG_MMU
  81                 mov     r1, #0
  82                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
  83                 mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
  84                 mcr     p15, 0, r1, c8, c7, 0           @ flush TLB (v4)
  85 #endif
  86                 mov     pc, lr
  87
  88 /*
  89  * Function: arm720_set_pte(pte_t *ptep, pte_t pte)
  90  * Params  : r0 = Address to set
  91  *         : r1 = value to set
  92  * Purpose : Set a PTE and flush it out of any WB cache
  93  */
  94                 .align  5
  95 ENTRY(cpu_arm720_set_pte)
  96 #ifdef CONFIG_MMU
  97                 str     r1, [r0], #-2048                @ linux version
  98
  99                 eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
 100
 101                 bic     r2, r1, #PTE_SMALL_AP_MASK
 102                 bic     r2, r2, #PTE_TYPE_MASK
 103                 orr     r2, r2, #PTE_TYPE_SMALL
 104
 105                 tst     r1, #L_PTE_USER                 @ User?
 106                 orrne   r2, r2, #PTE_SMALL_AP_URO_SRW
 107
 108                 tst     r1, #L_PTE_WRITE | L_PTE_DIRTY  @ Write and Dirty?
 109                 orreq   r2, r2, #PTE_SMALL_AP_UNO_SRW
 110
 111                 tst     r1, #L_PTE_PRESENT | L_PTE_YOUNG        @ Present and Young
 112                 movne   r2, #0
 113
 114                 str     r2, [r0]                        @ hardware version
 115 #endif
 116                 mov     pc, lr
 117
 118 /*
 119  * Function: arm720_reset
 120  * Params  : r0 = address to jump to
 121  * Notes   : This sets up everything for a reset
 122  */
 123 ENTRY(cpu_arm720_reset)
 124                 mov     ip, #0
 125                 mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
 126 #ifdef CONFIG_MMU
 127                 mcr     p15, 0, ip, c8, c7, 0           @ flush TLB (v4)
 128 #endif
 129                 mrc     p15, 0, ip, c1, c0, 0           @ get ctrl register
 130                 bic     ip, ip, #0x000f                 @ ............wcam
 131                 bic     ip, ip, #0x2100                 @ ..v....s........
 132                 mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
 133                 mov     pc, r0
 134
 135         __INIT
 136
 137         .type   __arm710_setup, #function
 138 __arm710_setup:
 139         mov     r0, #0
 140         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
 141 #ifdef CONFIG_MMU
 142         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
 143 #endif
 144         mrc     p15, 0, r0, c1, c0              @ get control register
 145         ldr     r5, arm710_cr1_clear
 146         bic     r0, r0, r5
 147         ldr     r5, arm710_cr1_set
 148         orr     r0, r0, r5
 149         mov     pc, lr                          @ __ret (head.S)
 150         .size   __arm710_setup, . - __arm710_setup
 151
 152         /*
 153          *  R
 154          * .RVI ZFRS BLDP WCAM
 155          * .... 0001 ..11 1101
 156          *
 157          */
 158         .type   arm710_cr1_clear, #object
 159         .type   arm710_cr1_set, #object
 160 arm710_cr1_clear:
 161         .word   0x0f3f
 162 arm710_cr1_set:
 163         .word   0x013d
 164
 165         .type   __arm720_setup, #function
 166 __arm720_setup:
 167         mov     r0, #0
 168         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
 169 #ifdef CONFIG_MMU
 170         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
 171 #endif
 172         mrc     p15, 0, r0, c1, c0              @ get control register
 173         ldr     r5, arm720_cr1_clear
 174         bic     r0, r0, r5
 175         ldr     r5, arm720_cr1_set
 176         orr     r0, r0, r5
 177         mov     pc, lr                          @ __ret (head.S)
 178         .size   __arm720_setup, . - __arm720_setup
 179
 180         /*
 181          *  R
 182          * .RVI ZFRS BLDP WCAM
 183          * ..1. 1001 ..11 1101
 184          *
 185          */
 186         .type   arm720_cr1_clear, #object
 187         .type   arm720_cr1_set, #object
 188 arm720_cr1_clear:
 189         .word   0x2f3f
 190 arm720_cr1_set:
 191         .word   0x213d
 192
 193                 __INITDATA
 194
 195 /*
 196  * Purpose : Function pointers used to access above functions - all calls
 197  *           come through these
 198  */
 199                 .type   arm720_processor_functions, #object
 200 ENTRY(arm720_processor_functions)
 201                 .word   v4t_late_abort
 202                 .word   cpu_arm720_proc_init
 203                 .word   cpu_arm720_proc_fin
 204                 .word   cpu_arm720_reset
 205                 .word   cpu_arm720_do_idle
 206                 .word   cpu_arm720_dcache_clean_area
 207                 .word   cpu_arm720_switch_mm
 208                 .word   cpu_arm720_set_pte
 209                 .size   arm720_processor_functions, . - arm720_processor_functions
 210
 211                 .section ".rodata"
 212
 213                 .type   cpu_arch_name, #object
 214 cpu_arch_name:  .asciz  "armv4t"
 215                 .size   cpu_arch_name, . - cpu_arch_name
 216
 217                 .type   cpu_elf_name, #object
 218 cpu_elf_name:   .asciz  "v4"
 219                 .size   cpu_elf_name, . - cpu_elf_name
 220
 221                 .type   cpu_arm710_name, #object
 222 cpu_arm710_name:
 223                 .asciz  "ARM710T"
 224                 .size   cpu_arm710_name, . - cpu_arm710_name
 225
 226                 .type   cpu_arm720_name, #object
 227 cpu_arm720_name:
 228                 .asciz  "ARM720T"
 229                 .size   cpu_arm720_name, . - cpu_arm720_name
 230
 231                 .align
 232
 233 /*
 234  * See linux/include/asm-arm/procinfo.h for a definition of this structure.
 235  */
 236
 237                 .section ".proc.info.init", #alloc, #execinstr
 238
 239                 .type   __arm710_proc_info, #object
 240 __arm710_proc_info:
 241                 .long   0x41807100                              @ cpu_val
 242                 .long   0xffffff00                              @ cpu_mask
 243                 .long   PMD_TYPE_SECT | \
 244                         PMD_SECT_BUFFERABLE | \
 245                         PMD_SECT_CACHEABLE | \
 246                         PMD_BIT4 | \
 247                         PMD_SECT_AP_WRITE | \
 248                         PMD_SECT_AP_READ
 249                 b       __arm710_setup                          @ cpu_flush
 250                 .long   cpu_arch_name                           @ arch_name
 251                 .long   cpu_elf_name                            @ elf_name
 252                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
 253                 .long   cpu_arm710_name                         @ name
 254                 .long   arm720_processor_functions
 255                 .long   v4_tlb_fns
 256                 .long   v4wt_user_fns
 257                 .long   v4_cache_fns
 258                 .size   __arm710_proc_info, . - __arm710_proc_info
 259
 260                 .type   __arm720_proc_info, #object
 261 __arm720_proc_info:
 262                 .long   0x41807200                              @ cpu_val
 263                 .long   0xffffff00                              @ cpu_mask
 264                 .long   PMD_TYPE_SECT | \
 265                         PMD_SECT_BUFFERABLE | \
 266                         PMD_SECT_CACHEABLE | \
 267                         PMD_BIT4 | \
 268                         PMD_SECT_AP_WRITE | \
 269                         PMD_SECT_AP_READ
 270                 b       __arm720_setup                          @ cpu_flush
 271                 .long   cpu_arch_name                           @ arch_name
 272                 .long   cpu_elf_name                            @ elf_name
 273                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
 274                 .long   cpu_arm720_name                         @ name
 275                 .long   arm720_processor_functions
 276                 .long   v4_tlb_fns
 277                 .long   v4wt_user_fns
 278                 .long   v4_cache_fns
 279                 .size   __arm720_proc_info, . - __arm720_proc_info