2 * Copyright (C) 2002 Intersil Americas Inc.
3 * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
4 * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/module.h>
23 #include <linux/netdevice.h>
24 #include <linux/ethtool.h>
25 #include <linux/pci.h>
26 #include <linux/etherdevice.h>
27 #include <linux/delay.h>
28 #include <linux/if_arp.h>
32 #include "prismcompat.h"
34 #include "isl_ioctl.h"
35 #include "islpci_dev.h"
36 #include "islpci_mgt.h"
37 #include "islpci_eth.h"
40 #define ISL3877_IMAGE_FILE "isl3877"
41 #define ISL3886_IMAGE_FILE "isl3886"
42 #define ISL3890_IMAGE_FILE "isl3890"
44 static int prism54_bring_down(islpci_private *);
45 static int islpci_alloc_memory(islpci_private *);
47 /* Temporary dummy MAC address to use until firmware is loaded.
48 * The idea there is that some tools (such as nameif) may query
49 * the MAC address before the netdev is 'open'. By using a valid
50 * OUI prefix, they can process the netdev properly.
51 * Of course, this is not the final/real MAC address. It doesn't
52 * matter, as you are suppose to be able to change it anytime via
53 * ndev->set_mac_address. Jean II */
54 static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
57 isl_upload_firmware(islpci_private *priv)
60 void __iomem *device_base = priv->device_base;
62 /* clear the RAMBoot and the Reset bit */
63 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
64 reg &= ~ISL38XX_CTRL_STAT_RESET;
65 reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
66 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
68 udelay(ISL38XX_WRITEIO_DELAY);
70 /* set the Reset bit without reading the register ! */
71 reg |= ISL38XX_CTRL_STAT_RESET;
72 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
74 udelay(ISL38XX_WRITEIO_DELAY);
76 /* clear the Reset bit */
77 reg &= ~ISL38XX_CTRL_STAT_RESET;
78 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
81 /* wait a while for the device to reboot */
85 const struct firmware *fw_entry = NULL;
89 rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
92 "%s: request_firmware() failed for '%s'\n",
93 "prism54", priv->firmware);
96 /* prepare the Direct Memory Base register */
97 reg = ISL38XX_DEV_FIRMWARE_ADDRES;
99 fw_ptr = (u32 *) fw_entry->data;
100 fw_len = fw_entry->size;
104 "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
105 "prism54", priv->firmware);
106 release_firmware(fw_entry);
107 return -EILSEQ; /* Illegal byte sequence */;
113 ISL38XX_MEMORY_WINDOW_SIZE) ?
114 ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
115 u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
117 /* set the card's base address for writing the data */
118 isl38xx_w32_flush(device_base, reg,
119 ISL38XX_DIR_MEM_BASE_REG);
120 wmb(); /* be paranoid */
122 /* increment the write address for next iteration */
126 /* write the data to the Direct Memory Window 32bit-wise */
127 /* memcpy_toio() doesn't guarantee 32bit writes :-| */
128 while (_fw_len > 0) {
129 /* use non-swapping writel() */
130 __raw_writel(*fw_ptr, dev_fw_ptr);
131 fw_ptr++, dev_fw_ptr++;
135 /* flush PCI posting */
136 (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
137 wmb(); /* be paranoid again */
139 BUG_ON(_fw_len != 0);
144 /* Firmware version is at offset 40 (also for "newmac") */
145 printk(KERN_DEBUG "%s: firmware version: %.8s\n",
146 priv->ndev->name, fw_entry->data + 40);
148 release_firmware(fw_entry);
151 /* now reset the device
152 * clear the Reset & ClkRun bit, set the RAMBoot bit */
153 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
154 reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
155 reg &= ~ISL38XX_CTRL_STAT_RESET;
156 reg |= ISL38XX_CTRL_STAT_RAMBOOT;
157 isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
159 udelay(ISL38XX_WRITEIO_DELAY);
161 /* set the reset bit latches the host override and RAMBoot bits
162 * into the device for operation when the reset bit is reset */
163 reg |= ISL38XX_CTRL_STAT_RESET;
164 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
165 /* don't do flush PCI posting here! */
167 udelay(ISL38XX_WRITEIO_DELAY);
169 /* clear the reset bit should start the whole circus */
170 reg &= ~ISL38XX_CTRL_STAT_RESET;
171 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
172 /* don't do flush PCI posting here! */
174 udelay(ISL38XX_WRITEIO_DELAY);
179 /******************************************************************************
180 Device Interrupt Handler
181 ******************************************************************************/
184 islpci_interrupt(int irq, void *config)
187 islpci_private *priv = config;
188 struct net_device *ndev = priv->ndev;
189 void __iomem *device = priv->device_base;
190 int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
192 /* lock the interrupt handler */
193 spin_lock(&priv->slock);
195 /* received an interrupt request on a shared IRQ line
196 * first check whether the device is in sleep mode */
197 reg = readl(device + ISL38XX_CTRL_STAT_REG);
198 if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
199 /* device is in sleep mode, IRQ was generated by someone else */
201 #if VERBOSE > SHOW_ERROR_MESSAGES
202 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
204 spin_unlock(&priv->slock);
209 /* check whether there is any source of interrupt on the device */
210 reg = readl(device + ISL38XX_INT_IDENT_REG);
212 /* also check the contents of the Interrupt Enable Register, because this
213 * will filter out interrupt sources from other devices on the same irq ! */
214 reg &= readl(device + ISL38XX_INT_EN_REG);
215 reg &= ISL38XX_INT_SOURCES;
218 if (islpci_get_state(priv) != PRV_STATE_SLEEP)
219 powerstate = ISL38XX_PSM_ACTIVE_STATE;
221 /* reset the request bits in the Identification register */
222 isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
224 #if VERBOSE > SHOW_ERROR_MESSAGES
225 DEBUG(SHOW_FUNCTION_CALLS,
226 "IRQ: Identification register 0x%p 0x%x \n", device, reg);
229 /* check for each bit in the register separately */
230 if (reg & ISL38XX_INT_IDENT_UPDATE) {
231 #if VERBOSE > SHOW_ERROR_MESSAGES
232 /* Queue has been updated */
233 DEBUG(SHOW_TRACING, "IRQ: Update flag \n");
235 DEBUG(SHOW_QUEUE_INDEXES,
236 "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
237 le32_to_cpu(priv->control_block->
238 driver_curr_frag[0]),
239 le32_to_cpu(priv->control_block->
240 driver_curr_frag[1]),
241 le32_to_cpu(priv->control_block->
242 driver_curr_frag[2]),
243 le32_to_cpu(priv->control_block->
244 driver_curr_frag[3]),
245 le32_to_cpu(priv->control_block->
246 driver_curr_frag[4]),
247 le32_to_cpu(priv->control_block->
251 DEBUG(SHOW_QUEUE_INDEXES,
252 "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
253 le32_to_cpu(priv->control_block->
254 device_curr_frag[0]),
255 le32_to_cpu(priv->control_block->
256 device_curr_frag[1]),
257 le32_to_cpu(priv->control_block->
258 device_curr_frag[2]),
259 le32_to_cpu(priv->control_block->
260 device_curr_frag[3]),
261 le32_to_cpu(priv->control_block->
262 device_curr_frag[4]),
263 le32_to_cpu(priv->control_block->
268 /* cleanup the data low transmit queue */
269 islpci_eth_cleanup_transmit(priv, priv->control_block);
271 /* device is in active state, update the
272 * powerstate flag if necessary */
273 powerstate = ISL38XX_PSM_ACTIVE_STATE;
275 /* check all three queues in priority order
276 * call the PIMFOR receive function until the
278 if (isl38xx_in_queue(priv->control_block,
279 ISL38XX_CB_RX_MGMTQ) != 0) {
280 #if VERBOSE > SHOW_ERROR_MESSAGES
282 "Received frame in Management Queue\n");
284 islpci_mgt_receive(ndev);
286 islpci_mgt_cleanup_transmit(ndev);
288 /* Refill slots in receive queue */
289 islpci_mgmt_rx_fill(ndev);
291 /* no need to trigger the device, next
292 islpci_mgt_transaction does it */
295 while (isl38xx_in_queue(priv->control_block,
296 ISL38XX_CB_RX_DATA_LQ) != 0) {
297 #if VERBOSE > SHOW_ERROR_MESSAGES
299 "Received frame in Data Low Queue \n");
301 islpci_eth_receive(priv);
304 /* check whether the data transmit queues were full */
305 if (priv->data_low_tx_full) {
306 /* check whether the transmit is not full anymore */
307 if (ISL38XX_CB_TX_QSIZE -
308 isl38xx_in_queue(priv->control_block,
309 ISL38XX_CB_TX_DATA_LQ) >=
310 ISL38XX_MIN_QTHRESHOLD) {
311 /* nope, the driver is ready for more network frames */
312 netif_wake_queue(priv->ndev);
314 /* reset the full flag */
315 priv->data_low_tx_full = 0;
320 if (reg & ISL38XX_INT_IDENT_INIT) {
321 /* Device has been initialized */
322 #if VERBOSE > SHOW_ERROR_MESSAGES
324 "IRQ: Init flag, device initialized \n");
326 wake_up(&priv->reset_done);
329 if (reg & ISL38XX_INT_IDENT_SLEEP) {
330 /* Device intends to move to powersave state */
331 #if VERBOSE > SHOW_ERROR_MESSAGES
332 DEBUG(SHOW_TRACING, "IRQ: Sleep flag \n");
334 isl38xx_handle_sleep_request(priv->control_block,
339 if (reg & ISL38XX_INT_IDENT_WAKEUP) {
340 /* Device has been woken up to active state */
341 #if VERBOSE > SHOW_ERROR_MESSAGES
342 DEBUG(SHOW_TRACING, "IRQ: Wakeup flag \n");
345 isl38xx_handle_wakeup(priv->control_block,
346 &powerstate, priv->device_base);
349 #if VERBOSE > SHOW_ERROR_MESSAGES
350 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
352 spin_unlock(&priv->slock);
357 if (islpci_get_state(priv) == PRV_STATE_SLEEP
358 && powerstate == ISL38XX_PSM_ACTIVE_STATE)
359 islpci_set_state(priv, PRV_STATE_READY);
361 /* !sleep -> sleep */
362 if (islpci_get_state(priv) != PRV_STATE_SLEEP
363 && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
364 islpci_set_state(priv, PRV_STATE_SLEEP);
366 /* unlock the interrupt handler */
367 spin_unlock(&priv->slock);
372 /******************************************************************************
373 Network Interface Control & Statistical functions
374 ******************************************************************************/
376 islpci_open(struct net_device *ndev)
379 islpci_private *priv = netdev_priv(ndev);
381 /* reset data structures, upload firmware and reset device */
382 rc = islpci_reset(priv,1);
384 prism54_bring_down(priv);
385 return rc; /* Returns informative message */
388 netif_start_queue(ndev);
390 /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
391 * once the firmware receives a trap of being associated
392 * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
393 * should just leave the carrier on as its expected the firmware
394 * won't send us a trigger. */
395 if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
396 netif_carrier_off(ndev);
398 netif_carrier_on(ndev);
404 islpci_close(struct net_device *ndev)
406 islpci_private *priv = netdev_priv(ndev);
408 printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
410 netif_stop_queue(ndev);
412 return prism54_bring_down(priv);
416 prism54_bring_down(islpci_private *priv)
418 void __iomem *device_base = priv->device_base;
420 /* we are going to shutdown the device */
421 islpci_set_state(priv, PRV_STATE_PREBOOT);
423 /* disable all device interrupts in case they weren't */
424 isl38xx_disable_interrupts(priv->device_base);
426 /* For safety reasons, we may want to ensure that no DMA transfer is
427 * currently in progress by emptying the TX and RX queues. */
429 /* wait until interrupts have finished executing on other CPUs */
430 synchronize_irq(priv->pdev->irq);
432 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
433 reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
434 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
436 udelay(ISL38XX_WRITEIO_DELAY);
438 reg |= ISL38XX_CTRL_STAT_RESET;
439 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
441 udelay(ISL38XX_WRITEIO_DELAY);
443 /* clear the Reset bit */
444 reg &= ~ISL38XX_CTRL_STAT_RESET;
445 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
448 /* wait a while for the device to reset */
449 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
455 islpci_upload_fw(islpci_private *priv)
457 islpci_state_t old_state;
460 old_state = islpci_set_state(priv, PRV_STATE_BOOT);
462 printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
464 rc = isl_upload_firmware(priv);
466 /* error uploading the firmware */
467 printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
468 priv->ndev->name, priv->firmware);
470 islpci_set_state(priv, old_state);
474 printk(KERN_DEBUG "%s: firmware upload complete\n",
477 islpci_set_state(priv, PRV_STATE_POSTBOOT);
483 islpci_reset_if(islpci_private *priv)
490 prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
492 /* now the last step is to reset the interface */
493 isl38xx_interface_reset(priv->device_base, priv->device_host_address);
494 islpci_set_state(priv, PRV_STATE_PREINIT);
496 for(count = 0; count < 2 && result; count++) {
497 /* The software reset acknowledge needs about 220 msec here.
498 * Be conservative and wait for up to one second. */
500 remaining = schedule_timeout_uninterruptible(HZ);
507 /* If we're here it's because our IRQ hasn't yet gone through.
508 * Retry a bit more...
510 printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
514 finish_wait(&priv->reset_done, &wait);
517 printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
521 islpci_set_state(priv, PRV_STATE_INIT);
523 /* Now that the device is 100% up, let's allow
524 * for the other interrupts --
525 * NOTE: this is not *yet* true since we've only allowed the
526 * INIT interrupt on the IRQ line. We can perhaps poll
527 * the IRQ line until we know for sure the reset went through */
528 isl38xx_enable_common_interrupts(priv->device_base);
530 down_write(&priv->mib_sem);
531 result = mgt_commit(priv);
533 printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
534 up_write(&priv->mib_sem);
537 up_write(&priv->mib_sem);
539 islpci_set_state(priv, PRV_STATE_READY);
541 printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
546 islpci_reset(islpci_private *priv, int reload_firmware)
548 isl38xx_control_block *cb = /* volatile not needed */
549 (isl38xx_control_block *) priv->control_block;
554 islpci_set_state(priv, PRV_STATE_PREBOOT);
556 islpci_set_state(priv, PRV_STATE_POSTBOOT);
558 printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
560 /* disable all device interrupts in case they weren't */
561 isl38xx_disable_interrupts(priv->device_base);
563 /* flush all management queues */
564 priv->index_mgmt_tx = 0;
565 priv->index_mgmt_rx = 0;
567 /* clear the indexes in the frame pointer */
568 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
569 cb->driver_curr_frag[counter] = cpu_to_le32(0);
570 cb->device_curr_frag[counter] = cpu_to_le32(0);
573 /* reset the mgmt receive queue */
574 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
575 isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
576 frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
578 frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
581 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
582 cb->rx_data_low[counter].address =
583 cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
586 /* since the receive queues are filled with empty fragments, now we can
587 * set the corresponding indexes in the Control Block */
588 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
589 cpu_to_le32(ISL38XX_CB_RX_QSIZE);
590 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
591 cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
593 /* reset the remaining real index registers and full flags */
594 priv->free_data_rx = 0;
595 priv->free_data_tx = 0;
596 priv->data_low_tx_full = 0;
598 if (reload_firmware) { /* Should we load the firmware ? */
599 /* now that the data structures are cleaned up, upload
600 * firmware and reset interface */
601 rc = islpci_upload_fw(priv);
603 printk(KERN_ERR "%s: islpci_reset: failure\n",
609 /* finally reset interface */
610 rc = islpci_reset_if(priv);
612 printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
616 /******************************************************************************
617 Network device configuration functions
618 ******************************************************************************/
620 islpci_alloc_memory(islpci_private *priv)
624 #if VERBOSE > SHOW_ERROR_MESSAGES
625 printk(KERN_DEBUG "islpci_alloc_memory\n");
628 /* remap the PCI device base address to accessable */
629 if (!(priv->device_base =
630 ioremap(pci_resource_start(priv->pdev, 0),
631 ISL38XX_PCI_MEM_SIZE))) {
632 /* error in remapping the PCI device memory address range */
633 printk(KERN_ERR "PCI memory remapping failed \n");
637 /* memory layout for consistent DMA region:
639 * Area 1: Control Block for the device interface
640 * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
641 * the number of supported stations in the AP determines the minimal
642 * size of the buffer !
645 /* perform the allocation */
646 priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
649 device_host_address);
651 if (!priv->driver_mem_address) {
652 /* error allocating the block of PCI memory */
653 printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
658 /* assign the Control Block to the first address of the allocated area */
659 priv->control_block =
660 (isl38xx_control_block *) priv->driver_mem_address;
662 /* set the Power Save Buffer pointer directly behind the CB */
663 priv->device_psm_buffer =
664 priv->device_host_address + CONTROL_BLOCK_SIZE;
666 /* make sure all buffer pointers are initialized */
667 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
668 priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
669 priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
672 priv->index_mgmt_rx = 0;
673 memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
674 memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
676 /* allocate rx queue for management frames */
677 if (islpci_mgmt_rx_fill(priv->ndev) < 0)
680 /* now get the data rx skb's */
681 memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
682 memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
684 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
687 /* allocate an sk_buff for received data frames storage
688 * each frame on receive size consists of 1 fragment
689 * include any required allignment operations */
690 if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
691 /* error allocating an sk_buff structure elements */
692 printk(KERN_ERR "Error allocating skb.\n");
696 skb_reserve(skb, (4 - (long) skb->data) & 0x03);
697 /* add the new allocated sk_buff to the buffer array */
698 priv->data_low_rx[counter] = skb;
700 /* map the allocated skb data area to pci */
701 priv->pci_map_rx_address[counter] =
702 pci_map_single(priv->pdev, (void *) skb->data,
703 MAX_FRAGMENT_SIZE_RX + 2,
705 if (!priv->pci_map_rx_address[counter]) {
706 /* error mapping the buffer to device
707 accessable memory address */
708 printk(KERN_ERR "failed to map skb DMA'able\n");
713 prism54_acl_init(&priv->acl);
714 prism54_wpa_bss_ie_init(priv);
720 islpci_free_memory(priv);
725 islpci_free_memory(islpci_private *priv)
729 if (priv->device_base)
730 iounmap(priv->device_base);
731 priv->device_base = NULL;
733 /* free consistent DMA area... */
734 if (priv->driver_mem_address)
735 pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
736 priv->driver_mem_address,
737 priv->device_host_address);
739 /* clear some dangling pointers */
740 priv->driver_mem_address = NULL;
741 priv->device_host_address = 0;
742 priv->device_psm_buffer = 0;
743 priv->control_block = NULL;
745 /* clean up mgmt rx buffers */
746 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
747 struct islpci_membuf *buf = &priv->mgmt_rx[counter];
749 pci_unmap_single(priv->pdev, buf->pci_addr,
750 buf->size, PCI_DMA_FROMDEVICE);
757 /* clean up data rx buffers */
758 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
759 if (priv->pci_map_rx_address[counter])
760 pci_unmap_single(priv->pdev,
761 priv->pci_map_rx_address[counter],
762 MAX_FRAGMENT_SIZE_RX + 2,
764 priv->pci_map_rx_address[counter] = 0;
766 if (priv->data_low_rx[counter])
767 dev_kfree_skb(priv->data_low_rx[counter]);
768 priv->data_low_rx[counter] = NULL;
771 /* Free the acces control list and the WPA list */
772 prism54_acl_clean(&priv->acl);
773 prism54_wpa_bss_ie_clean(priv);
781 islpci_set_multicast_list(struct net_device *dev)
783 /* put device into promisc mode and let network layer handle it */
787 static void islpci_ethtool_get_drvinfo(struct net_device *dev,
788 struct ethtool_drvinfo *info)
790 strcpy(info->driver, DRV_NAME);
791 strcpy(info->version, DRV_VERSION);
794 static const struct ethtool_ops islpci_ethtool_ops = {
795 .get_drvinfo = islpci_ethtool_get_drvinfo,
798 static const struct net_device_ops islpci_netdev_ops = {
799 .ndo_open = islpci_open,
800 .ndo_stop = islpci_close,
801 .ndo_do_ioctl = prism54_ioctl,
802 .ndo_start_xmit = islpci_eth_transmit,
803 .ndo_tx_timeout = islpci_eth_tx_timeout,
804 .ndo_set_mac_address = prism54_set_mac_address,
805 .ndo_change_mtu = eth_change_mtu,
806 .ndo_set_mac_address = eth_mac_addr,
807 .ndo_validate_addr = eth_validate_addr,
811 islpci_setup(struct pci_dev *pdev)
813 islpci_private *priv;
814 struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
819 pci_set_drvdata(pdev, ndev);
820 #if defined(SET_NETDEV_DEV)
821 SET_NETDEV_DEV(ndev, &pdev->dev);
824 /* setup the structure members */
825 ndev->base_addr = pci_resource_start(pdev, 0);
826 ndev->irq = pdev->irq;
828 /* initialize the function pointers */
829 ndev->netdev_ops = &islpci_netdev_ops;
830 ndev->wireless_handlers = &prism54_handler_def;
831 ndev->ethtool_ops = &islpci_ethtool_ops;
833 /* ndev->set_multicast_list = &islpci_set_multicast_list; */
834 ndev->addr_len = ETH_ALEN;
835 /* Get a non-zero dummy MAC address for nameif. Jean II */
836 memcpy(ndev->dev_addr, dummy_mac, 6);
838 ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
840 /* allocate a private device structure to the network device */
841 priv = netdev_priv(ndev);
844 priv->monitor_type = ARPHRD_IEEE80211;
845 priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
846 priv->monitor_type : ARPHRD_ETHER;
848 /* Add pointers to enable iwspy support. */
849 priv->wireless_data.spy_data = &priv->spy_data;
850 ndev->wireless_data = &priv->wireless_data;
852 /* save the start and end address of the PCI memory area */
853 ndev->mem_start = (unsigned long) priv->device_base;
854 ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
856 #if VERBOSE > SHOW_ERROR_MESSAGES
857 DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
860 init_waitqueue_head(&priv->reset_done);
862 /* init the queue read locks, process wait counter */
863 mutex_init(&priv->mgmt_lock);
864 priv->mgmt_received = NULL;
865 init_waitqueue_head(&priv->mgmt_wqueue);
866 mutex_init(&priv->stats_lock);
867 spin_lock_init(&priv->slock);
869 /* init state machine with off#1 state */
870 priv->state = PRV_STATE_OFF;
873 /* initialize workqueue's */
874 INIT_WORK(&priv->stats_work, prism54_update_stats);
875 priv->stats_timestamp = 0;
877 INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
878 priv->reset_task_pending = 0;
880 /* allocate various memory areas */
881 if (islpci_alloc_memory(priv))
884 /* select the firmware file depending on the device id */
885 switch (pdev->device) {
887 strcpy(priv->firmware, ISL3877_IMAGE_FILE);
891 strcpy(priv->firmware, ISL3886_IMAGE_FILE);
895 strcpy(priv->firmware, ISL3890_IMAGE_FILE);
899 if (register_netdev(ndev)) {
900 DEBUG(SHOW_ERROR_MESSAGES,
901 "ERROR: register_netdev() failed \n");
902 goto do_islpci_free_memory;
907 do_islpci_free_memory:
908 islpci_free_memory(priv);
910 pci_set_drvdata(pdev, NULL);
917 islpci_set_state(islpci_private *priv, islpci_state_t new_state)
919 islpci_state_t old_state;
922 old_state = priv->state;
924 /* this means either a race condition or some serious error in
930 priv->state = new_state;
933 case PRV_STATE_PREBOOT:
934 /* there are actually many off-states, enumerated by
936 if (old_state == PRV_STATE_OFF)
939 /* only if hw_unavailable is zero now it means we either
940 * were in off#1 state, or came here from
942 if (!priv->state_off)
943 priv->state = new_state;
947 printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
948 priv->ndev->name, old_state, new_state, priv->state_off);
952 BUG_ON(priv->state_off < 0);
953 BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
954 BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));