ide: another possible ide panic fix for blk-end-request
[linux-2.6] / drivers / video / sm501fb.c
1 /* linux/drivers/video/sm501fb.c
2  *
3  * Copyright (c) 2006 Simtec Electronics
4  *      Vincent Sanders <vince@simtec.co.uk>
5  *      Ben Dooks <ben@simtec.co.uk>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * Framebuffer driver for the Silicon Motion SM501
12  */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/tty.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/fb.h>
23 #include <linux/init.h>
24 #include <linux/vmalloc.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/wait.h>
29 #include <linux/platform_device.h>
30 #include <linux/clk.h>
31 #include <linux/console.h>
32
33 #include <asm/io.h>
34 #include <asm/uaccess.h>
35 #include <asm/div64.h>
36
37 #ifdef CONFIG_PM
38 #include <linux/pm.h>
39 #endif
40
41 #include <linux/sm501.h>
42 #include <linux/sm501-regs.h>
43
44 #define NR_PALETTE      256
45
46 enum sm501_controller {
47         HEAD_CRT        = 0,
48         HEAD_PANEL      = 1,
49 };
50
51 /* SM501 memory address */
52 struct sm501_mem {
53         unsigned long    size;
54         unsigned long    sm_addr;
55         void __iomem    *k_addr;
56 };
57
58 /* private data that is shared between all frambuffers* */
59 struct sm501fb_info {
60         struct device           *dev;
61         struct fb_info          *fb[2];         /* fb info for both heads */
62         struct resource         *fbmem_res;     /* framebuffer resource */
63         struct resource         *regs_res;      /* registers resource */
64         struct sm501_platdata_fb *pdata;        /* our platform data */
65
66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
67
68         int                      irq;
69         int                      swap_endian;   /* set to swap rgb=>bgr */
70         void __iomem            *regs;          /* remapped registers */
71         void __iomem            *fbmem;         /* remapped framebuffer */
72         size_t                   fbmem_len;     /* length of remapped region */
73 };
74
75 /* per-framebuffer private data */
76 struct sm501fb_par {
77         u32                      pseudo_palette[16];
78
79         enum sm501_controller    head;
80         struct sm501_mem         cursor;
81         struct sm501_mem         screen;
82         struct fb_ops            ops;
83
84         void                    *store_fb;
85         void                    *store_cursor;
86         void __iomem            *cursor_regs;
87         struct sm501fb_info     *info;
88 };
89
90 /* Helper functions */
91
92 static inline int h_total(struct fb_var_screeninfo *var)
93 {
94         return var->xres + var->left_margin +
95                 var->right_margin + var->hsync_len;
96 }
97
98 static inline int v_total(struct fb_var_screeninfo *var)
99 {
100         return var->yres + var->upper_margin +
101                 var->lower_margin + var->vsync_len;
102 }
103
104 /* sm501fb_sync_regs()
105  *
106  * This call is mainly for PCI bus systems where we need to
107  * ensure that any writes to the bus are completed before the
108  * next phase, or after completing a function.
109 */
110
111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
112 {
113         readl(info->regs);
114 }
115
116 /* sm501_alloc_mem
117  *
118  * This is an attempt to lay out memory for the two framebuffers and
119  * everything else
120  *
121  * |fbmem_res->start                                           fbmem_res->end|
122  * |                                                                         |
123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
125  *
126  * The "spare" space is for the 2d engine data
127  * the fixed is space for the cursors (2x1Kbyte)
128  *
129  * we need to allocate memory for the 2D acceleration engine
130  * command list and the data for the engine to deal with.
131  *
132  * - all allocations must be 128bit aligned
133  * - cursors are 64x64x2 bits (1Kbyte)
134  *
135  */
136
137 #define SM501_MEMF_CURSOR               (1)
138 #define SM501_MEMF_PANEL                (2)
139 #define SM501_MEMF_CRT                  (4)
140 #define SM501_MEMF_ACCEL                (8)
141
142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
143                            unsigned int why, size_t size)
144 {
145         unsigned int ptr = 0;
146
147         switch (why) {
148         case SM501_MEMF_CURSOR:
149                 ptr = inf->fbmem_len - size;
150                 inf->fbmem_len = ptr;
151                 break;
152
153         case SM501_MEMF_PANEL:
154                 ptr = inf->fbmem_len - size;
155                 if (ptr < inf->fb[0]->fix.smem_len)
156                         return -ENOMEM;
157
158                 break;
159
160         case SM501_MEMF_CRT:
161                 ptr = 0;
162                 break;
163
164         case SM501_MEMF_ACCEL:
165                 ptr = inf->fb[0]->fix.smem_len;
166
167                 if ((ptr + size) >
168                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
169                         return -ENOMEM;
170                 break;
171
172         default:
173                 return -EINVAL;
174         }
175
176         mem->size    = size;
177         mem->sm_addr = ptr;
178         mem->k_addr  = inf->fbmem + ptr;
179
180         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
181                 __func__, mem->sm_addr, mem->k_addr, why, size);
182
183         return 0;
184 }
185
186 /* sm501fb_ps_to_hz
187  *
188  * Converts a period in picoseconds to Hz.
189  *
190  * Note, we try to keep this in Hz to minimise rounding with
191  * the limited PLL settings on the SM501.
192 */
193
194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
195 {
196         unsigned long long numerator=1000000000000ULL;
197
198         /* 10^12 / picosecond period gives frequency in Hz */
199         do_div(numerator, psvalue);
200         return (unsigned long)numerator;
201 }
202
203 /* sm501fb_hz_to_ps is identical to the oposite transform */
204
205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
206
207 /* sm501fb_setup_gamma
208  *
209  * Programs a linear 1.0 gamma ramp in case the gamma
210  * correction is enabled without programming anything else.
211 */
212
213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
214                                 unsigned long palette)
215 {
216         unsigned long value = 0;
217         int offset;
218
219         /* set gamma values */
220         for (offset = 0; offset < 256 * 4; offset += 4) {
221                 writel(value, fbi->regs + palette + offset);
222                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
223         }
224 }
225
226 /* sm501fb_check_var
227  *
228  * check common variables for both panel and crt
229 */
230
231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
232                              struct fb_info *info)
233 {
234         struct sm501fb_par  *par = info->par;
235         struct sm501fb_info *sm  = par->info;
236         unsigned long tmp;
237
238         /* check we can fit these values into the registers */
239
240         if (var->hsync_len > 255 || var->vsync_len > 255)
241                 return -EINVAL;
242
243         if ((var->xres + var->right_margin) >= 4096)
244                 return -EINVAL;
245
246         if ((var->yres + var->lower_margin) > 2048)
247                 return -EINVAL;
248
249         /* hard limits of device */
250
251         if (h_total(var) > 4096 || v_total(var) > 2048)
252                 return -EINVAL;
253
254         /* check our line length is going to be 128 bit aligned */
255
256         tmp = (var->xres * var->bits_per_pixel) / 8;
257         if ((tmp & 15) != 0)
258                 return -EINVAL;
259
260         /* check the virtual size */
261
262         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
263                 return -EINVAL;
264
265         /* can cope with 8,16 or 32bpp */
266
267         if (var->bits_per_pixel <= 8)
268                 var->bits_per_pixel = 8;
269         else if (var->bits_per_pixel <= 16)
270                 var->bits_per_pixel = 16;
271         else if (var->bits_per_pixel == 24)
272                 var->bits_per_pixel = 32;
273
274         /* set r/g/b positions and validate bpp */
275         switch(var->bits_per_pixel) {
276         case 8:
277                 var->red.length         = var->bits_per_pixel;
278                 var->red.offset         = 0;
279                 var->green.length       = var->bits_per_pixel;
280                 var->green.offset       = 0;
281                 var->blue.length        = var->bits_per_pixel;
282                 var->blue.offset        = 0;
283                 var->transp.length      = 0;
284
285                 break;
286
287         case 16:
288                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
289                         var->red.offset         = 11;
290                         var->green.offset       = 5;
291                         var->blue.offset        = 0;
292                 } else {
293                         var->blue.offset        = 11;
294                         var->green.offset       = 5;
295                         var->red.offset         = 0;
296                 }
297
298                 var->red.length         = 5;
299                 var->green.length       = 6;
300                 var->blue.length        = 5;
301                 var->transp.length      = 0;
302                 break;
303
304         case 32:
305                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
306                         var->transp.offset      = 0;
307                         var->red.offset         = 8;
308                         var->green.offset       = 16;
309                         var->blue.offset        = 24;
310                 } else {
311                         var->transp.offset      = 24;
312                         var->red.offset         = 16;
313                         var->green.offset       = 8;
314                         var->blue.offset        = 0;
315                 }
316
317                 var->red.length         = 8;
318                 var->green.length       = 8;
319                 var->blue.length        = 8;
320                 var->transp.length      = 0;
321                 break;
322
323         default:
324                 return -EINVAL;
325         }
326
327         return 0;
328 }
329
330 /*
331  * sm501fb_check_var_crt():
332  *
333  * check the parameters for the CRT head, and either bring them
334  * back into range, or return -EINVAL.
335 */
336
337 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
338                                  struct fb_info *info)
339 {
340         return sm501fb_check_var(var, info);
341 }
342
343 /* sm501fb_check_var_pnl():
344  *
345  * check the parameters for the CRT head, and either bring them
346  * back into range, or return -EINVAL.
347 */
348
349 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
350                                  struct fb_info *info)
351 {
352         return sm501fb_check_var(var, info);
353 }
354
355 /* sm501fb_set_par_common
356  *
357  * set common registers for framebuffers
358 */
359
360 static int sm501fb_set_par_common(struct fb_info *info,
361                                   struct fb_var_screeninfo *var)
362 {
363         struct sm501fb_par  *par = info->par;
364         struct sm501fb_info *fbi = par->info;
365         unsigned long pixclock;      /* pixelclock in Hz */
366         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
367         unsigned int mem_type;
368         unsigned int clock_type;
369         unsigned int head_addr;
370
371         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
372                 __func__, var->xres, var->yres, var->bits_per_pixel,
373                 var->xres_virtual, var->yres_virtual);
374
375         switch (par->head) {
376         case HEAD_CRT:
377                 mem_type = SM501_MEMF_CRT;
378                 clock_type = SM501_CLOCK_V2XCLK;
379                 head_addr = SM501_DC_CRT_FB_ADDR;
380                 break;
381
382         case HEAD_PANEL:
383                 mem_type = SM501_MEMF_PANEL;
384                 clock_type = SM501_CLOCK_P2XCLK;
385                 head_addr = SM501_DC_PANEL_FB_ADDR;
386                 break;
387
388         default:
389                 mem_type = 0;           /* stop compiler warnings */
390                 head_addr = 0;
391                 clock_type = 0;
392         }
393
394         switch (var->bits_per_pixel) {
395         case 8:
396                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
397                 break;
398
399         case 16:
400                 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
401                 break;
402
403         case 32:
404                 info->fix.visual = FB_VISUAL_TRUECOLOR;
405                 break;
406         }
407
408         /* allocate fb memory within 501 */
409         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
410         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
411
412         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
413                 info->fix.line_length);
414
415         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
416                             info->fix.smem_len)) {
417                 dev_err(fbi->dev, "no memory available\n");
418                 return -ENOMEM;
419         }
420
421         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
422
423         info->screen_base = fbi->fbmem + par->screen.sm_addr;
424         info->screen_size = info->fix.smem_len;
425
426         /* set start of framebuffer to the screen */
427
428         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
429
430         /* program CRT clock  */
431
432         pixclock = sm501fb_ps_to_hz(var->pixclock);
433
434         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
435                                         pixclock);
436
437         /* update fb layer with actual clock used */
438         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
439
440         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
441                "sm501pixclock = %lu,  error = %ld%%\n",
442                __func__, var->pixclock, pixclock, sm501pixclock,
443                ((pixclock - sm501pixclock)*100)/pixclock);
444
445         return 0;
446 }
447
448 /* sm501fb_set_par_geometry
449  *
450  * set the geometry registers for specified framebuffer.
451 */
452
453 static void sm501fb_set_par_geometry(struct fb_info *info,
454                                      struct fb_var_screeninfo *var)
455 {
456         struct sm501fb_par  *par = info->par;
457         struct sm501fb_info *fbi = par->info;
458         void __iomem *base = fbi->regs;
459         unsigned long reg;
460
461         if (par->head == HEAD_CRT)
462                 base += SM501_DC_CRT_H_TOT;
463         else
464                 base += SM501_DC_PANEL_H_TOT;
465
466         /* set framebuffer width and display width */
467
468         reg = info->fix.line_length;
469         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
470
471         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
472                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
473
474         /* program horizontal total */
475
476         reg  = (h_total(var) - 1) << 16;
477         reg |= (var->xres - 1);
478
479         writel(reg, base + SM501_OFF_DC_H_TOT);
480
481         /* program horizontal sync */
482
483         reg  = var->hsync_len << 16;
484         reg |= var->xres + var->right_margin - 1;
485
486         writel(reg, base + SM501_OFF_DC_H_SYNC);
487
488         /* program vertical total */
489
490         reg  = (v_total(var) - 1) << 16;
491         reg |= (var->yres - 1);
492
493         writel(reg, base + SM501_OFF_DC_V_TOT);
494
495         /* program vertical sync */
496         reg  = var->vsync_len << 16;
497         reg |= var->yres + var->lower_margin - 1;
498
499         writel(reg, base + SM501_OFF_DC_V_SYNC);
500 }
501
502 /* sm501fb_pan_crt
503  *
504  * pan the CRT display output within an virtual framebuffer
505 */
506
507 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
508                            struct fb_info *info)
509 {
510         struct sm501fb_par  *par = info->par;
511         struct sm501fb_info *fbi = par->info;
512         unsigned int bytes_pixel = var->bits_per_pixel / 8;
513         unsigned long reg;
514         unsigned long xoffs;
515
516         xoffs = var->xoffset * bytes_pixel;
517
518         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
519
520         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
521         reg |= ((xoffs & 15) / bytes_pixel) << 4;
522         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
523
524         reg = (par->screen.sm_addr + xoffs +
525                var->yoffset * info->fix.line_length);
526         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
527
528         sm501fb_sync_regs(fbi);
529         return 0;
530 }
531
532 /* sm501fb_pan_pnl
533  *
534  * pan the panel display output within an virtual framebuffer
535 */
536
537 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
538                            struct fb_info *info)
539 {
540         struct sm501fb_par  *par = info->par;
541         struct sm501fb_info *fbi = par->info;
542         unsigned long reg;
543
544         reg = var->xoffset | (var->xres_virtual << 16);
545         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
546
547         reg = var->yoffset | (var->yres_virtual << 16);
548         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
549
550         sm501fb_sync_regs(fbi);
551         return 0;
552 }
553
554 /* sm501fb_set_par_crt
555  *
556  * Set the CRT video mode from the fb_info structure
557 */
558
559 static int sm501fb_set_par_crt(struct fb_info *info)
560 {
561         struct sm501fb_par  *par = info->par;
562         struct sm501fb_info *fbi = par->info;
563         struct fb_var_screeninfo *var = &info->var;
564         unsigned long control;       /* control register */
565         int ret;
566
567         /* activate new configuration */
568
569         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
570
571         /* enable CRT DAC - note 0 is on!*/
572         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
573
574         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
575
576         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
577                     SM501_DC_CRT_CONTROL_GAMMA |
578                     SM501_DC_CRT_CONTROL_BLANK |
579                     SM501_DC_CRT_CONTROL_SEL |
580                     SM501_DC_CRT_CONTROL_CP |
581                     SM501_DC_CRT_CONTROL_TVP);
582
583         /* set the sync polarities before we check data source  */
584
585         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
586                 control |= SM501_DC_CRT_CONTROL_HSP;
587
588         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
589                 control |= SM501_DC_CRT_CONTROL_VSP;
590
591         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
592                 /* the head is displaying panel data... */
593
594                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
595                 goto out_update;
596         }
597
598         ret = sm501fb_set_par_common(info, var);
599         if (ret) {
600                 dev_err(fbi->dev, "failed to set common parameters\n");
601                 return ret;
602         }
603
604         sm501fb_pan_crt(var, info);
605         sm501fb_set_par_geometry(info, var);
606
607         control |= SM501_FIFO_3;        /* fill if >3 free slots */
608
609         switch(var->bits_per_pixel) {
610         case 8:
611                 control |= SM501_DC_CRT_CONTROL_8BPP;
612                 break;
613
614         case 16:
615                 control |= SM501_DC_CRT_CONTROL_16BPP;
616                 break;
617
618         case 32:
619                 control |= SM501_DC_CRT_CONTROL_32BPP;
620                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
621                 break;
622
623         default:
624                 BUG();
625         }
626
627         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
628         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
629         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
630
631  out_update:
632         dev_dbg(fbi->dev, "new control is %08lx\n", control);
633
634         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
635         sm501fb_sync_regs(fbi);
636
637         return 0;
638 }
639
640 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
641 {
642         unsigned long control;
643         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
644         struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
645
646         control = readl(ctrl_reg);
647
648         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
649                 /* enable panel power */
650
651                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
652                 writel(control, ctrl_reg);
653                 sm501fb_sync_regs(fbi);
654                 mdelay(10);
655
656                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
657                 writel(control, ctrl_reg);
658                 sm501fb_sync_regs(fbi);
659                 mdelay(10);
660
661                 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
662                         control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
663                         writel(control, ctrl_reg);
664                         sm501fb_sync_regs(fbi);
665                         mdelay(10);
666                 }
667
668                 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
669                         control |= SM501_DC_PANEL_CONTROL_FPEN;
670                         writel(control, ctrl_reg);
671                         sm501fb_sync_regs(fbi);
672                         mdelay(10);
673                 }
674         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
675                 /* disable panel power */
676                 if (pd->flags & SM501FB_FLAG_PANEL_USE_FPEN) {
677                         control &= ~SM501_DC_PANEL_CONTROL_FPEN;
678                         writel(control, ctrl_reg);
679                         sm501fb_sync_regs(fbi);
680                         mdelay(10);
681                 }
682
683                 if (pd->flags & SM501FB_FLAG_PANEL_USE_VBIASEN) {
684                         control &= ~SM501_DC_PANEL_CONTROL_BIAS;
685                         writel(control, ctrl_reg);
686                         sm501fb_sync_regs(fbi);
687                         mdelay(10);
688                 }
689
690                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
691                 writel(control, ctrl_reg);
692                 sm501fb_sync_regs(fbi);
693                 mdelay(10);
694
695                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
696                 writel(control, ctrl_reg);
697                 sm501fb_sync_regs(fbi);
698                 mdelay(10);
699         }
700
701         sm501fb_sync_regs(fbi);
702 }
703
704 /* sm501fb_set_par_pnl
705  *
706  * Set the panel video mode from the fb_info structure
707 */
708
709 static int sm501fb_set_par_pnl(struct fb_info *info)
710 {
711         struct sm501fb_par  *par = info->par;
712         struct sm501fb_info *fbi = par->info;
713         struct fb_var_screeninfo *var = &info->var;
714         unsigned long control;
715         unsigned long reg;
716         int ret;
717
718         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
719
720         /* activate this new configuration */
721
722         ret = sm501fb_set_par_common(info, var);
723         if (ret)
724                 return ret;
725
726         sm501fb_pan_pnl(var, info);
727         sm501fb_set_par_geometry(info, var);
728
729         /* update control register */
730
731         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
732         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
733                     SM501_DC_PANEL_CONTROL_VDD  |
734                     SM501_DC_PANEL_CONTROL_DATA |
735                     SM501_DC_PANEL_CONTROL_BIAS |
736                     SM501_DC_PANEL_CONTROL_FPEN |
737                     SM501_DC_PANEL_CONTROL_CP |
738                     SM501_DC_PANEL_CONTROL_CK |
739                     SM501_DC_PANEL_CONTROL_HP |
740                     SM501_DC_PANEL_CONTROL_VP |
741                     SM501_DC_PANEL_CONTROL_HPD |
742                     SM501_DC_PANEL_CONTROL_VPD);
743
744         control |= SM501_FIFO_3;        /* fill if >3 free slots */
745
746         switch(var->bits_per_pixel) {
747         case 8:
748                 control |= SM501_DC_PANEL_CONTROL_8BPP;
749                 break;
750
751         case 16:
752                 control |= SM501_DC_PANEL_CONTROL_16BPP;
753                 break;
754
755         case 32:
756                 control |= SM501_DC_PANEL_CONTROL_32BPP;
757                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
758                 break;
759
760         default:
761                 BUG();
762         }
763
764         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
765
766         /* panel plane top left and bottom right location */
767
768         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
769
770         reg  = var->xres - 1;
771         reg |= (var->yres - 1) << 16;
772
773         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
774
775         /* program panel control register */
776
777         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
778         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
779
780         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
781                 control |= SM501_DC_PANEL_CONTROL_HSP;
782
783         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
784                 control |= SM501_DC_PANEL_CONTROL_VSP;
785
786         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
787         sm501fb_sync_regs(fbi);
788
789         /* ensure the panel interface is not tristated at this point */
790
791         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
792                          0, SM501_SYSCTRL_PANEL_TRISTATE);
793
794         /* power the panel up */
795         sm501fb_panel_power(fbi, 1);
796         return 0;
797 }
798
799
800 /* chan_to_field
801  *
802  * convert a colour value into a field position
803  *
804  * from pxafb.c
805 */
806
807 static inline unsigned int chan_to_field(unsigned int chan,
808                                          struct fb_bitfield *bf)
809 {
810         chan &= 0xffff;
811         chan >>= 16 - bf->length;
812         return chan << bf->offset;
813 }
814
815 /* sm501fb_setcolreg
816  *
817  * set the colour mapping for modes that support palettised data
818 */
819
820 static int sm501fb_setcolreg(unsigned regno,
821                              unsigned red, unsigned green, unsigned blue,
822                              unsigned transp, struct fb_info *info)
823 {
824         struct sm501fb_par  *par = info->par;
825         struct sm501fb_info *fbi = par->info;
826         void __iomem *base = fbi->regs;
827         unsigned int val;
828
829         if (par->head == HEAD_CRT)
830                 base += SM501_DC_CRT_PALETTE;
831         else
832                 base += SM501_DC_PANEL_PALETTE;
833
834         switch (info->fix.visual) {
835         case FB_VISUAL_TRUECOLOR:
836                 /* true-colour, use pseuo-palette */
837
838                 if (regno < 16) {
839                         u32 *pal = par->pseudo_palette;
840
841                         val  = chan_to_field(red,   &info->var.red);
842                         val |= chan_to_field(green, &info->var.green);
843                         val |= chan_to_field(blue,  &info->var.blue);
844
845                         pal[regno] = val;
846                 }
847                 break;
848
849         case FB_VISUAL_PSEUDOCOLOR:
850                 if (regno < 256) {
851                         val = (red >> 8) << 16;
852                         val |= (green >> 8) << 8;
853                         val |= blue >> 8;
854
855                         writel(val, base + (regno * 4));
856                 }
857
858                 break;
859
860         default:
861                 return 1;   /* unknown type */
862         }
863
864         return 0;
865 }
866
867 /* sm501fb_blank_pnl
868  *
869  * Blank or un-blank the panel interface
870 */
871
872 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
873 {
874         struct sm501fb_par  *par = info->par;
875         struct sm501fb_info *fbi = par->info;
876
877         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
878
879         switch (blank_mode) {
880         case FB_BLANK_POWERDOWN:
881                 sm501fb_panel_power(fbi, 0);
882                 break;
883
884         case FB_BLANK_UNBLANK:
885                 sm501fb_panel_power(fbi, 1);
886                 break;
887
888         case FB_BLANK_NORMAL:
889         case FB_BLANK_VSYNC_SUSPEND:
890         case FB_BLANK_HSYNC_SUSPEND:
891         default:
892                 return 1;
893         }
894
895         return 0;
896 }
897
898 /* sm501fb_blank_crt
899  *
900  * Blank or un-blank the crt interface
901 */
902
903 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
904 {
905         struct sm501fb_par  *par = info->par;
906         struct sm501fb_info *fbi = par->info;
907         unsigned long ctrl;
908
909         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
910
911         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
912
913         switch (blank_mode) {
914         case FB_BLANK_POWERDOWN:
915                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
916                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
917
918         case FB_BLANK_NORMAL:
919                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
920                 break;
921
922         case FB_BLANK_UNBLANK:
923                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
924                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
925                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
926                 break;
927
928         case FB_BLANK_VSYNC_SUSPEND:
929         case FB_BLANK_HSYNC_SUSPEND:
930         default:
931                 return 1;
932
933         }
934
935         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
936         sm501fb_sync_regs(fbi);
937
938         return 0;
939 }
940
941 /* sm501fb_cursor
942  *
943  * set or change the hardware cursor parameters
944 */
945
946 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
947 {
948         struct sm501fb_par  *par = info->par;
949         struct sm501fb_info *fbi = par->info;
950         void __iomem *base = fbi->regs;
951         unsigned long hwc_addr;
952         unsigned long fg, bg;
953
954         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
955
956         if (par->head == HEAD_CRT)
957                 base += SM501_DC_CRT_HWC_BASE;
958         else
959                 base += SM501_DC_PANEL_HWC_BASE;
960
961         /* check not being asked to exceed capabilities */
962
963         if (cursor->image.width > 64)
964                 return -EINVAL;
965
966         if (cursor->image.height > 64)
967                 return -EINVAL;
968
969         if (cursor->image.depth > 1)
970                 return -EINVAL;
971
972         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
973
974         if (cursor->enable)
975                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
976         else
977                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
978
979         /* set data */
980         if (cursor->set & FB_CUR_SETPOS) {
981                 unsigned int x = cursor->image.dx;
982                 unsigned int y = cursor->image.dy;
983
984                 if (x >= 2048 || y >= 2048 )
985                         return -EINVAL;
986
987                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
988
989                 //y += cursor->image.height;
990
991                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
992         }
993
994         if (cursor->set & FB_CUR_SETCMAP) {
995                 unsigned int bg_col = cursor->image.bg_color;
996                 unsigned int fg_col = cursor->image.fg_color;
997
998                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
999                         __func__, bg_col, fg_col);
1000
1001                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1002                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
1003                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1004
1005                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1006                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
1007                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1008
1009                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1010
1011                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1012                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1013         }
1014
1015         if (cursor->set & FB_CUR_SETSIZE ||
1016             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1017                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1018                  * clears it to transparent then combines the cursor
1019                  * shape plane with the colour plane to set the
1020                  * cursor */
1021                 int x, y;
1022                 const unsigned char *pcol = cursor->image.data;
1023                 const unsigned char *pmsk = cursor->mask;
1024                 void __iomem   *dst = par->cursor.k_addr;
1025                 unsigned char  dcol = 0;
1026                 unsigned char  dmsk = 0;
1027                 unsigned int   op;
1028
1029                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1030                         __func__, cursor->image.width, cursor->image.height);
1031
1032                 for (op = 0; op < (64*64*2)/8; op+=4)
1033                         writel(0x0, dst + op);
1034
1035                 for (y = 0; y < cursor->image.height; y++) {
1036                         for (x = 0; x < cursor->image.width; x++) {
1037                                 if ((x % 8) == 0) {
1038                                         dcol = *pcol++;
1039                                         dmsk = *pmsk++;
1040                                 } else {
1041                                         dcol >>= 1;
1042                                         dmsk >>= 1;
1043                                 }
1044
1045                                 if (dmsk & 1) {
1046                                         op = (dcol & 1) ? 1 : 3;
1047                                         op <<= ((x % 4) * 2);
1048
1049                                         op |= readb(dst + (x / 4));
1050                                         writeb(op, dst + (x / 4));
1051                                 }
1052                         }
1053                         dst += (64*2)/8;
1054                 }
1055         }
1056
1057         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1058         return 0;
1059 }
1060
1061 /* sm501fb_crtsrc_show
1062  *
1063  * device attribute code to show where the crt output is sourced from
1064 */
1065
1066 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1067                                struct device_attribute *attr, char *buf)
1068 {
1069         struct sm501fb_info *info = dev_get_drvdata(dev);
1070         unsigned long ctrl;
1071
1072         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1073         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1074
1075         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1076 }
1077
1078 /* sm501fb_crtsrc_show
1079  *
1080  * device attribute code to set where the crt output is sourced from
1081 */
1082
1083 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1084                                 struct device_attribute *attr,
1085                                 const char *buf, size_t len)
1086 {
1087         struct sm501fb_info *info = dev_get_drvdata(dev);
1088         enum sm501_controller head;
1089         unsigned long ctrl;
1090
1091         if (len < 1)
1092                 return -EINVAL;
1093
1094         if (strnicmp(buf, "crt", 3) == 0)
1095                 head = HEAD_CRT;
1096         else if (strnicmp(buf, "panel", 5) == 0)
1097                 head = HEAD_PANEL;
1098         else
1099                 return -EINVAL;
1100
1101         dev_info(dev, "setting crt source to head %d\n", head);
1102
1103         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1104
1105         if (head == HEAD_CRT) {
1106                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1107                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1108                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1109         } else {
1110                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1111                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1112                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1113         }
1114
1115         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1116         sm501fb_sync_regs(info);
1117
1118         return len;
1119 }
1120
1121 /* Prepare the device_attr for registration with sysfs later */
1122 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1123
1124 /* sm501fb_show_regs
1125  *
1126  * show the primary sm501 registers
1127 */
1128 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1129                              unsigned int start, unsigned int len)
1130 {
1131         void __iomem *mem = info->regs;
1132         char *buf = ptr;
1133         unsigned int reg;
1134
1135         for (reg = start; reg < (len + start); reg += 4)
1136                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1137
1138         return ptr - buf;
1139 }
1140
1141 /* sm501fb_debug_show_crt
1142  *
1143  * show the crt control and cursor registers
1144 */
1145
1146 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1147                                   struct device_attribute *attr, char *buf)
1148 {
1149         struct sm501fb_info *info = dev_get_drvdata(dev);
1150         char *ptr = buf;
1151
1152         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1153         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1154
1155         return ptr - buf;
1156 }
1157
1158 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1159
1160 /* sm501fb_debug_show_pnl
1161  *
1162  * show the panel control and cursor registers
1163 */
1164
1165 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1166                                   struct device_attribute *attr, char *buf)
1167 {
1168         struct sm501fb_info *info = dev_get_drvdata(dev);
1169         char *ptr = buf;
1170
1171         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1172         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1173
1174         return ptr - buf;
1175 }
1176
1177 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1178
1179 /* framebuffer ops */
1180
1181 static struct fb_ops sm501fb_ops_crt = {
1182         .owner          = THIS_MODULE,
1183         .fb_check_var   = sm501fb_check_var_crt,
1184         .fb_set_par     = sm501fb_set_par_crt,
1185         .fb_blank       = sm501fb_blank_crt,
1186         .fb_setcolreg   = sm501fb_setcolreg,
1187         .fb_pan_display = sm501fb_pan_crt,
1188         .fb_cursor      = sm501fb_cursor,
1189         .fb_fillrect    = cfb_fillrect,
1190         .fb_copyarea    = cfb_copyarea,
1191         .fb_imageblit   = cfb_imageblit,
1192 };
1193
1194 static struct fb_ops sm501fb_ops_pnl = {
1195         .owner          = THIS_MODULE,
1196         .fb_check_var   = sm501fb_check_var_pnl,
1197         .fb_set_par     = sm501fb_set_par_pnl,
1198         .fb_pan_display = sm501fb_pan_pnl,
1199         .fb_blank       = sm501fb_blank_pnl,
1200         .fb_setcolreg   = sm501fb_setcolreg,
1201         .fb_cursor      = sm501fb_cursor,
1202         .fb_fillrect    = cfb_fillrect,
1203         .fb_copyarea    = cfb_copyarea,
1204         .fb_imageblit   = cfb_imageblit,
1205 };
1206
1207 /* sm501fb_info_alloc
1208  *
1209  * creates and initialises an sm501fb_info structure
1210 */
1211
1212 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1213                                                struct fb_info *fbinfo_pnl)
1214 {
1215         struct sm501fb_info *info;
1216         struct sm501fb_par  *par;
1217
1218         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1219         if (info) {
1220                 /* set the references back */
1221
1222                 par = fbinfo_crt->par;
1223                 par->info = info;
1224                 par->head = HEAD_CRT;
1225                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1226
1227                 par = fbinfo_pnl->par;
1228                 par->info = info;
1229                 par->head = HEAD_PANEL;
1230                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1231
1232                 /* store the two fbs into our info */
1233                 info->fb[HEAD_CRT] = fbinfo_crt;
1234                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1235         }
1236
1237         return info;
1238 }
1239
1240 /* sm501_init_cursor
1241  *
1242  * initialise hw cursor parameters
1243 */
1244
1245 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1246 {
1247         struct sm501fb_par *par = fbi->par;
1248         struct sm501fb_info *info = par->info;
1249         int ret;
1250
1251         par->cursor_regs = info->regs + reg_base;
1252
1253         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1254         if (ret < 0)
1255                 return ret;
1256
1257         /* initialise the colour registers */
1258
1259         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1260
1261         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1262         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1263         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1264         sm501fb_sync_regs(info);
1265
1266         return 0;
1267 }
1268
1269 /* sm501fb_info_start
1270  *
1271  * fills the par structure claiming resources and remapping etc.
1272 */
1273
1274 static int sm501fb_start(struct sm501fb_info *info,
1275                          struct platform_device *pdev)
1276 {
1277         struct resource *res;
1278         struct device *dev;
1279         int k;
1280         int ret;
1281
1282         info->dev = dev = &pdev->dev;
1283         platform_set_drvdata(pdev, info);
1284
1285         info->irq = ret = platform_get_irq(pdev, 0);
1286         if (ret < 0) {
1287                 /* we currently do not use the IRQ */
1288                 dev_warn(dev, "no irq for device\n");
1289         }
1290
1291         /* allocate, reserve and remap resources for registers */
1292         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1293         if (res == NULL) {
1294                 dev_err(dev, "no resource definition for registers\n");
1295                 ret = -ENOENT;
1296                 goto err_release;
1297         }
1298
1299         info->regs_res = request_mem_region(res->start,
1300                                             res->end - res->start,
1301                                             pdev->name);
1302
1303         if (info->regs_res == NULL) {
1304                 dev_err(dev, "cannot claim registers\n");
1305                 ret = -ENXIO;
1306                 goto err_release;
1307         }
1308
1309         info->regs = ioremap(res->start, (res->end - res->start)+1);
1310         if (info->regs == NULL) {
1311                 dev_err(dev, "cannot remap registers\n");
1312                 ret = -ENXIO;
1313                 goto err_regs_res;
1314         }
1315
1316         /* allocate, reserve resources for framebuffer */
1317         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1318         if (res == NULL) {
1319                 dev_err(dev, "no memory resource defined\n");
1320                 ret = -ENXIO;
1321                 goto err_regs_map;
1322         }
1323
1324         info->fbmem_res = request_mem_region(res->start,
1325                                              (res->end - res->start)+1,
1326                                              pdev->name);
1327         if (info->fbmem_res == NULL) {
1328                 dev_err(dev, "cannot claim framebuffer\n");
1329                 ret = -ENXIO;
1330                 goto err_regs_map;
1331         }
1332
1333         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1334         if (info->fbmem == NULL) {
1335                 dev_err(dev, "cannot remap framebuffer\n");
1336                 goto err_mem_res;
1337         }
1338
1339         info->fbmem_len = (res->end - res->start)+1;
1340
1341         /* clear framebuffer memory - avoids garbage data on unused fb */
1342         memset(info->fbmem, 0, info->fbmem_len);
1343
1344         /* clear palette ram - undefined at power on */
1345         for (k = 0; k < (256 * 3); k++)
1346                 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1347
1348         /* enable display controller */
1349         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1350
1351         /* setup cursors */
1352
1353         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1354         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1355
1356         return 0; /* everything is setup */
1357
1358  err_mem_res:
1359         release_resource(info->fbmem_res);
1360         kfree(info->fbmem_res);
1361
1362  err_regs_map:
1363         iounmap(info->regs);
1364
1365  err_regs_res:
1366         release_resource(info->regs_res);
1367         kfree(info->regs_res);
1368
1369  err_release:
1370         return ret;
1371 }
1372
1373 static void sm501fb_stop(struct sm501fb_info *info)
1374 {
1375         /* disable display controller */
1376         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1377
1378         iounmap(info->fbmem);
1379         release_resource(info->fbmem_res);
1380         kfree(info->fbmem_res);
1381
1382         iounmap(info->regs);
1383         release_resource(info->regs_res);
1384         kfree(info->regs_res);
1385 }
1386
1387 static void sm501fb_info_release(struct sm501fb_info *info)
1388 {
1389         kfree(info);
1390 }
1391
1392 static int sm501fb_init_fb(struct fb_info *fb,
1393                            enum sm501_controller head,
1394                            const char *fbname)
1395 {
1396         struct sm501_platdata_fbsub *pd;
1397         struct sm501fb_par *par = fb->par;
1398         struct sm501fb_info *info = par->info;
1399         unsigned long ctrl;
1400         unsigned int enable;
1401         int ret;
1402
1403         switch (head) {
1404         case HEAD_CRT:
1405                 pd = info->pdata->fb_crt;
1406                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1407                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1408
1409                 /* ensure we set the correct source register */
1410                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1411                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1412                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1413                 }
1414
1415                 break;
1416
1417         case HEAD_PANEL:
1418                 pd = info->pdata->fb_pnl;
1419                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1420                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1421                 break;
1422
1423         default:
1424                 pd = NULL;              /* stop compiler warnings */
1425                 ctrl = 0;
1426                 enable = 0;
1427                 BUG();
1428         }
1429
1430         dev_info(info->dev, "fb %s %sabled at start\n",
1431                  fbname, enable ? "en" : "dis");
1432
1433         /* check to see if our routing allows this */
1434
1435         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1436                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1437                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1438                 enable = 0;
1439         }
1440
1441         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1442
1443         memcpy(&par->ops,
1444                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1445                sizeof(struct fb_ops));
1446
1447         /* update ops dependant on what we've been passed */
1448
1449         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1450                 par->ops.fb_cursor = NULL;
1451
1452         fb->fbops = &par->ops;
1453         fb->flags = FBINFO_FLAG_DEFAULT |
1454                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1455
1456         /* fixed data */
1457
1458         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1459         fb->fix.type_aux        = 0;
1460         fb->fix.xpanstep        = 1;
1461         fb->fix.ypanstep        = 1;
1462         fb->fix.ywrapstep       = 0;
1463         fb->fix.accel           = FB_ACCEL_NONE;
1464
1465         /* screenmode */
1466
1467         fb->var.nonstd          = 0;
1468         fb->var.activate        = FB_ACTIVATE_NOW;
1469         fb->var.accel_flags     = 0;
1470         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1471         fb->var.bits_per_pixel  = 16;
1472
1473         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1474                 /* TODO read the mode from the current display */
1475
1476         } else {
1477                 if (pd->def_mode) {
1478                         dev_info(info->dev, "using supplied mode\n");
1479                         fb_videomode_to_var(&fb->var, pd->def_mode);
1480
1481                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1482                         fb->var.xres_virtual = fb->var.xres;
1483                         fb->var.yres_virtual = fb->var.yres;
1484                 } else {
1485                         ret = fb_find_mode(&fb->var, fb,
1486                                            NULL, NULL, 0, NULL, 8);
1487
1488                         if (ret == 0 || ret == 4) {
1489                                 dev_err(info->dev,
1490                                         "failed to get initial mode\n");
1491                                 return -EINVAL;
1492                         }
1493                 }
1494         }
1495
1496         /* initialise and set the palette */
1497         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1498         fb_set_cmap(&fb->cmap, fb);
1499
1500         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1501         if (ret)
1502                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1503
1504         /* ensure we've activated our new configuration */
1505         (fb->fbops->fb_set_par)(fb);
1506
1507         return 0;
1508 }
1509
1510 /* default platform data if none is supplied (ie, PCI device) */
1511
1512 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1513         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1514                            SM501FB_FLAG_USE_HWCURSOR |
1515                            SM501FB_FLAG_USE_HWACCEL |
1516                            SM501FB_FLAG_DISABLE_AT_EXIT),
1517
1518 };
1519
1520 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1521         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1522                            SM501FB_FLAG_USE_HWCURSOR |
1523                            SM501FB_FLAG_USE_HWACCEL |
1524                            SM501FB_FLAG_DISABLE_AT_EXIT),
1525 };
1526
1527 static struct sm501_platdata_fb sm501fb_def_pdata = {
1528         .fb_route               = SM501_FB_OWN,
1529         .fb_crt                 = &sm501fb_pdata_crt,
1530         .fb_pnl                 = &sm501fb_pdata_pnl,
1531 };
1532
1533 static char driver_name_crt[] = "sm501fb-crt";
1534 static char driver_name_pnl[] = "sm501fb-panel";
1535
1536 static int __init sm501fb_probe(struct platform_device *pdev)
1537 {
1538         struct sm501fb_info *info;
1539         struct device       *dev = &pdev->dev;
1540         struct fb_info      *fbinfo_crt;
1541         struct fb_info      *fbinfo_pnl;
1542         int                  ret;
1543
1544         /* allocate our framebuffers */
1545
1546         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1547         if (fbinfo_crt == NULL) {
1548                 dev_err(dev, "cannot allocate crt framebuffer\n");
1549                 return -ENOMEM;
1550         }
1551
1552         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1553         if (fbinfo_pnl == NULL) {
1554                 dev_err(dev, "cannot allocate panel framebuffer\n");
1555                 ret = -ENOMEM;
1556                 goto fbinfo_crt_alloc_fail;
1557         }
1558
1559         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1560         if (info == NULL) {
1561                 dev_err(dev, "cannot allocate par\n");
1562                 ret = -ENOMEM;
1563                 goto sm501fb_alloc_fail;
1564         }
1565
1566         if (dev->parent->platform_data) {
1567                 struct sm501_platdata *pd = dev->parent->platform_data;
1568                 info->pdata = pd->fb;
1569         }
1570
1571         if (info->pdata == NULL) {
1572                 dev_info(dev, "using default configuration data\n");
1573                 info->pdata = &sm501fb_def_pdata;
1574         }
1575
1576         /* start the framebuffers */
1577
1578         ret = sm501fb_start(info, pdev);
1579         if (ret) {
1580                 dev_err(dev, "cannot initialise SM501\n");
1581                 goto sm501fb_start_fail;
1582         }
1583
1584         /* CRT framebuffer setup */
1585
1586         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1587         if (ret) {
1588                 dev_err(dev, "cannot initialise CRT fb\n");
1589                 goto sm501fb_start_fail;
1590         }
1591
1592         /* Panel framebuffer setup */
1593
1594         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1595         if (ret) {
1596                 dev_err(dev, "cannot initialise Panel fb\n");
1597                 goto sm501fb_start_fail;
1598         }
1599
1600         /* register framebuffers */
1601
1602         ret = register_framebuffer(fbinfo_crt);
1603         if (ret < 0) {
1604                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1605                 goto register_crt_fail;
1606         }
1607
1608         ret = register_framebuffer(fbinfo_pnl);
1609         if (ret < 0) {
1610                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1611                 goto register_pnl_fail;
1612         }
1613
1614         dev_info(dev, "fb%d: %s frame buffer device\n",
1615                  fbinfo_crt->node, fbinfo_crt->fix.id);
1616
1617         dev_info(dev, "fb%d: %s frame buffer device\n",
1618                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1619
1620         /* create device files */
1621
1622         ret = device_create_file(dev, &dev_attr_crt_src);
1623         if (ret)
1624                 goto crtsrc_fail;
1625
1626         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1627         if (ret)
1628                 goto fbregs_pnl_fail;
1629
1630         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1631         if (ret)
1632                 goto fbregs_crt_fail;
1633
1634         /* we registered, return ok */
1635         return 0;
1636
1637  fbregs_crt_fail:
1638         device_remove_file(dev, &dev_attr_fbregs_pnl);
1639
1640  fbregs_pnl_fail:
1641         device_remove_file(dev, &dev_attr_crt_src);
1642
1643  crtsrc_fail:
1644         unregister_framebuffer(fbinfo_pnl);
1645
1646  register_pnl_fail:
1647         unregister_framebuffer(fbinfo_crt);
1648
1649  register_crt_fail:
1650         sm501fb_stop(info);
1651
1652  sm501fb_start_fail:
1653         sm501fb_info_release(info);
1654
1655  sm501fb_alloc_fail:
1656         framebuffer_release(fbinfo_pnl);
1657
1658  fbinfo_crt_alloc_fail:
1659         framebuffer_release(fbinfo_crt);
1660
1661         return ret;
1662 }
1663
1664
1665 /*
1666  *  Cleanup
1667  */
1668 static int sm501fb_remove(struct platform_device *pdev)
1669 {
1670         struct sm501fb_info *info = platform_get_drvdata(pdev);
1671         struct fb_info     *fbinfo_crt = info->fb[0];
1672         struct fb_info     *fbinfo_pnl = info->fb[1];
1673
1674         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1675         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1676         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1677
1678         unregister_framebuffer(fbinfo_crt);
1679         unregister_framebuffer(fbinfo_pnl);
1680
1681         sm501fb_stop(info);
1682         sm501fb_info_release(info);
1683
1684         framebuffer_release(fbinfo_pnl);
1685         framebuffer_release(fbinfo_crt);
1686
1687         return 0;
1688 }
1689
1690 #ifdef CONFIG_PM
1691
1692 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1693                               enum sm501_controller head)
1694 {
1695         struct fb_info *fbi = info->fb[head];
1696         struct sm501fb_par *par = fbi->par;
1697
1698         if (par->screen.size == 0)
1699                 return 0;
1700
1701         /* blank the relevant interface to ensure unit power minimised */
1702         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1703
1704         /* tell console/fb driver we are suspending */
1705
1706         acquire_console_sem();
1707         fb_set_suspend(fbi, 1);
1708         release_console_sem();
1709
1710         /* backup copies in case chip is powered down over suspend */
1711
1712         par->store_fb = vmalloc(par->screen.size);
1713         if (par->store_fb == NULL) {
1714                 dev_err(info->dev, "no memory to store screen\n");
1715                 return -ENOMEM;
1716         }
1717
1718         par->store_cursor = vmalloc(par->cursor.size);
1719         if (par->store_cursor == NULL) {
1720                 dev_err(info->dev, "no memory to store cursor\n");
1721                 goto err_nocursor;
1722         }
1723
1724         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1725         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1726
1727         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1728         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1729
1730         return 0;
1731
1732  err_nocursor:
1733         vfree(par->store_fb);
1734         par->store_fb = NULL;
1735
1736         return -ENOMEM;
1737 }
1738
1739 static void sm501fb_resume_fb(struct sm501fb_info *info,
1740                               enum sm501_controller head)
1741 {
1742         struct fb_info *fbi = info->fb[head];
1743         struct sm501fb_par *par = fbi->par;
1744
1745         if (par->screen.size == 0)
1746                 return;
1747
1748         /* re-activate the configuration */
1749
1750         (par->ops.fb_set_par)(fbi);
1751
1752         /* restore the data */
1753
1754         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1755         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1756
1757         if (par->store_fb)
1758                 memcpy_toio(par->screen.k_addr, par->store_fb,
1759                             par->screen.size);
1760
1761         if (par->store_cursor)
1762                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1763                             par->cursor.size);
1764
1765         acquire_console_sem();
1766         fb_set_suspend(fbi, 0);
1767         release_console_sem();
1768
1769         vfree(par->store_fb);
1770         vfree(par->store_cursor);
1771 }
1772
1773
1774 /* suspend and resume support */
1775
1776 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1777 {
1778         struct sm501fb_info *info = platform_get_drvdata(pdev);
1779
1780         /* store crt control to resume with */
1781         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1782
1783         sm501fb_suspend_fb(info, HEAD_CRT);
1784         sm501fb_suspend_fb(info, HEAD_PANEL);
1785
1786         /* turn off the clocks, in case the device is not powered down */
1787         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1788
1789         return 0;
1790 }
1791
1792 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1793                              SM501_DC_CRT_CONTROL_SEL)
1794
1795
1796 static int sm501fb_resume(struct platform_device *pdev)
1797 {
1798         struct sm501fb_info *info = platform_get_drvdata(pdev);
1799         unsigned long crt_ctrl;
1800
1801         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1802
1803         /* restore the items we want to be saved for crt control */
1804
1805         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1806         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1807         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1808         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1809
1810         sm501fb_resume_fb(info, HEAD_CRT);
1811         sm501fb_resume_fb(info, HEAD_PANEL);
1812
1813         return 0;
1814 }
1815
1816 #else
1817 #define sm501fb_suspend NULL
1818 #define sm501fb_resume  NULL
1819 #endif
1820
1821 static struct platform_driver sm501fb_driver = {
1822         .probe          = sm501fb_probe,
1823         .remove         = sm501fb_remove,
1824         .suspend        = sm501fb_suspend,
1825         .resume         = sm501fb_resume,
1826         .driver         = {
1827                 .name   = "sm501-fb",
1828                 .owner  = THIS_MODULE,
1829         },
1830 };
1831
1832 static int __devinit sm501fb_init(void)
1833 {
1834         return platform_driver_register(&sm501fb_driver);
1835 }
1836
1837 static void __exit sm501fb_cleanup(void)
1838 {
1839         platform_driver_unregister(&sm501fb_driver);
1840 }
1841
1842 module_init(sm501fb_init);
1843 module_exit(sm501fb_cleanup);
1844
1845 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1846 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1847 MODULE_LICENSE("GPL v2");