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   1 /* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/serial_core.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/io.h>
  23 #include <linux/i2c.h>
  24 #include <linux/fb.h>
  25 #include <linux/gpio.h>
  26 #include <linux/delay.h>
  27
  28 #include <video/platform_lcd.h>
  29
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/map.h>
  32 #include <asm/mach/irq.h>
  33
  34 #include <mach/hardware.h>
  35 #include <mach/regs-fb.h>
  36 #include <mach/map.h>
  37
  38 #include <asm/irq.h>
  39 #include <asm/mach-types.h>
  40
  41 #include <plat/regs-serial.h>
  42 #include <plat/iic.h>
  43 #include <plat/fb.h>
  44
  45 #include <plat/s3c6410.h>
  46 #include <plat/clock.h>
  47 #include <plat/devs.h>
  48 #include <plat/cpu.h>
  49
  50 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  51 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  52 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  53
  54 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  55         [0] = {
  56                 .hwport      = 0,
  57                 .flags       = 0,
  58                 .ucon        = 0x3c5,
  59                 .ulcon       = 0x03,
  60                 .ufcon       = 0x51,
  61         },
  62         [1] = {
  63                 .hwport      = 1,
  64                 .flags       = 0,
  65                 .ucon        = 0x3c5,
  66                 .ulcon       = 0x03,
  67                 .ufcon       = 0x51,
  68         },
  69 };
  70
  71 /* framebuffer and LCD setup. */
  72
  73 /* GPF15 = LCD backlight control
  74  * GPF13 => Panel power
  75  * GPN5 = LCD nRESET signal
  76  * PWM_TOUT1 => backlight brightness
  77  */
  78
  79 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
  80                                    unsigned int power)
  81 {
  82         if (power) {
  83                 gpio_direction_output(S3C64XX_GPF(13), 1);
  84                 gpio_direction_output(S3C64XX_GPF(15), 1);
  85
  86                 /* fire nRESET on power up */
  87                 gpio_direction_output(S3C64XX_GPN(5), 0);
  88                 msleep(10);
  89                 gpio_direction_output(S3C64XX_GPN(5), 1);
  90                 msleep(1);
  91         } else {
  92                 gpio_direction_output(S3C64XX_GPF(15), 0);
  93                 gpio_direction_output(S3C64XX_GPF(13), 0);
  94         }
  95 }
  96
  97 static struct plat_lcd_data smdk6410_lcd_power_data = {
  98         .set_power      = smdk6410_lcd_power_set,
  99 };
 100
 101 static struct platform_device smdk6410_lcd_powerdev = {
 102         .name                   = "platform-lcd",
 103         .dev.parent             = &s3c_device_fb.dev,
 104         .dev.platform_data      = &smdk6410_lcd_power_data,
 105 };
 106
 107 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 108         /* this is to ensure we use win0 */
 109         .win_mode       = {
 110                 .pixclock       = 41094,
 111                 .left_margin    = 8,
 112                 .right_margin   = 13,
 113                 .upper_margin   = 7,
 114                 .lower_margin   = 5,
 115                 .hsync_len      = 3,
 116                 .vsync_len      = 1,
 117                 .xres           = 800,
 118                 .yres           = 480,
 119         },
 120         .max_bpp        = 32,
 121         .default_bpp    = 16,
 122 };
 123
 124 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 125 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 126         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 127         .win[0]         = &smdk6410_fb_win0,
 128         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 129         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 130 };
 131
 132 static struct map_desc smdk6410_iodesc[] = {};
 133
 134 static struct platform_device *smdk6410_devices[] __initdata = {
 135 #ifdef CONFIG_SMDK6410_SD_CH0
 136         &s3c_device_hsmmc0,
 137 #endif
 138 #ifdef CONFIG_SMDK6410_SD_CH1
 139         &s3c_device_hsmmc1,
 140 #endif
 141         &s3c_device_i2c0,
 142         &s3c_device_i2c1,
 143         &s3c_device_fb,
 144         &smdk6410_lcd_powerdev,
 145 };
 146
 147 static struct i2c_board_info i2c_devs0[] __initdata = {
 148         { I2C_BOARD_INFO("24c08", 0x50), },
 149         { I2C_BOARD_INFO("wm8580", 0x1b), },
 150 };
 151
 152 static struct i2c_board_info i2c_devs1[] __initdata = {
 153         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 154 };
 155
 156 static void __init smdk6410_map_io(void)
 157 {
 158         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 159         s3c24xx_init_clocks(12000000);
 160         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 161 }
 162
 163 static void __init smdk6410_machine_init(void)
 164 {
 165         s3c_i2c0_set_platdata(NULL);
 166         s3c_i2c1_set_platdata(NULL);
 167         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 168
 169         gpio_request(S3C64XX_GPN(5), "LCD power");
 170         gpio_request(S3C64XX_GPF(13), "LCD power");
 171         gpio_request(S3C64XX_GPF(15), "LCD power");
 172
 173         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 174         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 175
 176         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 177 }
 178
 179 MACHINE_START(SMDK6410, "SMDK6410")
 180         /* Maintainer: Ben Dooks <ben@fluff.org> */
 181         .phys_io        = S3C_PA_UART & 0xfff00000,
 182         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
 183         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 184
 185         .init_irq       = s3c6410_init_irq,
 186         .map_io         = smdk6410_map_io,
 187         .init_machine   = smdk6410_machine_init,
 188         .timer          = &s3c24xx_timer,
 189 MACHINE_END