1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2008 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 /*****************************************************************************
11 * Support for the SFE4001 and SFN4111T NICs.
13 * The SFE4001 does not power-up fully at reset due to its high power
14 * consumption. We control its power via a PCA9539 I/O expander.
15 * Both boards have a MAX6647 temperature monitor which we expose to
18 * This also provides minimal support for reflashing the PHY, which is
19 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
20 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
21 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
22 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
23 * exclusive with the network device being open.
26 #include <linux/delay.h>
27 #include <linux/rtnetlink.h>
28 #include "net_driver.h"
33 #include "falcon_hwdefs.h"
34 #include "falcon_io.h"
36 #include "workarounds.h"
38 /**************************************************************************
40 * I2C IO Expander device
42 **************************************************************************/
47 #define P0_INVERT 0x04
48 #define P0_CONFIG 0x06
50 #define P0_EN_1V0X_LBN 0
51 #define P0_EN_1V0X_WIDTH 1
52 #define P0_EN_1V2_LBN 1
53 #define P0_EN_1V2_WIDTH 1
54 #define P0_EN_2V5_LBN 2
55 #define P0_EN_2V5_WIDTH 1
56 #define P0_EN_3V3X_LBN 3
57 #define P0_EN_3V3X_WIDTH 1
58 #define P0_EN_5V_LBN 4
59 #define P0_EN_5V_WIDTH 1
60 #define P0_SHORTEN_JTAG_LBN 5
61 #define P0_SHORTEN_JTAG_WIDTH 1
62 #define P0_X_TRST_LBN 6
63 #define P0_X_TRST_WIDTH 1
64 #define P0_DSP_RESET_LBN 7
65 #define P0_DSP_RESET_WIDTH 1
69 #define P1_INVERT 0x05
70 #define P1_CONFIG 0x07
72 #define P1_AFE_PWD_LBN 0
73 #define P1_AFE_PWD_WIDTH 1
74 #define P1_DSP_PWD25_LBN 1
75 #define P1_DSP_PWD25_WIDTH 1
76 #define P1_RESERVED_LBN 2
77 #define P1_RESERVED_WIDTH 2
78 #define P1_SPARE_LBN 4
79 #define P1_SPARE_WIDTH 4
81 /* Temperature Sensor */
82 #define MAX664X_REG_RSL 0x02
83 #define MAX664X_REG_WLHO 0x0B
85 static void sfe4001_poweroff(struct efx_nic *efx)
87 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
88 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
90 /* Turn off all power rails and disable outputs */
91 i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
92 i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
93 i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
95 /* Clear any over-temperature alert */
96 i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
99 static int sfe4001_poweron(struct efx_nic *efx)
101 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
102 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
107 /* Clear any previous over-temperature alert */
108 rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
112 /* Enable port 0 and port 1 outputs on IO expander */
113 rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
116 rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
117 0xff & ~(1 << P1_SPARE_LBN));
121 /* If PHY power is on, turn it all off and wait 1 second to
122 * ensure a full reset.
124 rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
127 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
128 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
129 (0 << P0_EN_1V0X_LBN));
131 EFX_INFO(efx, "power-cycling PHY\n");
132 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
135 schedule_timeout_uninterruptible(HZ);
138 for (i = 0; i < 20; ++i) {
139 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
140 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
141 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
142 (1 << P0_X_TRST_LBN));
143 if (efx->phy_mode & PHY_MODE_SPECIAL)
144 out |= 1 << P0_EN_3V3X_LBN;
146 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
151 /* Turn on 1V power rail */
152 out &= ~(1 << P0_EN_1V0X_LBN);
153 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
157 EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
159 /* In flash config mode, DSP does not turn on AFE, so
160 * just wait 1 second.
162 if (efx->phy_mode & PHY_MODE_SPECIAL) {
163 schedule_timeout_uninterruptible(HZ);
167 for (j = 0; j < 10; ++j) {
170 /* Check DSP has asserted AFE power line */
171 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
174 if (rc & (1 << P1_AFE_PWD_LBN))
179 EFX_INFO(efx, "timed out waiting for DSP boot\n");
182 sfe4001_poweroff(efx);
186 static int sfn4111t_reset(struct efx_nic *efx)
190 /* GPIO pins are also used for I2C, so block that temporarily */
191 mutex_lock(&efx->i2c_adap.bus_lock);
193 falcon_read(efx, ®, GPIO_CTL_REG_KER);
194 EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
195 EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, false);
196 falcon_write(efx, ®, GPIO_CTL_REG_KER);
198 EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, true);
199 EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, true);
200 EFX_SET_OWORD_FIELD(reg, GPIO3_OUT,
201 !(efx->phy_mode & PHY_MODE_SPECIAL));
202 falcon_write(efx, ®, GPIO_CTL_REG_KER);
204 mutex_unlock(&efx->i2c_adap.bus_lock);
210 static ssize_t show_phy_flash_cfg(struct device *dev,
211 struct device_attribute *attr, char *buf)
213 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
214 return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
217 static ssize_t set_phy_flash_cfg(struct device *dev,
218 struct device_attribute *attr,
219 const char *buf, size_t count)
221 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
222 enum efx_phy_mode old_mode, new_mode;
226 old_mode = efx->phy_mode;
227 if (count == 0 || *buf == '0')
228 new_mode = old_mode & ~PHY_MODE_SPECIAL;
230 new_mode = PHY_MODE_SPECIAL;
231 if (old_mode == new_mode) {
233 } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
236 efx->phy_mode = new_mode;
237 if (efx->board_info.type == EFX_BOARD_SFE4001)
238 err = sfe4001_poweron(efx);
240 err = sfn4111t_reset(efx);
241 efx_reconfigure_port(efx);
245 return err ? err : count;
248 static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
250 static void sfe4001_fini(struct efx_nic *efx)
252 EFX_INFO(efx, "%s\n", __func__);
254 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
255 sfe4001_poweroff(efx);
256 i2c_unregister_device(efx->board_info.ioexp_client);
257 i2c_unregister_device(efx->board_info.hwmon_client);
260 static int sfe4001_check_hw(struct efx_nic *efx)
264 /* If XAUI link is up then do not monitor */
265 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
268 /* Check the powered status of the PHY. Lack of power implies that
269 * the MAX6647 has shut down power to it, probably due to a temp.
270 * alarm. Reading the power status rather than the MAX6647 status
271 * directly because the later is read-to-clear and would thus
272 * start to power up the PHY again when polled, causing us to blip
273 * the power undesirably.
274 * We know we can read from the IO expander because we did
275 * it during power-on. Assume failure now is bad news. */
276 status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
278 (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
281 /* Use board power control, not PHY power control */
282 sfe4001_poweroff(efx);
283 efx->phy_mode = PHY_MODE_OFF;
285 return (status < 0) ? -EIO : -ERANGE;
288 static struct i2c_board_info sfe4001_hwmon_info = {
289 I2C_BOARD_INFO("max6647", 0x4e),
293 /* This board uses an I2C expander to provider power to the PHY, which needs to
294 * be turned on before the PHY can be used.
295 * Context: Process context, rtnl lock held
297 int sfe4001_init(struct efx_nic *efx)
301 #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
302 efx->board_info.hwmon_client =
303 i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
305 efx->board_info.hwmon_client =
306 i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
308 if (!efx->board_info.hwmon_client)
311 /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
312 rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
313 MAX664X_REG_WLHO, 90);
317 efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
318 if (!efx->board_info.ioexp_client) {
323 /* 10Xpress has fixed-function LED pins, so there is no board-specific
325 efx->board_info.blink = tenxpress_phy_blink;
327 efx->board_info.monitor = sfe4001_check_hw;
328 efx->board_info.fini = sfe4001_fini;
330 rc = sfe4001_poweron(efx);
334 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
338 EFX_INFO(efx, "PHY is powered on\n");
342 sfe4001_poweroff(efx);
344 i2c_unregister_device(efx->board_info.ioexp_client);
346 i2c_unregister_device(efx->board_info.hwmon_client);
350 static int sfn4111t_check_hw(struct efx_nic *efx)
354 /* If XAUI link is up then do not monitor */
355 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
358 /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
359 status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
368 static void sfn4111t_fini(struct efx_nic *efx)
370 EFX_INFO(efx, "%s\n", __func__);
372 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
373 i2c_unregister_device(efx->board_info.hwmon_client);
376 static struct i2c_board_info sfn4111t_hwmon_info = {
377 I2C_BOARD_INFO("max6647", 0x4e),
381 int sfn4111t_init(struct efx_nic *efx)
385 efx->board_info.hwmon_client =
386 i2c_new_device(&efx->i2c_adap, &sfn4111t_hwmon_info);
387 if (!efx->board_info.hwmon_client)
390 efx->board_info.blink = tenxpress_phy_blink;
391 efx->board_info.monitor = sfn4111t_check_hw;
392 efx->board_info.fini = sfn4111t_fini;
394 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
398 if (efx->phy_mode & PHY_MODE_SPECIAL)
404 i2c_unregister_device(efx->board_info.hwmon_client);