2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/config.h>
18 #include <linux/errno.h>
19 #include <linux/sched.h>
20 #include <linux/kernel.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/a.out.h>
28 #include <linux/interrupt.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/prctl.h>
32 #include <linux/delay.h>
33 #include <linux/kprobes.h>
35 #include <asm/kdebug.h>
36 #include <asm/pgtable.h>
37 #include <asm/uaccess.h>
38 #include <asm/system.h>
40 #include <asm/machdep.h>
46 #ifdef CONFIG_PMAC_BACKLIGHT
47 #include <asm/backlight.h>
50 #include <asm/firmware.h>
51 #include <asm/processor.h>
52 #include <asm/systemcfg.h>
55 #ifdef CONFIG_PPC64 /* XXX */
56 #define _IO_BASE pci_io_base
59 #ifdef CONFIG_DEBUGGER
60 int (*__debugger)(struct pt_regs *regs);
61 int (*__debugger_ipi)(struct pt_regs *regs);
62 int (*__debugger_bpt)(struct pt_regs *regs);
63 int (*__debugger_sstep)(struct pt_regs *regs);
64 int (*__debugger_iabr_match)(struct pt_regs *regs);
65 int (*__debugger_dabr_match)(struct pt_regs *regs);
66 int (*__debugger_fault_handler)(struct pt_regs *regs);
68 EXPORT_SYMBOL(__debugger);
69 EXPORT_SYMBOL(__debugger_ipi);
70 EXPORT_SYMBOL(__debugger_bpt);
71 EXPORT_SYMBOL(__debugger_sstep);
72 EXPORT_SYMBOL(__debugger_iabr_match);
73 EXPORT_SYMBOL(__debugger_dabr_match);
74 EXPORT_SYMBOL(__debugger_fault_handler);
77 struct notifier_block *powerpc_die_chain;
78 static DEFINE_SPINLOCK(die_notifier_lock);
80 int register_die_notifier(struct notifier_block *nb)
85 spin_lock_irqsave(&die_notifier_lock, flags);
86 err = notifier_chain_register(&powerpc_die_chain, nb);
87 spin_unlock_irqrestore(&die_notifier_lock, flags);
92 * Trap & Exception support
95 static DEFINE_SPINLOCK(die_lock);
97 int die(const char *str, struct pt_regs *regs, long err)
99 static int die_counter;
106 spin_lock_irq(&die_lock);
108 #ifdef CONFIG_PMAC_BACKLIGHT
109 if (_machine == _MACH_Pmac) {
110 set_backlight_enable(1);
111 set_backlight_level(BACKLIGHT_MAX);
114 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
115 #ifdef CONFIG_PREEMPT
120 printk("SMP NR_CPUS=%d ", NR_CPUS);
123 #ifdef CONFIG_DEBUG_PAGEALLOC
124 printk("DEBUG_PAGEALLOC ");
133 case PLATFORM_PSERIES:
137 case PLATFORM_PSERIES_LPAR:
138 printk("PSERIES LPAR ");
141 case PLATFORM_ISERIES_LPAR:
142 printk("ISERIES LPAR ");
145 case PLATFORM_POWERMAC:
160 spin_unlock_irq(&die_lock);
163 panic("Fatal exception in interrupt");
167 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
170 panic("Fatal exception");
177 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
181 if (!user_mode(regs)) {
182 if (die("Exception in kernel mode", regs, signr))
186 memset(&info, 0, sizeof(info));
187 info.si_signo = signr;
189 info.si_addr = (void __user *) addr;
190 force_sig_info(signr, &info, current);
193 * Init gets no signals that it doesn't have a handler for.
194 * That's all very well, but if it has caused a synchronous
195 * exception and we ignore the resulting signal, it will just
196 * generate the same exception over and over again and we get
197 * nowhere. Better to kill it and let the kernel panic.
199 if (current->pid == 1) {
200 __sighandler_t handler;
202 spin_lock_irq(¤t->sighand->siglock);
203 handler = current->sighand->action[signr-1].sa.sa_handler;
204 spin_unlock_irq(¤t->sighand->siglock);
205 if (handler == SIG_DFL) {
206 /* init has generated a synchronous exception
207 and it doesn't have a handler for the signal */
208 printk(KERN_CRIT "init has generated signal %d "
209 "but has no handler for it\n", signr);
216 void system_reset_exception(struct pt_regs *regs)
218 /* See if any machine dependent calls */
219 if (ppc_md.system_reset_exception)
220 ppc_md.system_reset_exception(regs);
222 die("System Reset", regs, SIGABRT);
224 /* Must die if the interrupt is not recoverable */
225 if (!(regs->msr & MSR_RI))
226 panic("Unrecoverable System Reset");
228 /* What should we do here? We could issue a shutdown or hard reset. */
233 * I/O accesses can cause machine checks on powermacs.
234 * Check if the NIP corresponds to the address of a sync
235 * instruction for which there is an entry in the exception
237 * Note that the 601 only takes a machine check on TEA
238 * (transfer error ack) signal assertion, and does not
239 * set any of the top 16 bits of SRR1.
242 static inline int check_io_access(struct pt_regs *regs)
244 #ifdef CONFIG_PPC_PMAC
245 unsigned long msr = regs->msr;
246 const struct exception_table_entry *entry;
247 unsigned int *nip = (unsigned int *)regs->nip;
249 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
250 && (entry = search_exception_tables(regs->nip)) != NULL) {
252 * Check that it's a sync instruction, or somewhere
253 * in the twi; isync; nop sequence that inb/inw/inl uses.
254 * As the address is in the exception table
255 * we should be able to read the instr there.
256 * For the debug message, we look at the preceding
259 if (*nip == 0x60000000) /* nop */
261 else if (*nip == 0x4c00012c) /* isync */
263 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
268 rb = (*nip >> 11) & 0x1f;
269 printk(KERN_DEBUG "%s bad port %lx at %p\n",
270 (*nip & 0x100)? "OUT to": "IN from",
271 regs->gpr[rb] - _IO_BASE, nip);
273 regs->nip = entry->fixup;
277 #endif /* CONFIG_PPC_PMAC */
281 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
282 /* On 4xx, the reason for the machine check or program exception
284 #define get_reason(regs) ((regs)->dsisr)
285 #ifndef CONFIG_FSL_BOOKE
286 #define get_mc_reason(regs) ((regs)->dsisr)
288 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
290 #define REASON_FP ESR_FP
291 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
292 #define REASON_PRIVILEGED ESR_PPR
293 #define REASON_TRAP ESR_PTR
295 /* single-step stuff */
296 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
297 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
300 /* On non-4xx, the reason for the machine check or program
301 exception is in the MSR. */
302 #define get_reason(regs) ((regs)->msr)
303 #define get_mc_reason(regs) ((regs)->msr)
304 #define REASON_FP 0x100000
305 #define REASON_ILLEGAL 0x80000
306 #define REASON_PRIVILEGED 0x40000
307 #define REASON_TRAP 0x20000
309 #define single_stepping(regs) ((regs)->msr & MSR_SE)
310 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
314 * This is "fall-back" implementation for configurations
315 * which don't provide platform-specific machine check info
317 void __attribute__ ((weak))
318 platform_machine_check(struct pt_regs *regs)
322 void machine_check_exception(struct pt_regs *regs)
327 /* See if any machine dependent calls */
328 if (ppc_md.machine_check_exception)
329 recover = ppc_md.machine_check_exception(regs);
334 unsigned long reason = get_mc_reason(regs);
336 if (user_mode(regs)) {
338 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
342 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
343 /* the qspan pci read routines can cause machine checks -- Cort */
344 bad_page_fault(regs, regs->dar, SIGBUS);
348 if (debugger_fault_handler(regs)) {
353 if (check_io_access(regs))
356 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
357 if (reason & ESR_IMCP) {
358 printk("Instruction");
359 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
362 printk(" machine check in kernel mode.\n");
363 #elif defined(CONFIG_440A)
364 printk("Machine check in kernel mode.\n");
365 if (reason & ESR_IMCP){
366 printk("Instruction Synchronous Machine Check exception\n");
367 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
370 u32 mcsr = mfspr(SPRN_MCSR);
372 printk("Instruction Read PLB Error\n");
374 printk("Data Read PLB Error\n");
376 printk("Data Write PLB Error\n");
377 if (mcsr & MCSR_TLBP)
378 printk("TLB Parity Error\n");
379 if (mcsr & MCSR_ICP){
380 flush_instruction_cache();
381 printk("I-Cache Parity Error\n");
383 if (mcsr & MCSR_DCSP)
384 printk("D-Cache Search Parity Error\n");
385 if (mcsr & MCSR_DCFP)
386 printk("D-Cache Flush Parity Error\n");
387 if (mcsr & MCSR_IMPE)
388 printk("Machine Check exception is imprecise\n");
391 mtspr(SPRN_MCSR, mcsr);
393 #elif defined (CONFIG_E500)
394 printk("Machine check in kernel mode.\n");
395 printk("Caused by (from MCSR=%lx): ", reason);
397 if (reason & MCSR_MCP)
398 printk("Machine Check Signal\n");
399 if (reason & MCSR_ICPERR)
400 printk("Instruction Cache Parity Error\n");
401 if (reason & MCSR_DCP_PERR)
402 printk("Data Cache Push Parity Error\n");
403 if (reason & MCSR_DCPERR)
404 printk("Data Cache Parity Error\n");
405 if (reason & MCSR_GL_CI)
406 printk("Guarded Load or Cache-Inhibited stwcx.\n");
407 if (reason & MCSR_BUS_IAERR)
408 printk("Bus - Instruction Address Error\n");
409 if (reason & MCSR_BUS_RAERR)
410 printk("Bus - Read Address Error\n");
411 if (reason & MCSR_BUS_WAERR)
412 printk("Bus - Write Address Error\n");
413 if (reason & MCSR_BUS_IBERR)
414 printk("Bus - Instruction Data Error\n");
415 if (reason & MCSR_BUS_RBERR)
416 printk("Bus - Read Data Bus Error\n");
417 if (reason & MCSR_BUS_WBERR)
418 printk("Bus - Read Data Bus Error\n");
419 if (reason & MCSR_BUS_IPERR)
420 printk("Bus - Instruction Parity Error\n");
421 if (reason & MCSR_BUS_RPERR)
422 printk("Bus - Read Parity Error\n");
423 #elif defined (CONFIG_E200)
424 printk("Machine check in kernel mode.\n");
425 printk("Caused by (from MCSR=%lx): ", reason);
427 if (reason & MCSR_MCP)
428 printk("Machine Check Signal\n");
429 if (reason & MCSR_CP_PERR)
430 printk("Cache Push Parity Error\n");
431 if (reason & MCSR_CPERR)
432 printk("Cache Parity Error\n");
433 if (reason & MCSR_EXCP_ERR)
434 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
435 if (reason & MCSR_BUS_IRERR)
436 printk("Bus - Read Bus Error on instruction fetch\n");
437 if (reason & MCSR_BUS_DRERR)
438 printk("Bus - Read Bus Error on data load\n");
439 if (reason & MCSR_BUS_WRERR)
440 printk("Bus - Write Bus Error on buffered store or cache line push\n");
441 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
442 printk("Machine check in kernel mode.\n");
443 printk("Caused by (from SRR1=%lx): ", reason);
444 switch (reason & 0x601F0000) {
446 printk("Machine check signal\n");
448 case 0: /* for 601 */
450 case 0x140000: /* 7450 MSS error and TEA */
451 printk("Transfer error ack signal\n");
454 printk("Data parity error signal\n");
457 printk("Address parity error signal\n");
460 printk("L1 Data Cache error\n");
463 printk("L1 Instruction Cache error\n");
466 printk("L2 data cache parity error\n");
469 printk("Unknown values in msr\n");
471 #endif /* CONFIG_4xx */
474 * Optional platform-provided routine to print out
475 * additional info, e.g. bus error registers.
477 platform_machine_check(regs);
478 #endif /* CONFIG_PPC64 */
480 if (debugger_fault_handler(regs))
482 die("Machine check", regs, SIGBUS);
484 /* Must die if the interrupt is not recoverable */
485 if (!(regs->msr & MSR_RI))
486 panic("Unrecoverable Machine check");
489 void SMIException(struct pt_regs *regs)
491 die("System Management Interrupt", regs, SIGABRT);
494 void unknown_exception(struct pt_regs *regs)
496 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
497 regs->nip, regs->msr, regs->trap);
499 _exception(SIGTRAP, regs, 0, 0);
502 void instruction_breakpoint_exception(struct pt_regs *regs)
504 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
505 5, SIGTRAP) == NOTIFY_STOP)
507 if (debugger_iabr_match(regs))
509 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
512 void RunModeException(struct pt_regs *regs)
514 _exception(SIGTRAP, regs, 0, 0);
517 void __kprobes single_step_exception(struct pt_regs *regs)
519 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
521 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
522 5, SIGTRAP) == NOTIFY_STOP)
524 if (debugger_sstep(regs))
527 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
531 * After we have successfully emulated an instruction, we have to
532 * check if the instruction was being single-stepped, and if so,
533 * pretend we got a single-step exception. This was pointed out
534 * by Kumar Gala. -- paulus
536 static void emulate_single_step(struct pt_regs *regs)
538 if (single_stepping(regs)) {
539 clear_single_step(regs);
540 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
544 static void parse_fpe(struct pt_regs *regs)
549 flush_fp_to_thread(current);
551 fpscr = current->thread.fpscr.val;
553 /* Invalid operation */
554 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
558 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
562 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
566 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
570 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
573 _exception(SIGFPE, regs, code, regs->nip);
577 * Illegal instruction emulation support. Originally written to
578 * provide the PVR to user applications using the mfspr rd, PVR.
579 * Return non-zero if we can't emulate, or -EFAULT if the associated
580 * memory access caused an access fault. Return zero on success.
582 * There are a couple of ways to do this, either "decode" the instruction
583 * or directly match lots of bits. In this case, matching lots of
584 * bits is faster and easier.
587 #define INST_MFSPR_PVR 0x7c1f42a6
588 #define INST_MFSPR_PVR_MASK 0xfc1fffff
590 #define INST_DCBA 0x7c0005ec
591 #define INST_DCBA_MASK 0x7c0007fe
593 #define INST_MCRXR 0x7c000400
594 #define INST_MCRXR_MASK 0x7c0007fe
596 #define INST_STRING 0x7c00042a
597 #define INST_STRING_MASK 0x7c0007fe
598 #define INST_STRING_GEN_MASK 0x7c00067e
599 #define INST_LSWI 0x7c0004aa
600 #define INST_LSWX 0x7c00042a
601 #define INST_STSWI 0x7c0005aa
602 #define INST_STSWX 0x7c00052a
604 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
606 u8 rT = (instword >> 21) & 0x1f;
607 u8 rA = (instword >> 16) & 0x1f;
608 u8 NB_RB = (instword >> 11) & 0x1f;
613 /* Early out if we are an invalid form of lswx */
614 if ((instword & INST_STRING_MASK) == INST_LSWX)
615 if ((rT == rA) || (rT == NB_RB))
618 EA = (rA == 0) ? 0 : regs->gpr[rA];
620 switch (instword & INST_STRING_MASK) {
624 num_bytes = regs->xer & 0x7f;
628 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
634 while (num_bytes != 0)
637 u32 shift = 8 * (3 - (pos & 0x3));
639 switch ((instword & INST_STRING_MASK)) {
642 if (get_user(val, (u8 __user *)EA))
644 /* first time updating this reg,
648 regs->gpr[rT] |= val << shift;
652 val = regs->gpr[rT] >> shift;
653 if (put_user(val, (u8 __user *)EA))
657 /* move EA to next address */
661 /* manage our position within the register */
672 static int emulate_instruction(struct pt_regs *regs)
677 if (!user_mode(regs))
679 CHECK_FULL_REGS(regs);
681 if (get_user(instword, (u32 __user *)(regs->nip)))
684 /* Emulate the mfspr rD, PVR. */
685 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
686 rd = (instword >> 21) & 0x1f;
687 regs->gpr[rd] = mfspr(SPRN_PVR);
691 /* Emulating the dcba insn is just a no-op. */
692 if ((instword & INST_DCBA_MASK) == INST_DCBA)
695 /* Emulate the mcrxr insn. */
696 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
697 int shift = (instword >> 21) & 0x1c;
698 unsigned long msk = 0xf0000000UL >> shift;
700 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
701 regs->xer &= ~0xf0000000UL;
705 /* Emulate load/store string insn. */
706 if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
707 return emulate_string_inst(regs, instword);
713 * Look through the list of trap instructions that are used for BUG(),
714 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
715 * that the exception was caused by a trap instruction of some kind.
716 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
719 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
721 #ifndef CONFIG_MODULES
722 #define module_find_bug(x) NULL
725 struct bug_entry *find_bug(unsigned long bugaddr)
727 struct bug_entry *bug;
729 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
730 if (bugaddr == bug->bug_addr)
732 return module_find_bug(bugaddr);
735 static int check_bug_trap(struct pt_regs *regs)
737 struct bug_entry *bug;
740 if (regs->msr & MSR_PR)
741 return 0; /* not in kernel */
742 addr = regs->nip; /* address of trap instruction */
743 if (addr < PAGE_OFFSET)
745 bug = find_bug(regs->nip);
748 if (bug->line & BUG_WARNING_TRAP) {
749 /* this is a WARN_ON rather than BUG/BUG_ON */
750 printk(KERN_ERR "Badness in %s at %s:%ld\n",
751 bug->function, bug->file,
752 bug->line & ~BUG_WARNING_TRAP);
756 printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
757 bug->function, bug->file, bug->line);
762 void __kprobes program_check_exception(struct pt_regs *regs)
764 unsigned int reason = get_reason(regs);
765 extern int do_mathemu(struct pt_regs *regs);
767 #ifdef CONFIG_MATH_EMULATION
768 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
769 * but there seems to be a hardware bug on the 405GP (RevD)
770 * that means ESR is sometimes set incorrectly - either to
771 * ESR_DST (!?) or 0. In the process of chasing this with the
772 * hardware people - not sure if it can happen on any illegal
773 * instruction or only on FP instructions, whether there is a
774 * pattern to occurences etc. -dgibson 31/Mar/2003 */
775 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
776 emulate_single_step(regs);
779 #endif /* CONFIG_MATH_EMULATION */
781 if (reason & REASON_FP) {
782 /* IEEE FP exception */
786 if (reason & REASON_TRAP) {
788 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
791 if (debugger_bpt(regs))
793 if (check_bug_trap(regs)) {
797 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
801 /* Try to emulate it if we should. */
802 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
803 switch (emulate_instruction(regs)) {
806 emulate_single_step(regs);
809 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
814 if (reason & REASON_PRIVILEGED)
815 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
817 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
820 void alignment_exception(struct pt_regs *regs)
824 fixed = fix_alignment(regs);
827 regs->nip += 4; /* skip over emulated instruction */
828 emulate_single_step(regs);
832 /* Operand address was bad */
833 if (fixed == -EFAULT) {
835 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
837 /* Search exception table */
838 bad_page_fault(regs, regs->dar, SIGSEGV);
841 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
844 void StackOverflow(struct pt_regs *regs)
846 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
847 current, regs->gpr[1]);
850 panic("kernel stack overflow");
853 void nonrecoverable_exception(struct pt_regs *regs)
855 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
856 regs->nip, regs->msr);
858 die("nonrecoverable exception", regs, SIGKILL);
861 void trace_syscall(struct pt_regs *regs)
863 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
864 current, current->pid, regs->nip, regs->link, regs->gpr[0],
865 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
868 void kernel_fp_unavailable_exception(struct pt_regs *regs)
870 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
871 "%lx at %lx\n", regs->trap, regs->nip);
872 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
875 void altivec_unavailable_exception(struct pt_regs *regs)
877 #if !defined(CONFIG_ALTIVEC)
878 if (user_mode(regs)) {
879 /* A user program has executed an altivec instruction,
880 but this kernel doesn't support altivec. */
881 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
885 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
886 "%lx at %lx\n", regs->trap, regs->nip);
887 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
890 #if defined(CONFIG_PPC64) || defined(CONFIG_E500)
891 void performance_monitor_exception(struct pt_regs *regs)
898 void SoftwareEmulation(struct pt_regs *regs)
900 extern int do_mathemu(struct pt_regs *);
901 extern int Soft_emulate_8xx(struct pt_regs *);
904 CHECK_FULL_REGS(regs);
906 if (!user_mode(regs)) {
908 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
911 #ifdef CONFIG_MATH_EMULATION
912 errcode = do_mathemu(regs);
914 errcode = Soft_emulate_8xx(regs);
918 _exception(SIGFPE, regs, 0, 0);
919 else if (errcode == -EFAULT)
920 _exception(SIGSEGV, regs, 0, 0);
922 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
924 emulate_single_step(regs);
926 #endif /* CONFIG_8xx */
928 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
930 void DebugException(struct pt_regs *regs, unsigned long debug_status)
932 if (debug_status & DBSR_IC) { /* instruction completion */
933 regs->msr &= ~MSR_DE;
934 if (user_mode(regs)) {
935 current->thread.dbcr0 &= ~DBCR0_IC;
937 /* Disable instruction completion */
938 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
939 /* Clear the instruction completion event */
940 mtspr(SPRN_DBSR, DBSR_IC);
941 if (debugger_sstep(regs))
944 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
947 #endif /* CONFIG_4xx || CONFIG_BOOKE */
949 #if !defined(CONFIG_TAU_INT)
950 void TAUException(struct pt_regs *regs)
952 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
953 regs->nip, regs->msr, regs->trap, print_tainted());
955 #endif /* CONFIG_INT_TAU */
957 #ifdef CONFIG_ALTIVEC
958 void altivec_assist_exception(struct pt_regs *regs)
962 if (!user_mode(regs)) {
963 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
964 " at %lx\n", regs->nip);
965 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
968 flush_altivec_to_thread(current);
970 err = emulate_altivec(regs);
972 regs->nip += 4; /* skip emulated instruction */
973 emulate_single_step(regs);
977 if (err == -EFAULT) {
978 /* got an error reading the instruction */
979 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
981 /* didn't recognize the instruction */
982 /* XXX quick hack for now: set the non-Java bit in the VSCR */
983 if (printk_ratelimit())
984 printk(KERN_ERR "Unrecognized altivec instruction "
985 "in %s at %lx\n", current->comm, regs->nip);
986 current->thread.vscr.u[3] |= 0x10000;
989 #endif /* CONFIG_ALTIVEC */
991 #ifdef CONFIG_FSL_BOOKE
992 void CacheLockingException(struct pt_regs *regs, unsigned long address,
993 unsigned long error_code)
995 /* We treat cache locking instructions from the user
996 * as priv ops, in the future we could try to do
999 if (error_code & (ESR_DLK|ESR_ILK))
1000 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1003 #endif /* CONFIG_FSL_BOOKE */
1006 void SPEFloatingPointException(struct pt_regs *regs)
1008 unsigned long spefscr;
1012 spefscr = current->thread.spefscr;
1013 fpexc_mode = current->thread.fpexc_mode;
1015 /* Hardware does not neccessarily set sticky
1016 * underflow/overflow/invalid flags */
1017 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1019 spefscr |= SPEFSCR_FOVFS;
1021 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1023 spefscr |= SPEFSCR_FUNFS;
1025 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1027 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1029 spefscr |= SPEFSCR_FINVS;
1031 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1034 current->thread.spefscr = spefscr;
1036 _exception(SIGFPE, regs, code, regs->nip);
1042 * We enter here if we get an unrecoverable exception, that is, one
1043 * that happened at a point where the RI (recoverable interrupt) bit
1044 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1045 * we therefore lost state by taking this exception.
1047 void unrecoverable_exception(struct pt_regs *regs)
1049 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1050 regs->trap, regs->nip);
1051 die("Unrecoverable exception", regs, SIGABRT);
1054 #ifdef CONFIG_BOOKE_WDT
1056 * Default handler for a Watchdog exception,
1057 * spins until a reboot occurs
1059 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1061 /* Generic WatchdogHandler, implement your own */
1062 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1066 void WatchdogException(struct pt_regs *regs)
1068 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1069 WatchdogHandler(regs);
1074 * We enter here if we discover during exception entry that we are
1075 * running in supervisor mode with a userspace value in the stack pointer.
1077 void kernel_bad_stack(struct pt_regs *regs)
1079 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1080 regs->gpr[1], regs->nip);
1081 die("Bad kernel stack pointer", regs, SIGABRT);
1084 void __init trap_init(void)