2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/bio.h>
26 #include <linux/interrupt.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/major.h>
32 #include <linux/blkpg.h>
33 #include <linux/timer.h>
34 #include <linux/proc_fs.h>
35 #include <linux/init.h>
36 #include <linux/hdreg.h>
37 #include <linux/spinlock.h>
38 #include <linux/blkdev.h>
39 #include <linux/genhd.h>
40 #include <asm/uaccess.h>
44 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
46 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
47 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
49 /* Embedded module documentation macros - see modules.h */
50 /* Original author Chris Frantz - Compaq Computer Corporation */
51 MODULE_AUTHOR("Compaq Computer Corporation");
52 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
53 MODULE_LICENSE("GPL");
58 #include "ida_ioctl.h"
60 #define READ_AHEAD 128
61 #define NR_CMDS 128 /* This could probably go as high as ~400 */
66 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */
69 static ctlr_info_t *hba[MAX_CTLR];
73 #define NR_PRODUCTS ARRAY_SIZE(products)
75 /* board_id = Subsystem Device ID & Vendor ID
76 * product = Marketing Name for the board
77 * access = Address of the struct of function pointers
79 static struct board_type products[] = {
80 { 0x0040110E, "IDA", &smart1_access },
81 { 0x0140110E, "IDA-2", &smart1_access },
82 { 0x1040110E, "IAES", &smart1_access },
83 { 0x2040110E, "SMART", &smart1_access },
84 { 0x3040110E, "SMART-2/E", &smart2e_access },
85 { 0x40300E11, "SMART-2/P", &smart2_access },
86 { 0x40310E11, "SMART-2SL", &smart2_access },
87 { 0x40320E11, "Smart Array 3200", &smart2_access },
88 { 0x40330E11, "Smart Array 3100ES", &smart2_access },
89 { 0x40340E11, "Smart Array 221", &smart2_access },
90 { 0x40400E11, "Integrated Array", &smart4_access },
91 { 0x40480E11, "Compaq Raid LC2", &smart4_access },
92 { 0x40500E11, "Smart Array 4200", &smart4_access },
93 { 0x40510E11, "Smart Array 4250ES", &smart4_access },
94 { 0x40580E11, "Smart Array 431", &smart4_access },
97 /* define the PCI info for the PCI cards this driver can control */
98 static const struct pci_device_id cpqarray_pci_device_id[] =
100 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
101 0x0E11, 0x4058, 0, 0, 0}, /* SA431 */
102 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
103 0x0E11, 0x4051, 0, 0, 0}, /* SA4250ES */
104 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
105 0x0E11, 0x4050, 0, 0, 0}, /* SA4200 */
106 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
107 0x0E11, 0x4048, 0, 0, 0}, /* LC2 */
108 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
109 0x0E11, 0x4040, 0, 0, 0}, /* Integrated Array */
110 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
111 0x0E11, 0x4034, 0, 0, 0}, /* SA 221 */
112 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
113 0x0E11, 0x4033, 0, 0, 0}, /* SA 3100ES*/
114 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
115 0x0E11, 0x4032, 0, 0, 0}, /* SA 3200*/
116 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
117 0x0E11, 0x4031, 0, 0, 0}, /* SA 2SL*/
118 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
119 0x0E11, 0x4030, 0, 0, 0}, /* SA 2P */
123 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
125 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
128 #define DBG(s) do { s } while(0)
129 /* Debug (general info)... */
130 #define DBGINFO(s) do { } while(0)
131 /* Debug Paranoid... */
132 #define DBGP(s) do { } while(0)
133 /* Debug Extra Paranoid... */
134 #define DBGPX(s) do { } while(0)
136 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
137 static void __iomem *remap_pci_mem(ulong base, ulong size);
138 static int cpqarray_eisa_detect(void);
139 static int pollcomplete(int ctlr);
140 static void getgeometry(int ctlr);
141 static void start_fwbk(int ctlr);
143 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
144 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
146 static void free_hba(int i);
147 static int alloc_cpqarray_hba(void);
156 unsigned int log_unit );
158 static int ida_open(struct inode *inode, struct file *filep);
159 static int ida_release(struct inode *inode, struct file *filep);
160 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
161 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
162 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
164 static void do_ida_request(request_queue_t *q);
165 static void start_io(ctlr_info_t *h);
167 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
168 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
169 static inline void complete_buffers(struct bio *bio, int ok);
170 static inline void complete_command(cmdlist_t *cmd, int timeout);
172 static irqreturn_t do_ida_intr(int irq, void *dev_id);
173 static void ida_timer(unsigned long tdata);
174 static int ida_revalidate(struct gendisk *disk);
175 static int revalidate_allvol(ctlr_info_t *host);
176 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
178 #ifdef CONFIG_PROC_FS
179 static void ida_procinit(int i);
180 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
182 static void ida_procinit(int i) {}
185 static inline drv_info_t *get_drv(struct gendisk *disk)
187 return disk->private_data;
190 static inline ctlr_info_t *get_host(struct gendisk *disk)
192 return disk->queue->queuedata;
196 static struct block_device_operations ida_fops = {
197 .owner = THIS_MODULE,
199 .release = ida_release,
201 .getgeo = ida_getgeo,
202 .revalidate_disk= ida_revalidate,
206 #ifdef CONFIG_PROC_FS
208 static struct proc_dir_entry *proc_array;
211 * Get us a file in /proc/array that says something about each controller.
212 * Create /proc/array if it doesn't exist yet.
214 static void __init ida_procinit(int i)
216 if (proc_array == NULL) {
217 proc_array = proc_mkdir("cpqarray", proc_root_driver);
218 if (!proc_array) return;
221 create_proc_read_entry(hba[i]->devname, 0, proc_array,
222 ida_proc_get_info, hba[i]);
226 * Report information about this controller.
228 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
233 ctlr_info_t *h = (ctlr_info_t*)data;
235 #ifdef CPQ_PROC_PRINT_QUEUES
241 size = sprintf(buffer, "%s: Compaq %s Controller\n"
242 " Board ID: 0x%08lx\n"
243 " Firmware Revision: %c%c%c%c\n"
244 " Controller Sig: 0x%08lx\n"
245 " Memory Address: 0x%08lx\n"
246 " I/O Port: 0x%04x\n"
248 " Logical drives: %d\n"
249 " Physical drives: %d\n\n"
250 " Current Q depth: %d\n"
251 " Max Q depth since init: %d\n\n",
254 (unsigned long)h->board_id,
255 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
256 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
257 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
258 h->log_drives, h->phys_drives,
259 h->Qdepth, h->maxQsinceinit);
261 pos += size; len += size;
263 size = sprintf(buffer+len, "Logical Drive Info:\n");
264 pos += size; len += size;
266 for(i=0; i<h->log_drives; i++) {
268 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
269 ctlr, i, drv->blk_size, drv->nr_blks);
270 pos += size; len += size;
273 #ifdef CPQ_PROC_PRINT_QUEUES
274 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
275 size = sprintf(buffer+len, "\nCurrent Queues:\n");
276 pos += size; len += size;
279 size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
281 while(c && c != h->reqQ) {
282 size = sprintf(buffer+len, "->%p", c);
283 pos += size; len += size;
288 size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
290 while(c && c != h->cmpQ) {
291 size = sprintf(buffer+len, "->%p", c);
292 pos += size; len += size;
296 size = sprintf(buffer+len, "\n"); pos += size; len += size;
297 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
299 size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
300 h->nr_allocs, h->nr_frees);
301 pos += size; len += size;
304 *start = buffer+offset;
310 #endif /* CONFIG_PROC_FS */
312 module_param_array(eisa, int, NULL, 0);
314 static void release_io_mem(ctlr_info_t *c)
316 /* if IO mem was not protected do nothing */
317 if( c->io_mem_addr == 0)
319 release_region(c->io_mem_addr, c->io_mem_length);
321 c->io_mem_length = 0;
324 static void __devexit cpqarray_remove_one(int i)
329 /* sendcmd will turn off interrupt, and send the flush...
330 * To write all data in the battery backed cache to disks
331 * no data returned, but don't want to send NULL to sendcmd */
332 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
334 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
337 free_irq(hba[i]->intr, hba[i]);
338 iounmap(hba[i]->vaddr);
339 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
340 del_timer(&hba[i]->timer);
341 remove_proc_entry(hba[i]->devname, proc_array);
342 pci_free_consistent(hba[i]->pci_dev,
343 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
344 hba[i]->cmd_pool_dhandle);
345 kfree(hba[i]->cmd_pool_bits);
346 for(j = 0; j < NWD; j++) {
347 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
348 del_gendisk(ida_gendisk[i][j]);
349 put_disk(ida_gendisk[i][j]);
351 blk_cleanup_queue(hba[i]->queue);
352 release_io_mem(hba[i]);
356 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
359 ctlr_info_t *tmp_ptr;
361 if (pci_get_drvdata(pdev) == NULL) {
362 printk( KERN_ERR "cpqarray: Unable to remove device \n");
366 tmp_ptr = pci_get_drvdata(pdev);
368 if (hba[i] == NULL) {
369 printk(KERN_ERR "cpqarray: controller %d appears to have"
370 "already been removed \n", i);
373 pci_set_drvdata(pdev, NULL);
375 cpqarray_remove_one(i);
378 /* removing an instance that was not removed automatically..
379 * must be an eisa card.
381 static void __devexit cpqarray_remove_one_eisa (int i)
383 if (hba[i] == NULL) {
384 printk(KERN_ERR "cpqarray: controller %d appears to have"
385 "already been removed \n", i);
388 cpqarray_remove_one(i);
391 /* pdev is NULL for eisa */
392 static int __init cpqarray_register_ctlr( int i, struct pci_dev *pdev)
398 * register block devices
399 * Find disks and fill in structs
400 * Get an interrupt, set the Q depth and get into /proc
403 /* If this successful it should insure that we are the only */
404 /* instance of the driver */
405 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
408 hba[i]->access.set_intr_mask(hba[i], 0);
409 if (request_irq(hba[i]->intr, do_ida_intr,
410 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
412 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
413 hba[i]->intr, hba[i]->devname);
417 for (j=0; j<NWD; j++) {
418 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
419 if (!ida_gendisk[i][j])
423 hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
424 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
425 &(hba[i]->cmd_pool_dhandle));
426 hba[i]->cmd_pool_bits = kmalloc(
427 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
430 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
433 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
434 memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
435 printk(KERN_INFO "cpqarray: Finding drives on %s",
438 spin_lock_init(&hba[i]->lock);
439 q = blk_init_queue(do_ida_request, &hba[i]->lock);
444 q->queuedata = hba[i];
452 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
454 /* This is a hardware imposed limit. */
455 blk_queue_max_hw_segments(q, SG_MAX);
457 /* This is a driver limit and could be eliminated. */
458 blk_queue_max_phys_segments(q, SG_MAX);
460 init_timer(&hba[i]->timer);
461 hba[i]->timer.expires = jiffies + IDA_TIMER;
462 hba[i]->timer.data = (unsigned long)hba[i];
463 hba[i]->timer.function = ida_timer;
464 add_timer(&hba[i]->timer);
466 /* Enable IRQ now that spinlock and rate limit timer are set up */
467 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
469 for(j=0; j<NWD; j++) {
470 struct gendisk *disk = ida_gendisk[i][j];
471 drv_info_t *drv = &hba[i]->drv[j];
472 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
473 disk->major = COMPAQ_SMART2_MAJOR + i;
474 disk->first_minor = j<<NWD_SHIFT;
475 disk->fops = &ida_fops;
476 if (j && !drv->nr_blks)
478 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
479 set_capacity(disk, drv->nr_blks);
480 disk->queue = hba[i]->queue;
481 disk->private_data = drv;
490 kfree(hba[i]->cmd_pool_bits);
491 if (hba[i]->cmd_pool)
492 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
493 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
496 put_disk(ida_gendisk[i][j]);
497 ida_gendisk[i][j] = NULL;
499 free_irq(hba[i]->intr, hba[i]);
501 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
504 pci_set_drvdata(pdev, NULL);
505 release_io_mem(hba[i]);
508 printk( KERN_ERR "cpqarray: out of memory");
513 static int __init cpqarray_init_one( struct pci_dev *pdev,
514 const struct pci_device_id *ent)
518 printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
519 " bus %d dev %d func %d\n",
520 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
521 PCI_FUNC(pdev->devfn));
522 i = alloc_cpqarray_hba();
525 memset(hba[i], 0, sizeof(ctlr_info_t));
526 sprintf(hba[i]->devname, "ida%d", i);
528 /* Initialize the pdev driver private data */
529 pci_set_drvdata(pdev, hba[i]);
531 if (cpqarray_pci_init(hba[i], pdev) != 0) {
532 pci_set_drvdata(pdev, NULL);
533 release_io_mem(hba[i]);
538 return (cpqarray_register_ctlr(i, pdev));
541 static struct pci_driver cpqarray_pci_driver = {
543 .probe = cpqarray_init_one,
544 .remove = __devexit_p(cpqarray_remove_one_pci),
545 .id_table = cpqarray_pci_device_id,
549 * This is it. Find all the controllers and register them.
550 * returns the number of block devices registered.
552 static int __init cpqarray_init(void)
554 int num_cntlrs_reg = 0;
558 /* detect controllers */
559 printk(DRIVER_NAME "\n");
561 rc = pci_register_driver(&cpqarray_pci_driver);
564 cpqarray_eisa_detect();
566 for (i=0; i < MAX_CTLR; i++) {
571 return(num_cntlrs_reg);
574 /* Function to find the first free pointer into our hba[] array */
575 /* Returns -1 if no free entries are left. */
576 static int alloc_cpqarray_hba(void)
580 for(i=0; i< MAX_CTLR; i++) {
581 if (hba[i] == NULL) {
582 hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
584 printk(KERN_ERR "cpqarray: out of memory.\n");
590 printk(KERN_WARNING "cpqarray: This driver supports a maximum"
591 " of 8 controllers.\n");
595 static void free_hba(int i)
602 * Find the IO address of the controller, its IRQ and so forth. Fill
603 * in some basic stuff into the ctlr_info_t structure.
605 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
607 ushort vendor_id, device_id, command;
608 unchar cache_line_size, latency_timer;
609 unchar irq, revision;
610 unsigned long addr[6];
616 if (pci_enable_device(pdev)) {
617 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
620 vendor_id = pdev->vendor;
621 device_id = pdev->device;
625 addr[i] = pci_resource_start(pdev, i);
627 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
629 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
633 pci_read_config_word(pdev, PCI_COMMAND, &command);
634 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
635 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
636 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
638 pci_read_config_dword(pdev, 0x2c, &board_id);
640 /* check to see if controller has been disabled */
641 if(!(command & 0x02)) {
643 "cpqarray: controller appears to be disabled\n");
648 printk("vendor_id = %x\n", vendor_id);
649 printk("device_id = %x\n", device_id);
650 printk("command = %x\n", command);
652 printk("addr[%d] = %lx\n", i, addr[i]);
653 printk("revision = %x\n", revision);
654 printk("irq = %x\n", irq);
655 printk("cache_line_size = %x\n", cache_line_size);
656 printk("latency_timer = %x\n", latency_timer);
657 printk("board_id = %x\n", board_id);
663 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
665 c->io_mem_addr = addr[i];
666 c->io_mem_length = pci_resource_end(pdev, i)
667 - pci_resource_start(pdev, i) + 1;
668 if(!request_region( c->io_mem_addr, c->io_mem_length,
671 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
673 c->io_mem_length = 0;
681 if (!(pci_resource_flags(pdev, i) &
682 PCI_BASE_ADDRESS_SPACE_IO)) {
683 c->paddr = pci_resource_start (pdev, i);
688 c->vaddr = remap_pci_mem(c->paddr, 128);
691 c->board_id = board_id;
693 for(i=0; i<NR_PRODUCTS; i++) {
694 if (board_id == products[i].board_id) {
695 c->product_name = products[i].product_name;
696 c->access = *(products[i].access);
700 if (i == NR_PRODUCTS) {
701 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
702 " to access the SMART Array controller %08lx\n",
703 (unsigned long)board_id);
711 * Map (physical) PCI mem into (virtual) kernel space
713 static void __iomem *remap_pci_mem(ulong base, ulong size)
715 ulong page_base = ((ulong) base) & PAGE_MASK;
716 ulong page_offs = ((ulong) base) - page_base;
717 void __iomem *page_remapped = ioremap(page_base, page_offs+size);
719 return (page_remapped ? (page_remapped + page_offs) : NULL);
724 * Config string is a comma separated set of i/o addresses of EISA cards.
726 static int cpqarray_setup(char *str)
730 (void)get_options(str, ARRAY_SIZE(ints), ints);
732 for(i=0; i<ints[0] && i<8; i++)
737 __setup("smart2=", cpqarray_setup);
742 * Find an EISA controller's signature. Set up an hba if we find it.
744 static int __init cpqarray_eisa_detect(void)
752 while(i<8 && eisa[i]) {
753 ctlr = alloc_cpqarray_hba();
756 board_id = inl(eisa[i]+0xC80);
757 for(j=0; j < NR_PRODUCTS; j++)
758 if (board_id == products[j].board_id)
761 if (j == NR_PRODUCTS) {
762 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
763 " to access the SMART Array controller %08lx\n", (unsigned long)board_id);
767 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
768 hba[ctlr]->io_mem_addr = eisa[i];
769 hba[ctlr]->io_mem_length = 0x7FF;
770 if(!request_region(hba[ctlr]->io_mem_addr,
771 hba[ctlr]->io_mem_length,
774 printk(KERN_WARNING "cpqarray: I/O range already in "
775 "use addr = %lx length = %ld\n",
776 hba[ctlr]->io_mem_addr,
777 hba[ctlr]->io_mem_length);
783 * Read the config register to find our interrupt
785 intr = inb(eisa[i]+0xCC0) >> 4;
786 if (intr & 1) intr = 11;
787 else if (intr & 2) intr = 10;
788 else if (intr & 4) intr = 14;
789 else if (intr & 8) intr = 15;
791 hba[ctlr]->intr = intr;
792 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
793 hba[ctlr]->product_name = products[j].product_name;
794 hba[ctlr]->access = *(products[j].access);
795 hba[ctlr]->ctlr = ctlr;
796 hba[ctlr]->board_id = board_id;
797 hba[ctlr]->pci_dev = NULL; /* not PCI */
800 printk("i = %d, j = %d\n", i, j);
801 printk("irq = %x\n", intr);
802 printk("product name = %s\n", products[j].product_name);
803 printk("board_id = %x\n", board_id);
809 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
811 "cpqarray: Can't register EISA controller %d\n",
820 * Open. Make sure the device is really there.
822 static int ida_open(struct inode *inode, struct file *filep)
824 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
825 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
827 DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
829 * Root is allowed to open raw volume zero even if it's not configured
830 * so array config can still work. I don't think I really like this,
831 * but I'm already using way to many device nodes to claim another one
832 * for "raw controller".
835 if (!capable(CAP_SYS_RAWIO))
837 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
847 static int ida_release(struct inode *inode, struct file *filep)
849 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
855 * Enqueuing and dequeuing functions for cmdlists.
857 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
861 c->next = c->prev = c;
863 c->prev = (*Qptr)->prev;
865 (*Qptr)->prev->next = c;
870 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
872 if (c && c->next != c) {
873 if (*Qptr == c) *Qptr = c->next;
874 c->prev->next = c->next;
875 c->next->prev = c->prev;
883 * Get a request and submit it to the controller.
884 * This routine needs to grab all the requests it possibly can from the
885 * req Q and submit them. Interrupts are off (and need to be off) when you
886 * are in here (either via the dummy do_ida_request functions or by being
887 * called from the interrupt handler
889 static void do_ida_request(request_queue_t *q)
891 ctlr_info_t *h = q->queuedata;
893 struct request *creq;
894 struct scatterlist tmp_sg[SG_MAX];
897 if (blk_queue_plugged(q))
901 creq = elv_next_request(q);
905 BUG_ON(creq->nr_phys_segments > SG_MAX);
907 if ((c = cmd_alloc(h,1)) == NULL)
910 blkdev_dequeue_request(creq);
913 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
914 c->hdr.size = sizeof(rblk_t) >> 2;
915 c->size += sizeof(rblk_t);
917 c->req.hdr.blk = creq->sector;
920 printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
922 seg = blk_rq_map_sg(q, creq, tmp_sg);
924 /* Now do all the DMA Mappings */
925 if (rq_data_dir(creq) == READ)
926 dir = PCI_DMA_FROMDEVICE;
928 dir = PCI_DMA_TODEVICE;
929 for( i=0; i < seg; i++)
931 c->req.sg[i].size = tmp_sg[i].length;
932 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
935 tmp_sg[i].length, dir);
937 DBGPX( printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
938 c->req.hdr.sg_cnt = seg;
939 c->req.hdr.blk_cnt = creq->nr_sectors;
940 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
943 /* Put the request on the tail of the request queue */
946 if (h->Qdepth > h->maxQsinceinit)
947 h->maxQsinceinit = h->Qdepth;
956 * start_io submits everything on a controller's request queue
957 * and moves it to the completion queue.
959 * Interrupts had better be off if you're in here
961 static void start_io(ctlr_info_t *h)
965 while((c = h->reqQ) != NULL) {
966 /* Can't do anything if we're busy */
967 if (h->access.fifo_full(h) == 0)
970 /* Get the first entry from the request Q */
971 removeQ(&h->reqQ, c);
974 /* Tell the controller to do our bidding */
975 h->access.submit_command(h, c);
977 /* Get onto the completion Q */
982 static inline void complete_buffers(struct bio *bio, int ok)
986 int nr_sectors = bio_sectors(bio);
991 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
997 * Mark all buffers that cmd was responsible for
999 static inline void complete_command(cmdlist_t *cmd, int timeout)
1001 struct request *rq = cmd->rq;
1005 if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1006 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1007 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1008 cmd->ctlr, cmd->hdr.unit);
1009 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1011 if (cmd->req.hdr.rcode & RCODE_FATAL) {
1012 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1013 cmd->ctlr, cmd->hdr.unit);
1016 if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1017 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1018 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1019 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1020 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1023 if (timeout) ok = 0;
1024 /* unmap the DMA mapping for all the scatter gather elements */
1025 if (cmd->req.hdr.cmd == IDA_READ)
1026 ddir = PCI_DMA_FROMDEVICE;
1028 ddir = PCI_DMA_TODEVICE;
1029 for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1030 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1031 cmd->req.sg[i].size, ddir);
1033 complete_buffers(rq->bio, ok);
1035 if (blk_fs_request(rq)) {
1036 const int rw = rq_data_dir(rq);
1038 disk_stat_add(rq->rq_disk, sectors[rw], rq->nr_sectors);
1041 add_disk_randomness(rq->rq_disk);
1043 DBGPX(printk("Done with %p\n", rq););
1044 end_that_request_last(rq, ok ? 1 : -EIO);
1048 * The controller will interrupt us upon completion of commands.
1049 * Find the command on the completion queue, remove it, tell the OS and
1050 * try to queue up more IO
1052 static irqreturn_t do_ida_intr(int irq, void *dev_id)
1054 ctlr_info_t *h = dev_id;
1056 unsigned long istat;
1057 unsigned long flags;
1060 istat = h->access.intr_pending(h);
1061 /* Is this interrupt for us? */
1066 * If there are completed commands in the completion queue,
1067 * we had better do something about it.
1069 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1070 if (istat & FIFO_NOT_EMPTY) {
1071 while((a = h->access.command_completed(h))) {
1073 if ((c = h->cmpQ) == NULL)
1075 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1078 while(c->busaddr != a) {
1084 * If we've found the command, take it off the
1085 * completion Q and free it
1087 if (c->busaddr == a) {
1088 removeQ(&h->cmpQ, c);
1089 /* Check for invalid command.
1090 * Controller returns command error,
1094 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1096 c->req.hdr.rcode = RCODE_INVREQ;
1098 if (c->type == CMD_RWREQ) {
1099 complete_command(c, 0);
1101 } else if (c->type == CMD_IOCTL_PEND) {
1102 c->type = CMD_IOCTL_DONE;
1110 * See if we can queue up some more IO
1112 do_ida_request(h->queue);
1113 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1118 * This timer was for timing out requests that haven't happened after
1119 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to
1120 * reset a flags structure so we don't flood the user with
1121 * "Non-Fatal error" messages.
1123 static void ida_timer(unsigned long tdata)
1125 ctlr_info_t *h = (ctlr_info_t*)tdata;
1127 h->timer.expires = jiffies + IDA_TIMER;
1128 add_timer(&h->timer);
1132 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1134 drv_info_t *drv = get_drv(bdev->bd_disk);
1136 if (drv->cylinders) {
1137 geo->heads = drv->heads;
1138 geo->sectors = drv->sectors;
1139 geo->cylinders = drv->cylinders;
1142 geo->sectors = 0x3f;
1143 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1150 * ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1151 * setting readahead and submitting commands from userspace to the controller.
1153 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1155 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1156 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1158 ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1163 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1167 if (!capable(CAP_SYS_RAWIO))
1169 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1173 if (copy_from_user(my_io, io, sizeof(*my_io)))
1175 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1179 if (copy_to_user(io, my_io, sizeof(*my_io)))
1186 if (!arg) return -EINVAL;
1187 put_user(host->ctlr_sig, (int __user *)arg);
1189 case IDAREVALIDATEVOLS:
1190 if (iminor(inode) != 0)
1192 return revalidate_allvol(host);
1193 case IDADRIVERVERSION:
1194 if (!arg) return -EINVAL;
1195 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1200 ida_pci_info_struct pciinfo;
1202 if (!arg) return -EINVAL;
1203 pciinfo.bus = host->pci_dev->bus->number;
1204 pciinfo.dev_fn = host->pci_dev->devfn;
1205 pciinfo.board_id = host->board_id;
1206 if(copy_to_user((void __user *) arg, &pciinfo,
1207 sizeof( ida_pci_info_struct)))
1218 * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1219 * The command block (io) has already been copied to kernel space for us,
1220 * however, any elements in the sglist need to be copied to kernel space
1221 * or copied back to userspace.
1223 * Only root may perform a controller passthru command, however I'm not doing
1224 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and
1225 * putting a 64M buffer in the sglist is probably a *bad* idea.
1227 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1232 unsigned long flags;
1235 if ((c = cmd_alloc(h, 0)) == NULL)
1238 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1239 c->hdr.size = sizeof(rblk_t) >> 2;
1240 c->size += sizeof(rblk_t);
1242 c->req.hdr.cmd = io->cmd;
1243 c->req.hdr.blk = io->blk;
1244 c->req.hdr.blk_cnt = io->blk_cnt;
1245 c->type = CMD_IOCTL_PEND;
1247 /* Pre submit processing */
1250 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1257 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1262 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1263 sizeof(ida_ioctl_t),
1264 PCI_DMA_BIDIRECTIONAL);
1265 c->req.sg[0].size = io->sg[0].size;
1266 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1267 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1268 c->req.hdr.sg_cnt = 1;
1271 case READ_FLASH_ROM:
1272 case SENSE_CONTROLLER_PERFORMANCE:
1273 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1281 c->req.sg[0].size = io->sg[0].size;
1282 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1283 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1284 c->req.hdr.sg_cnt = 1;
1287 case IDA_WRITE_MEDIA:
1288 case DIAG_PASS_THRU:
1289 case COLLECT_BUFFER:
1290 case WRITE_FLASH_ROM:
1291 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1298 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1303 c->req.sg[0].size = io->sg[0].size;
1304 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1305 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1306 c->req.hdr.sg_cnt = 1;
1309 c->req.sg[0].size = sizeof(io->c);
1310 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1311 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1312 c->req.hdr.sg_cnt = 1;
1315 /* Put the request on the tail of the request queue */
1316 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1320 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1322 /* Wait for completion */
1323 while(c->type != CMD_IOCTL_DONE)
1327 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1328 PCI_DMA_BIDIRECTIONAL);
1329 /* Post submit processing */
1332 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1333 sizeof(ida_ioctl_t),
1334 PCI_DMA_BIDIRECTIONAL);
1336 case DIAG_PASS_THRU:
1337 case SENSE_CONTROLLER_PERFORMANCE:
1338 case READ_FLASH_ROM:
1339 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1343 /* fall through and free p */
1345 case IDA_WRITE_MEDIA:
1346 case COLLECT_BUFFER:
1347 case WRITE_FLASH_ROM:
1354 io->rcode = c->req.hdr.rcode;
1360 * Commands are pre-allocated in a large block. Here we use a simple bitmap
1361 * scheme to suballocte them to the driver. Operations that are not time
1362 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1363 * as the first argument to get a new command.
1365 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1369 dma_addr_t cmd_dhandle;
1371 if (!get_from_pool) {
1372 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1373 sizeof(cmdlist_t), &cmd_dhandle);
1378 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1381 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1382 c = h->cmd_pool + i;
1383 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1387 memset(c, 0, sizeof(cmdlist_t));
1388 c->busaddr = cmd_dhandle;
1392 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1396 if (!got_from_pool) {
1397 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1400 i = c - h->cmd_pool;
1401 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1406 /***********************************************************************
1408 Send a command to an IDA using the memory mapped FIFO interface
1409 and wait for it to complete.
1410 This routine should only be called at init time.
1411 ***********************************************************************/
1418 unsigned int blkcnt,
1419 unsigned int log_unit )
1425 ctlr_info_t *info_p = hba[ctlr];
1427 c = cmd_alloc(info_p, 1);
1431 c->hdr.unit = log_unit;
1433 c->hdr.size = sizeof(rblk_t) >> 2;
1434 c->size += sizeof(rblk_t);
1436 /* The request information. */
1437 c->req.hdr.next = 0;
1438 c->req.hdr.rcode = 0;
1440 c->req.hdr.sg_cnt = 1;
1441 c->req.hdr.reserved = 0;
1444 c->req.sg[0].size = 512;
1446 c->req.sg[0].size = size;
1448 c->req.hdr.blk = blk;
1449 c->req.hdr.blk_cnt = blkcnt;
1450 c->req.hdr.cmd = (unsigned char) cmd;
1451 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1452 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1456 info_p->access.set_intr_mask(info_p, 0);
1457 /* Make sure there is room in the command FIFO */
1458 /* Actually it should be completely empty at this time. */
1459 for (i = 200000; i > 0; i--) {
1460 temp = info_p->access.fifo_full(info_p);
1466 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1467 " waiting!\n", ctlr);
1473 info_p->access.submit_command(info_p, c);
1474 complete = pollcomplete(ctlr);
1476 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1477 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1478 if (complete != 1) {
1479 if (complete != c->busaddr) {
1480 printk( KERN_WARNING
1481 "cpqarray ida%d: idaSendPciCmd "
1482 "Invalid command list address returned! (%08lx)\n",
1483 ctlr, (unsigned long)complete);
1484 cmd_free(info_p, c, 1);
1488 printk( KERN_WARNING
1489 "cpqarray ida%d: idaSendPciCmd Timeout out, "
1490 "No command list address returned!\n",
1492 cmd_free(info_p, c, 1);
1496 if (c->req.hdr.rcode & 0x00FE) {
1497 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1498 printk( KERN_WARNING
1499 "cpqarray ida%d: idaSendPciCmd, error: "
1500 "Controller failed at init time "
1501 "cmd: 0x%x, return code = 0x%x\n",
1502 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1504 cmd_free(info_p, c, 1);
1508 cmd_free(info_p, c, 1);
1513 * revalidate_allvol is for online array config utilities. After a
1514 * utility reconfigures the drives in the array, it can use this function
1515 * (through an ioctl) to make the driver zap any previous disk structs for
1516 * that controller and get new ones.
1518 * Right now I'm using the getgeometry() function to do this, but this
1519 * function should probably be finer grained and allow you to revalidate one
1520 * particualar logical volume (instead of all of them on a particular
1523 static int revalidate_allvol(ctlr_info_t *host)
1525 int ctlr = host->ctlr;
1527 unsigned long flags;
1529 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1530 if (host->usage_count > 1) {
1531 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1532 printk(KERN_WARNING "cpqarray: Device busy for volume"
1533 " revalidation (usage=%d)\n", host->usage_count);
1536 host->usage_count++;
1537 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1540 * Set the partition and block size structures for all volumes
1541 * on this controller to zero. We will reread all of this data
1543 set_capacity(ida_gendisk[ctlr][0], 0);
1544 for (i = 1; i < NWD; i++) {
1545 struct gendisk *disk = ida_gendisk[ctlr][i];
1546 if (disk->flags & GENHD_FL_UP)
1549 memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1552 * Tell the array controller not to give us any interrupts while
1553 * we check the new geometry. Then turn interrupts back on when
1556 host->access.set_intr_mask(host, 0);
1558 host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1560 for(i=0; i<NWD; i++) {
1561 struct gendisk *disk = ida_gendisk[ctlr][i];
1562 drv_info_t *drv = &host->drv[i];
1563 if (i && !drv->nr_blks)
1565 blk_queue_hardsect_size(host->queue, drv->blk_size);
1566 set_capacity(disk, drv->nr_blks);
1567 disk->queue = host->queue;
1568 disk->private_data = drv;
1573 host->usage_count--;
1577 static int ida_revalidate(struct gendisk *disk)
1579 drv_info_t *drv = disk->private_data;
1580 set_capacity(disk, drv->nr_blks);
1584 /********************************************************************
1586 Wait polling for a command to complete.
1587 The memory mapped FIFO is polled for the completion.
1588 Used only at init time, interrupts disabled.
1589 ********************************************************************/
1590 static int pollcomplete(int ctlr)
1595 /* Wait (up to 2 seconds) for a command to complete */
1597 for (i = 200000; i > 0; i--) {
1598 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1600 udelay(10); /* a short fixed delay */
1604 /* Invalid address to tell caller we ran out of time */
1607 /*****************************************************************
1609 Starts controller firmwares background processing.
1610 Currently only the Integrated Raid controller needs this done.
1611 If the PCI mem address registers are written to after this,
1612 data corruption may occur
1613 *****************************************************************/
1614 static void start_fwbk(int ctlr)
1616 id_ctlr_t *id_ctlr_buf;
1619 if( (hba[ctlr]->board_id != 0x40400E11)
1620 && (hba[ctlr]->board_id != 0x40480E11) )
1622 /* Not a Integrated Raid, so there is nothing for us to do */
1624 printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1626 /* Command does not return anything, but idasend command needs a
1628 id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1629 if(id_ctlr_buf==NULL)
1631 printk(KERN_WARNING "cpqarray: Out of memory. "
1632 "Unable to start background processing.\n");
1635 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1636 id_ctlr_buf, 0, 0, 0, 0);
1637 if(ret_code != IO_OK)
1638 printk(KERN_WARNING "cpqarray: Unable to start"
1639 " background processing\n");
1643 /*****************************************************************
1645 Get ida logical volume geometry from the controller
1646 This is a large bit of code which once existed in two flavors,
1647 It is used only at init time.
1648 *****************************************************************/
1649 static void getgeometry(int ctlr)
1651 id_log_drv_t *id_ldrive;
1652 id_ctlr_t *id_ctlr_buf;
1653 sense_log_drv_stat_t *id_lstatus_buf;
1654 config_t *sense_config_buf;
1655 unsigned int log_unit, log_index;
1658 ctlr_info_t *info_p = hba[ctlr];
1661 info_p->log_drv_map = 0;
1663 id_ldrive = kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1664 if(id_ldrive == NULL)
1666 printk( KERN_ERR "cpqarray: out of memory.\n");
1670 id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1671 if(id_ctlr_buf == NULL)
1674 printk( KERN_ERR "cpqarray: out of memory.\n");
1678 id_lstatus_buf = kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1679 if(id_lstatus_buf == NULL)
1683 printk( KERN_ERR "cpqarray: out of memory.\n");
1687 sense_config_buf = kmalloc(sizeof(config_t), GFP_KERNEL);
1688 if(sense_config_buf == NULL)
1690 kfree(id_lstatus_buf);
1693 printk( KERN_ERR "cpqarray: out of memory.\n");
1697 memset(id_ldrive, 0, sizeof(id_log_drv_t));
1698 memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1699 memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1700 memset(sense_config_buf, 0, sizeof(config_t));
1702 info_p->phys_drives = 0;
1703 info_p->log_drv_map = 0;
1704 info_p->drv_assign_map = 0;
1705 info_p->drv_spare_map = 0;
1706 info_p->mp_failed_drv_map = 0; /* only initialized here */
1707 /* Get controllers info for this logical drive */
1708 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1709 if (ret_code == IO_ERROR) {
1711 * If can't get controller info, set the logical drive map to 0,
1712 * so the idastubopen will fail on all logical drives
1713 * on the controller.
1715 /* Free all the buffers and return */
1716 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1717 kfree(sense_config_buf);
1718 kfree(id_lstatus_buf);
1724 info_p->log_drives = id_ctlr_buf->nr_drvs;
1726 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1727 info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1729 printk(" (%s)\n", info_p->product_name);
1731 * Initialize logical drive map to zero
1735 * Get drive geometry for all logical drives
1737 if (id_ctlr_buf->nr_drvs > 16)
1738 printk(KERN_WARNING "cpqarray ida%d: This driver supports "
1739 "16 logical drives per controller.\n. "
1740 " Additional drives will not be "
1741 "detected\n", ctlr);
1744 (log_index < id_ctlr_buf->nr_drvs)
1745 && (log_unit < NWD);
1747 size = sizeof(sense_log_drv_stat_t);
1750 Send "Identify logical drive status" cmd
1752 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1753 ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1754 if (ret_code == IO_ERROR) {
1756 If can't get logical drive status, set
1757 the logical drive map to 0, so the
1758 idastubopen will fail for all logical drives
1761 info_p->log_drv_map = 0;
1762 printk( KERN_WARNING
1763 "cpqarray ida%d: idaGetGeometry - Controller"
1764 " failed to report status of logical drive %d\n"
1765 "Access to this controller has been disabled\n",
1767 /* Free all the buffers and return */
1768 kfree(sense_config_buf);
1769 kfree(id_lstatus_buf);
1775 Make sure the logical drive is configured
1777 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1778 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1779 sizeof(id_log_drv_t), 0, 0, log_unit);
1781 If error, the bit for this
1782 logical drive won't be set and
1783 idastubopen will return error.
1785 if (ret_code != IO_ERROR) {
1786 drv = &info_p->drv[log_unit];
1787 drv->blk_size = id_ldrive->blk_size;
1788 drv->nr_blks = id_ldrive->nr_blks;
1789 drv->cylinders = id_ldrive->drv.cyl;
1790 drv->heads = id_ldrive->drv.heads;
1791 drv->sectors = id_ldrive->drv.sect_per_track;
1792 info_p->log_drv_map |= (1 << log_unit);
1794 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1795 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1796 ret_code = sendcmd(SENSE_CONFIG,
1797 ctlr, sense_config_buf,
1798 sizeof(config_t), 0, 0, log_unit);
1799 if (ret_code == IO_ERROR) {
1800 info_p->log_drv_map = 0;
1801 /* Free all the buffers and return */
1802 printk(KERN_ERR "cpqarray: error sending sense config\n");
1803 kfree(sense_config_buf);
1804 kfree(id_lstatus_buf);
1811 info_p->phys_drives =
1812 sense_config_buf->ctlr_phys_drv;
1813 info_p->drv_assign_map
1814 |= sense_config_buf->drv_asgn_map;
1815 info_p->drv_assign_map
1816 |= sense_config_buf->spare_asgn_map;
1817 info_p->drv_spare_map
1818 |= sense_config_buf->spare_asgn_map;
1819 } /* end of if no error on id_ldrive */
1820 log_index = log_index + 1;
1821 } /* end of if logical drive configured */
1822 } /* end of for log_unit */
1823 kfree(sense_config_buf);
1825 kfree(id_lstatus_buf);
1831 static void __exit cpqarray_exit(void)
1835 pci_unregister_driver(&cpqarray_pci_driver);
1837 /* Double check that all controller entries have been removed */
1838 for(i=0; i<MAX_CTLR; i++) {
1839 if (hba[i] != NULL) {
1840 printk(KERN_WARNING "cpqarray: Removing EISA "
1841 "controller %d\n", i);
1842 cpqarray_remove_one_eisa(i);
1846 remove_proc_entry("cpqarray", proc_root_driver);
1849 module_init(cpqarray_init)
1850 module_exit(cpqarray_exit)