2 * SBC8349E Device Tree Source
4 * Copyright 2007 Wind River Inc.
6 * Paul Gortmaker (see MAINTAINERS for contact information)
8 * -based largely on the Freescale MPC834x_MDS dts.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
20 compatible = "SBC834xE";
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <32768>;
42 i-cache-size = <32768>;
43 timebase-frequency = <0>; // from bootloader
44 bus-frequency = <0>; // from bootloader
45 clock-frequency = <0>; // from bootloader
50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; // 256MB at 0
58 ranges = <0x0 0xe0000000 0x00100000>;
59 reg = <0xe0000000 0x00000200>;
63 compatible = "mpc83xx_wdt";
71 compatible = "fsl-i2c";
73 interrupts = <14 0x8>;
74 interrupt-parent = <&ipic>;
82 compatible = "fsl-i2c";
84 interrupts = <15 0x8>;
85 interrupt-parent = <&ipic>;
91 compatible = "fsl,spi";
92 reg = <0x7000 0x1000>;
93 interrupts = <16 0x8>;
94 interrupt-parent = <&ipic>;
101 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
103 ranges = <0 0x8100 0x1a8>;
104 interrupt-parent = <&ipic>;
108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
111 interrupt-parent = <&ipic>;
115 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118 interrupt-parent = <&ipic>;
122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
125 interrupt-parent = <&ipic>;
129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
132 interrupt-parent = <&ipic>;
137 /* phy type (ULPI or SERIAL) are only types supported for MPH */
140 compatible = "fsl-usb2-mph";
141 reg = <0x22000 0x1000>;
142 #address-cells = <1>;
144 interrupt-parent = <&ipic>;
145 interrupts = <39 0x8>;
149 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
152 compatible = "fsl-usb2-dr";
153 reg = <0x23000 0x1000>;
154 #address-cells = <1>;
156 interrupt-parent = <&ipic>;
157 interrupts = <38 0x8>;
162 enet0: ethernet@24000 {
163 #address-cells = <1>;
166 device_type = "network";
168 compatible = "gianfar";
169 reg = <0x24000 0x1000>;
170 ranges = <0x0 0x24000 0x1000>;
171 local-mac-address = [ 00 00 00 00 00 00 ];
172 interrupts = <32 0x8 33 0x8 34 0x8>;
173 interrupt-parent = <&ipic>;
174 tbi-handle = <&tbi0>;
175 phy-handle = <&phy0>;
176 linux,network-index = <0>;
179 #address-cells = <1>;
181 compatible = "fsl,gianfar-mdio";
184 phy0: ethernet-phy@19 {
185 interrupt-parent = <&ipic>;
186 interrupts = <20 0x8>;
188 device_type = "ethernet-phy";
191 phy1: ethernet-phy@1a {
192 interrupt-parent = <&ipic>;
193 interrupts = <21 0x8>;
195 device_type = "ethernet-phy";
200 device_type = "tbi-phy";
205 enet1: ethernet@25000 {
206 #address-cells = <1>;
209 device_type = "network";
211 compatible = "gianfar";
212 reg = <0x25000 0x1000>;
213 ranges = <0x0 0x25000 0x1000>;
214 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <35 0x8 36 0x8 37 0x8>;
216 interrupt-parent = <&ipic>;
217 tbi-handle = <&tbi1>;
218 phy-handle = <&phy1>;
219 linux,network-index = <1>;
222 #address-cells = <1>;
224 compatible = "fsl,gianfar-tbi";
229 device_type = "tbi-phy";
234 serial0: serial@4500 {
236 device_type = "serial";
237 compatible = "ns16550";
238 reg = <0x4500 0x100>;
239 clock-frequency = <0>;
240 interrupts = <9 0x8>;
241 interrupt-parent = <&ipic>;
244 serial1: serial@4600 {
246 device_type = "serial";
247 compatible = "ns16550";
248 reg = <0x4600 0x100>;
249 clock-frequency = <0>;
250 interrupts = <10 0x8>;
251 interrupt-parent = <&ipic>;
255 compatible = "fsl,sec2.0";
256 reg = <0x30000 0x10000>;
257 interrupts = <11 0x8>;
258 interrupt-parent = <&ipic>;
259 fsl,num-channels = <4>;
260 fsl,channel-fifo-len = <24>;
261 fsl,exec-units-mask = <0x7e>;
262 fsl,descriptor-types-mask = <0x01010ebf>;
266 * interrupts cell = <intr #, sense>
267 * sense values match linux IORESOURCE_IRQ_* defines:
268 * sense == 8: Level, low assertion
269 * sense == 2: Edge, high-to-low change
272 interrupt-controller;
273 #address-cells = <0>;
274 #interrupt-cells = <2>;
276 device_type = "ipic";
282 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
286 0x8800 0x0 0x0 0x1 &ipic 20 0x8
287 0x8800 0x0 0x0 0x2 &ipic 21 0x8
288 0x8800 0x0 0x0 0x3 &ipic 22 0x8
289 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
291 interrupt-parent = <&ipic>;
292 interrupts = <0x42 0x8>;
294 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
295 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
296 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
297 clock-frequency = <66666666>;
298 #interrupt-cells = <1>;
300 #address-cells = <3>;
301 reg = <0xe0008500 0x100 /* internal registers */
302 0xe0008300 0x8>; /* config space access registers */
303 compatible = "fsl,mpc8349-pci";