Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[linux-2.6] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2  * MPC8641 HPCN Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8641HPCN";
16         compatible = "fsl,mpc8641hpcn";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 ethernet2 = &enet2;
24                 ethernet3 = &enet3;
25                 serial0 = &serial0;
26                 serial1 = &serial1;
27                 pci0 = &pci0;
28                 pci1 = &pci1;
29                 rapidio0 = &rapidio0;
30         };
31
32         cpus {
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35
36                 PowerPC,8641@0 {
37                         device_type = "cpu";
38                         reg = <0>;
39                         d-cache-line-size = <32>;
40                         i-cache-line-size = <32>;
41                         d-cache-size = <32768>;         // L1
42                         i-cache-size = <32768>;         // L1
43                         timebase-frequency = <0>;       // From uboot
44                         bus-frequency = <0>;            // From uboot
45                         clock-frequency = <0>;          // From uboot
46                 };
47                 PowerPC,8641@1 {
48                         device_type = "cpu";
49                         reg = <1>;
50                         d-cache-line-size = <32>;
51                         i-cache-line-size = <32>;
52                         d-cache-size = <32768>;
53                         i-cache-size = <32768>;
54                         timebase-frequency = <0>;       // From uboot
55                         bus-frequency = <0>;            // From uboot
56                         clock-frequency = <0>;          // From uboot
57                 };
58         };
59
60         memory {
61                 device_type = "memory";
62                 reg = <0x00000000 0x40000000>;  // 1G at 0x0
63         };
64
65         localbus@f8005000 {
66                 #address-cells = <2>;
67                 #size-cells = <1>;
68                 compatible = "fsl,mpc8641-localbus", "simple-bus";
69                 reg = <0xf8005000 0x1000>;
70                 interrupts = <19 2>;
71                 interrupt-parent = <&mpic>;
72
73                 ranges = <0 0 0xff800000 0x00800000
74                           1 0 0xfe000000 0x01000000
75                           2 0 0xf8200000 0x00100000
76                           3 0 0xf8100000 0x00100000>;
77
78                 flash@0,0 {
79                         compatible = "cfi-flash";
80                         reg = <0 0 0x00800000>;
81                         bank-width = <2>;
82                         device-width = <2>;
83                         #address-cells = <1>;
84                         #size-cells = <1>;
85                         partition@0 {
86                                 label = "kernel";
87                                 reg = <0x00000000 0x00300000>;
88                         };
89                         partition@300000 {
90                                 label = "firmware b";
91                                 reg = <0x00300000 0x00100000>;
92                                 read-only;
93                         };
94                         partition@400000 {
95                                 label = "fs";
96                                 reg = <0x00400000 0x00300000>;
97                         };
98                         partition@700000 {
99                                 label = "firmware a";
100                                 reg = <0x00700000 0x00100000>;
101                                 read-only;
102                         };
103                 };
104         };
105
106         soc8641@f8000000 {
107                 #address-cells = <1>;
108                 #size-cells = <1>;
109                 device_type = "soc";
110                 compatible = "simple-bus";
111                 ranges = <0x00000000 0xf8000000 0x00100000>;
112                 reg = <0xf8000000 0x00001000>;  // CCSRBAR
113                 bus-frequency = <0>;
114
115                 i2c@3000 {
116                         #address-cells = <1>;
117                         #size-cells = <0>;
118                         cell-index = <0>;
119                         compatible = "fsl-i2c";
120                         reg = <0x3000 0x100>;
121                         interrupts = <43 2>;
122                         interrupt-parent = <&mpic>;
123                         dfsrr;
124                 };
125
126                 i2c@3100 {
127                         #address-cells = <1>;
128                         #size-cells = <0>;
129                         cell-index = <1>;
130                         compatible = "fsl-i2c";
131                         reg = <0x3100 0x100>;
132                         interrupts = <43 2>;
133                         interrupt-parent = <&mpic>;
134                         dfsrr;
135                 };
136
137                 dma@21300 {
138                         #address-cells = <1>;
139                         #size-cells = <1>;
140                         compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
141                         reg = <0x21300 0x4>;
142                         ranges = <0x0 0x21100 0x200>;
143                         cell-index = <0>;
144                         dma-channel@0 {
145                                 compatible = "fsl,mpc8641-dma-channel",
146                                                 "fsl,eloplus-dma-channel";
147                                 reg = <0x0 0x80>;
148                                 cell-index = <0>;
149                                 interrupt-parent = <&mpic>;
150                                 interrupts = <20 2>;
151                         };
152                         dma-channel@80 {
153                                 compatible = "fsl,mpc8641-dma-channel",
154                                                 "fsl,eloplus-dma-channel";
155                                 reg = <0x80 0x80>;
156                                 cell-index = <1>;
157                                 interrupt-parent = <&mpic>;
158                                 interrupts = <21 2>;
159                         };
160                         dma-channel@100 {
161                                 compatible = "fsl,mpc8641-dma-channel",
162                                                 "fsl,eloplus-dma-channel";
163                                 reg = <0x100 0x80>;
164                                 cell-index = <2>;
165                                 interrupt-parent = <&mpic>;
166                                 interrupts = <22 2>;
167                         };
168                         dma-channel@180 {
169                                 compatible = "fsl,mpc8641-dma-channel",
170                                                 "fsl,eloplus-dma-channel";
171                                 reg = <0x180 0x80>;
172                                 cell-index = <3>;
173                                 interrupt-parent = <&mpic>;
174                                 interrupts = <23 2>;
175                         };
176                 };
177
178                 mdio@24520 {
179                         #address-cells = <1>;
180                         #size-cells = <0>;
181                         compatible = "fsl,gianfar-mdio";
182                         reg = <0x24520 0x20>;
183
184                         phy0: ethernet-phy@0 {
185                                 interrupt-parent = <&mpic>;
186                                 interrupts = <10 1>;
187                                 reg = <0>;
188                                 device_type = "ethernet-phy";
189                         };
190                         phy1: ethernet-phy@1 {
191                                 interrupt-parent = <&mpic>;
192                                 interrupts = <10 1>;
193                                 reg = <1>;
194                                 device_type = "ethernet-phy";
195                         };
196                         phy2: ethernet-phy@2 {
197                                 interrupt-parent = <&mpic>;
198                                 interrupts = <10 1>;
199                                 reg = <2>;
200                                 device_type = "ethernet-phy";
201                         };
202                         phy3: ethernet-phy@3 {
203                                 interrupt-parent = <&mpic>;
204                                 interrupts = <10 1>;
205                                 reg = <3>;
206                                 device_type = "ethernet-phy";
207                         };
208                         tbi0: tbi-phy@11 {
209                                 reg = <0x11>;
210                                 device_type = "tbi-phy";
211                         };
212                 };
213
214                 mdio@25520 {
215                         #address-cells = <1>;
216                         #size-cells = <0>;
217                         compatible = "fsl,gianfar-tbi";
218                         reg = <0x25520 0x20>;
219
220                         tbi1: tbi-phy@11 {
221                                 reg = <0x11>;
222                                 device_type = "tbi-phy";
223                         };
224                 };
225
226                 mdio@26520 {
227                         #address-cells = <1>;
228                         #size-cells = <0>;
229                         compatible = "fsl,gianfar-tbi";
230                         reg = <0x26520 0x20>;
231
232                         tbi2: tbi-phy@11 {
233                                 reg = <0x11>;
234                                 device_type = "tbi-phy";
235                         };
236                 };
237
238                 mdio@27520 {
239                         #address-cells = <1>;
240                         #size-cells = <0>;
241                         compatible = "fsl,gianfar-tbi";
242                         reg = <0x27520 0x20>;
243
244                         tbi3: tbi-phy@11 {
245                                 reg = <0x11>;
246                                 device_type = "tbi-phy";
247                         };
248                 };
249
250
251                 enet0: ethernet@24000 {
252                         cell-index = <0>;
253                         device_type = "network";
254                         model = "TSEC";
255                         compatible = "gianfar";
256                         reg = <0x24000 0x1000>;
257                         local-mac-address = [ 00 00 00 00 00 00 ];
258                         interrupts = <29 2 30  2 34 2>;
259                         interrupt-parent = <&mpic>;
260                         tbi-handle = <&tbi0>;
261                         phy-handle = <&phy0>;
262                         phy-connection-type = "rgmii-id";
263                 };
264
265                 enet1: ethernet@25000 {
266                         cell-index = <1>;
267                         device_type = "network";
268                         model = "TSEC";
269                         compatible = "gianfar";
270                         reg = <0x25000 0x1000>;
271                         local-mac-address = [ 00 00 00 00 00 00 ];
272                         interrupts = <35 2 36 2 40 2>;
273                         interrupt-parent = <&mpic>;
274                         tbi-handle = <&tbi1>;
275                         phy-handle = <&phy1>;
276                         phy-connection-type = "rgmii-id";
277                 };
278                 
279                 enet2: ethernet@26000 {
280                         cell-index = <2>;
281                         device_type = "network";
282                         model = "TSEC";
283                         compatible = "gianfar";
284                         reg = <0x26000 0x1000>;
285                         local-mac-address = [ 00 00 00 00 00 00 ];
286                         interrupts = <31 2 32 2 33 2>;
287                         interrupt-parent = <&mpic>;
288                         tbi-handle = <&tbi2>;
289                         phy-handle = <&phy2>;
290                         phy-connection-type = "rgmii-id";
291                 };
292
293                 enet3: ethernet@27000 {
294                         cell-index = <3>;
295                         device_type = "network";
296                         model = "TSEC";
297                         compatible = "gianfar";
298                         reg = <0x27000 0x1000>;
299                         local-mac-address = [ 00 00 00 00 00 00 ];
300                         interrupts = <37 2 38 2 39 2>;
301                         interrupt-parent = <&mpic>;
302                         tbi-handle = <&tbi3>;
303                         phy-handle = <&phy3>;
304                         phy-connection-type = "rgmii-id";
305                 };
306
307                 serial0: serial@4500 {
308                         cell-index = <0>;
309                         device_type = "serial";
310                         compatible = "ns16550";
311                         reg = <0x4500 0x100>;
312                         clock-frequency = <0>;
313                         interrupts = <42 2>;
314                         interrupt-parent = <&mpic>;
315                 };
316
317                 serial1: serial@4600 {
318                         cell-index = <1>;
319                         device_type = "serial";
320                         compatible = "ns16550";
321                         reg = <0x4600 0x100>;
322                         clock-frequency = <0>;
323                         interrupts = <28 2>;
324                         interrupt-parent = <&mpic>;
325                 };
326
327                 mpic: pic@40000 {
328                         interrupt-controller;
329                         #address-cells = <0>;
330                         #interrupt-cells = <2>;
331                         reg = <0x40000 0x40000>;
332                         compatible = "chrp,open-pic";
333                         device_type = "open-pic";
334                 };
335
336                 global-utilities@e0000 {
337                         compatible = "fsl,mpc8641-guts";
338                         reg = <0xe0000 0x1000>;
339                         fsl,has-rstcr;
340                 };
341         };
342
343         pci0: pcie@f8008000 {
344                 cell-index = <0>;
345                 compatible = "fsl,mpc8641-pcie";
346                 device_type = "pci";
347                 #interrupt-cells = <1>;
348                 #size-cells = <2>;
349                 #address-cells = <3>;
350                 reg = <0xf8008000 0x1000>;
351                 bus-range = <0x0 0xff>;
352                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
353                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
354                 clock-frequency = <33333333>;
355                 interrupt-parent = <&mpic>;
356                 interrupts = <24 2>;
357                 interrupt-map-mask = <0xff00 0 0 7>;
358                 interrupt-map = <
359                         /* IDSEL 0x11 func 0 - PCI slot 1 */
360                         0x8800 0 0 1 &mpic 2 1
361                         0x8800 0 0 2 &mpic 3 1
362                         0x8800 0 0 3 &mpic 4 1
363                         0x8800 0 0 4 &mpic 1 1
364
365                         /* IDSEL 0x11 func 1 - PCI slot 1 */
366                         0x8900 0 0 1 &mpic 2 1
367                         0x8900 0 0 2 &mpic 3 1
368                         0x8900 0 0 3 &mpic 4 1
369                         0x8900 0 0 4 &mpic 1 1
370
371                         /* IDSEL 0x11 func 2 - PCI slot 1 */
372                         0x8a00 0 0 1 &mpic 2 1
373                         0x8a00 0 0 2 &mpic 3 1
374                         0x8a00 0 0 3 &mpic 4 1
375                         0x8a00 0 0 4 &mpic 1 1
376
377                         /* IDSEL 0x11 func 3 - PCI slot 1 */
378                         0x8b00 0 0 1 &mpic 2 1
379                         0x8b00 0 0 2 &mpic 3 1
380                         0x8b00 0 0 3 &mpic 4 1
381                         0x8b00 0 0 4 &mpic 1 1
382
383                         /* IDSEL 0x11 func 4 - PCI slot 1 */
384                         0x8c00 0 0 1 &mpic 2 1
385                         0x8c00 0 0 2 &mpic 3 1
386                         0x8c00 0 0 3 &mpic 4 1
387                         0x8c00 0 0 4 &mpic 1 1
388
389                         /* IDSEL 0x11 func 5 - PCI slot 1 */
390                         0x8d00 0 0 1 &mpic 2 1
391                         0x8d00 0 0 2 &mpic 3 1
392                         0x8d00 0 0 3 &mpic 4 1
393                         0x8d00 0 0 4 &mpic 1 1
394
395                         /* IDSEL 0x11 func 6 - PCI slot 1 */
396                         0x8e00 0 0 1 &mpic 2 1
397                         0x8e00 0 0 2 &mpic 3 1
398                         0x8e00 0 0 3 &mpic 4 1
399                         0x8e00 0 0 4 &mpic 1 1
400
401                         /* IDSEL 0x11 func 7 - PCI slot 1 */
402                         0x8f00 0 0 1 &mpic 2 1
403                         0x8f00 0 0 2 &mpic 3 1
404                         0x8f00 0 0 3 &mpic 4 1
405                         0x8f00 0 0 4 &mpic 1 1
406
407                         /* IDSEL 0x12 func 0 - PCI slot 2 */
408                         0x9000 0 0 1 &mpic 3 1
409                         0x9000 0 0 2 &mpic 4 1
410                         0x9000 0 0 3 &mpic 1 1
411                         0x9000 0 0 4 &mpic 2 1
412
413                         /* IDSEL 0x12 func 1 - PCI slot 2 */
414                         0x9100 0 0 1 &mpic 3 1
415                         0x9100 0 0 2 &mpic 4 1
416                         0x9100 0 0 3 &mpic 1 1
417                         0x9100 0 0 4 &mpic 2 1
418
419                         /* IDSEL 0x12 func 2 - PCI slot 2 */
420                         0x9200 0 0 1 &mpic 3 1
421                         0x9200 0 0 2 &mpic 4 1
422                         0x9200 0 0 3 &mpic 1 1
423                         0x9200 0 0 4 &mpic 2 1
424
425                         /* IDSEL 0x12 func 3 - PCI slot 2 */
426                         0x9300 0 0 1 &mpic 3 1
427                         0x9300 0 0 2 &mpic 4 1
428                         0x9300 0 0 3 &mpic 1 1
429                         0x9300 0 0 4 &mpic 2 1
430
431                         /* IDSEL 0x12 func 4 - PCI slot 2 */
432                         0x9400 0 0 1 &mpic 3 1
433                         0x9400 0 0 2 &mpic 4 1
434                         0x9400 0 0 3 &mpic 1 1
435                         0x9400 0 0 4 &mpic 2 1
436
437                         /* IDSEL 0x12 func 5 - PCI slot 2 */
438                         0x9500 0 0 1 &mpic 3 1
439                         0x9500 0 0 2 &mpic 4 1
440                         0x9500 0 0 3 &mpic 1 1
441                         0x9500 0 0 4 &mpic 2 1
442
443                         /* IDSEL 0x12 func 6 - PCI slot 2 */
444                         0x9600 0 0 1 &mpic 3 1
445                         0x9600 0 0 2 &mpic 4 1
446                         0x9600 0 0 3 &mpic 1 1
447                         0x9600 0 0 4 &mpic 2 1
448
449                         /* IDSEL 0x12 func 7 - PCI slot 2 */
450                         0x9700 0 0 1 &mpic 3 1
451                         0x9700 0 0 2 &mpic 4 1
452                         0x9700 0 0 3 &mpic 1 1
453                         0x9700 0 0 4 &mpic 2 1
454
455                         // IDSEL 0x1c  USB
456                         0xe000 0 0 1 &i8259 12 2
457                         0xe100 0 0 2 &i8259 9 2
458                         0xe200 0 0 3 &i8259 10 2
459                         0xe300 0 0 4 &i8259 11 2
460
461                         // IDSEL 0x1d  Audio
462                         0xe800 0 0 1 &i8259 6 2
463
464                         // IDSEL 0x1e Legacy
465                         0xf000 0 0 1 &i8259 7 2
466                         0xf100 0 0 1 &i8259 7 2
467
468                         // IDSEL 0x1f IDE/SATA
469                         0xf800 0 0 1 &i8259 14 2
470                         0xf900 0 0 1 &i8259 5 2
471                         >;
472
473                 pcie@0 {
474                         reg = <0 0 0 0 0>;
475                         #size-cells = <2>;
476                         #address-cells = <3>;
477                         device_type = "pci";
478                         ranges = <0x02000000 0x0 0x80000000
479                                   0x02000000 0x0 0x80000000
480                                   0x0 0x20000000
481
482                                   0x01000000 0x0 0x00000000
483                                   0x01000000 0x0 0x00000000
484                                   0x0 0x00100000>;
485                         uli1575@0 {
486                                 reg = <0 0 0 0 0>;
487                                 #size-cells = <2>;
488                                 #address-cells = <3>;
489                                 ranges = <0x02000000 0x0 0x80000000
490                                           0x02000000 0x0 0x80000000
491                                           0x0 0x20000000
492                                           0x01000000 0x0 0x00000000
493                                           0x01000000 0x0 0x00000000
494                                           0x0 0x00100000>;
495                                 isa@1e {
496                                         device_type = "isa";
497                                         #interrupt-cells = <2>;
498                                         #size-cells = <1>;
499                                         #address-cells = <2>;
500                                         reg = <0xf000 0 0 0 0>;
501                                         ranges = <1 0 0x01000000 0 0
502                                                   0x00001000>;
503                                         interrupt-parent = <&i8259>;
504
505                                         i8259: interrupt-controller@20 {
506                                                 reg = <1 0x20 2
507                                                        1 0xa0 2
508                                                        1 0x4d0 2>;
509                                                 interrupt-controller;
510                                                 device_type = "interrupt-controller";
511                                                 #address-cells = <0>;
512                                                 #interrupt-cells = <2>;
513                                                 compatible = "chrp,iic";
514                                                 interrupts = <9 2>;
515                                                 interrupt-parent = <&mpic>;
516                                         };
517
518                                         i8042@60 {
519                                                 #size-cells = <0>;
520                                                 #address-cells = <1>;
521                                                 reg = <1 0x60 1 1 0x64 1>;
522                                                 interrupts = <1 3 12 3>;
523                                                 interrupt-parent =
524                                                         <&i8259>;
525
526                                                 keyboard@0 {
527                                                         reg = <0>;
528                                                         compatible = "pnpPNP,303";
529                                                 };
530
531                                                 mouse@1 {
532                                                         reg = <1>;
533                                                         compatible = "pnpPNP,f03";
534                                                 };
535                                         };
536
537                                         rtc@70 {
538                                                 compatible =
539                                                         "pnpPNP,b00";
540                                                 reg = <1 0x70 2>;
541                                         };
542
543                                         gpio@400 {
544                                                 reg = <1 0x400 0x80>;
545                                         };
546                                 };
547                         };
548                 };
549
550         };
551
552         pci1: pcie@f8009000 {
553                 cell-index = <1>;
554                 compatible = "fsl,mpc8641-pcie";
555                 device_type = "pci";
556                 #interrupt-cells = <1>;
557                 #size-cells = <2>;
558                 #address-cells = <3>;
559                 reg = <0xf8009000 0x1000>;
560                 bus-range = <0 0xff>;
561                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
562                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
563                 clock-frequency = <33333333>;
564                 interrupt-parent = <&mpic>;
565                 interrupts = <25 2>;
566                 interrupt-map-mask = <0xf800 0 0 7>;
567                 interrupt-map = <
568                         /* IDSEL 0x0 */
569                         0x0000 0 0 1 &mpic 4 1
570                         0x0000 0 0 2 &mpic 5 1
571                         0x0000 0 0 3 &mpic 6 1
572                         0x0000 0 0 4 &mpic 7 1
573                         >;
574                 pcie@0 {
575                         reg = <0 0 0 0 0>;
576                         #size-cells = <2>;
577                         #address-cells = <3>;
578                         device_type = "pci";
579                         ranges = <0x02000000 0x0 0xa0000000
580                                   0x02000000 0x0 0xa0000000
581                                   0x0 0x20000000
582
583                                   0x01000000 0x0 0x00000000
584                                   0x01000000 0x0 0x00000000
585                                   0x0 0x00100000>;
586                 };
587         };
588         rapidio0: rapidio@f80c0000 {
589                 #address-cells = <2>;
590                 #size-cells = <2>;
591                 compatible = "fsl,rapidio-delta";
592                 reg = <0xf80c0000 0x20000>;
593                 ranges = <0 0 0xc0000000 0 0x20000000>;
594                 interrupt-parent = <&mpic>;
595                 /* err_irq bell_outb_irq bell_inb_irq
596                         msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
597                 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
598         };
599 };