3 * ALSA driver for RME Hammerfall DSP MADI audio interface(s)
5 * Copyright (c) 2003 Winfried Ritsch (IEM)
6 * code based on hdsp.c Paul Davis
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <sound/driver.h>
26 #include <linux/init.h>
27 #include <linux/delay.h>
28 #include <linux/interrupt.h>
29 #include <linux/moduleparam.h>
30 #include <linux/slab.h>
31 #include <linux/pci.h>
34 #include <sound/core.h>
35 #include <sound/control.h>
36 #include <sound/pcm.h>
37 #include <sound/info.h>
38 #include <sound/asoundef.h>
39 #include <sound/rawmidi.h>
40 #include <sound/hwdep.h>
41 #include <sound/initval.h>
43 #include <sound/hdspm.h>
45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
46 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
47 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
49 /* Disable precise pointer at start */
50 static int precise_ptr[SNDRV_CARDS];
52 /* Send all playback to line outs */
53 static int line_outs_monitor[SNDRV_CARDS];
55 /* Enable Analog Outs on Channel 63/64 by default */
56 static int enable_monitor[SNDRV_CARDS];
58 module_param_array(index, int, NULL, 0444);
59 MODULE_PARM_DESC(index, "Index value for RME HDSPM interface.");
61 module_param_array(id, charp, NULL, 0444);
62 MODULE_PARM_DESC(id, "ID string for RME HDSPM interface.");
64 module_param_array(enable, bool, NULL, 0444);
65 MODULE_PARM_DESC(enable, "Enable/disable specific HDSPM soundcards.");
67 module_param_array(precise_ptr, bool, NULL, 0444);
68 MODULE_PARM_DESC(precise_ptr, "Enable or disable precise pointer.");
70 module_param_array(line_outs_monitor, bool, NULL, 0444);
71 MODULE_PARM_DESC(line_outs_monitor,
72 "Send playback streams to analog outs by default.");
74 module_param_array(enable_monitor, bool, NULL, 0444);
75 MODULE_PARM_DESC(enable_monitor,
76 "Enable Analog Out on Channel 63/64 by default.");
79 ("Winfried Ritsch <ritsch_AT_iem.at>, Paul Davis <paul@linuxaudiosystems.com>, "
80 "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
81 MODULE_DESCRIPTION("RME HDSPM");
82 MODULE_LICENSE("GPL");
83 MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
85 /* --- Write registers. ---
86 These are defined as byte-offsets from the iobase value. */
88 #define HDSPM_controlRegister 64
89 #define HDSPM_interruptConfirmation 96
90 #define HDSPM_control2Reg 256 /* not in specs ???????? */
91 #define HDSPM_midiDataOut0 352 /* just believe in old code */
92 #define HDSPM_midiDataOut1 356
94 /* DMA enable for 64 channels, only Bit 0 is relevant */
95 #define HDSPM_outputEnableBase 512 /* 512-767 input DMA */
96 #define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */
98 /* 16 page addresses for each of the 64 channels DMA buffer in and out
99 (each 64k=16*4k) Buffer must be 4k aligned (which is default i386 ????) */
100 #define HDSPM_pageAddressBufferOut 8192
101 #define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64*16*4)
103 #define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */
105 #define HDSPM_MATRIX_MIXER_SIZE 8192 /* = 2*64*64 * 4 Byte => 32kB */
107 /* --- Read registers. ---
108 These are defined as byte-offsets from the iobase value */
109 #define HDSPM_statusRegister 0
110 #define HDSPM_statusRegister2 96
112 #define HDSPM_midiDataIn0 360
113 #define HDSPM_midiDataIn1 364
115 /* status is data bytes in MIDI-FIFO (0-128) */
116 #define HDSPM_midiStatusOut0 384
117 #define HDSPM_midiStatusOut1 388
118 #define HDSPM_midiStatusIn0 392
119 #define HDSPM_midiStatusIn1 396
122 /* the meters are regular i/o-mapped registers, but offset
123 considerably from the rest. the peak registers are reset
124 when read; the least-significant 4 bits are full-scale counters;
125 the actual peak value is in the most-significant 24 bits.
127 #define HDSPM_MADI_peakrmsbase 4096 /* 4096-8191 2x64x32Bit Meters */
129 /* --- Control Register bits --------- */
130 #define HDSPM_Start (1<<0) /* start engine */
132 #define HDSPM_Latency0 (1<<1) /* buffer size = 2^n */
133 #define HDSPM_Latency1 (1<<2) /* where n is defined */
134 #define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */
136 #define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
138 #define HDSPM_AudioInterruptEnable (1<<5) /* what do you think ? */
140 #define HDSPM_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */
141 #define HDSPM_Frequency1 (1<<7) /* 0=32kHz/64kHz */
142 #define HDSPM_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
143 #define HDSPM_QuadSpeed (1<<31) /* quad speed bit, not implemented now */
145 #define HDSPM_TX_64ch (1<<10) /* Output 64channel MODE=1,
148 #define HDSPM_AutoInp (1<<11) /* Auto Input (takeover) == Safe Mode,
151 #define HDSPM_InputSelect0 (1<<14) /* Input select 0= optical, 1=coax */
152 #define HDSPM_InputSelect1 (1<<15) /* should be 0 */
154 #define HDSPM_SyncRef0 (1<<16) /* 0=WOrd, 1=MADI */
155 #define HDSPM_SyncRef1 (1<<17) /* should be 0 */
157 #define HDSPM_clr_tms (1<<19) /* clear track marker, do not use
158 AES additional bits in
159 lower 5 Audiodatabits ??? */
161 #define HDSPM_Midi0InterruptEnable (1<<22)
162 #define HDSPM_Midi1InterruptEnable (1<<23)
164 #define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */
167 /* --- bit helper defines */
168 #define HDSPM_LatencyMask (HDSPM_Latency0|HDSPM_Latency1|HDSPM_Latency2)
169 #define HDSPM_FrequencyMask (HDSPM_Frequency0|HDSPM_Frequency1)
170 #define HDSPM_InputMask (HDSPM_InputSelect0|HDSPM_InputSelect1)
171 #define HDSPM_InputOptical 0
172 #define HDSPM_InputCoaxial (HDSPM_InputSelect0)
173 #define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1)
174 #define HDSPM_SyncRef_Word 0
175 #define HDSPM_SyncRef_MADI (HDSPM_SyncRef0)
177 #define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */
178 #define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */
180 #define HDSPM_Frequency32KHz HDSPM_Frequency0
181 #define HDSPM_Frequency44_1KHz HDSPM_Frequency1
182 #define HDSPM_Frequency48KHz (HDSPM_Frequency1|HDSPM_Frequency0)
183 #define HDSPM_Frequency64KHz (HDSPM_DoubleSpeed|HDSPM_Frequency0)
184 #define HDSPM_Frequency88_2KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1)
185 #define HDSPM_Frequency96KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1|HDSPM_Frequency0)
187 /* --- for internal discrimination */
188 #define HDSPM_CLOCK_SOURCE_AUTOSYNC 0 /* Sample Clock Sources */
189 #define HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ 1
190 #define HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
191 #define HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ 3
192 #define HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ 4
193 #define HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
194 #define HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ 6
195 #define HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ 7
196 #define HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
197 #define HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ 9
199 /* Synccheck Status */
200 #define HDSPM_SYNC_CHECK_NO_LOCK 0
201 #define HDSPM_SYNC_CHECK_LOCK 1
202 #define HDSPM_SYNC_CHECK_SYNC 2
204 /* AutoSync References - used by "autosync_ref" control switch */
205 #define HDSPM_AUTOSYNC_FROM_WORD 0
206 #define HDSPM_AUTOSYNC_FROM_MADI 1
207 #define HDSPM_AUTOSYNC_FROM_NONE 2
209 /* Possible sources of MADI input */
210 #define HDSPM_OPTICAL 0 /* optical */
211 #define HDSPM_COAXIAL 1 /* BNC */
213 #define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask)
214 #define hdspm_decode_latency(x) (((x) & HDSPM_LatencyMask)>>1)
216 #define hdspm_encode_in(x) (((x)&0x3)<<14)
217 #define hdspm_decode_in(x) (((x)>>14)&0x3)
219 /* --- control2 register bits --- */
220 #define HDSPM_TMS (1<<0)
221 #define HDSPM_TCK (1<<1)
222 #define HDSPM_TDI (1<<2)
223 #define HDSPM_JTAG (1<<3)
224 #define HDSPM_PWDN (1<<4)
225 #define HDSPM_PROGRAM (1<<5)
226 #define HDSPM_CONFIG_MODE_0 (1<<6)
227 #define HDSPM_CONFIG_MODE_1 (1<<7)
228 /*#define HDSPM_VERSION_BIT (1<<8) not defined any more*/
229 #define HDSPM_BIGENDIAN_MODE (1<<9)
230 #define HDSPM_RD_MULTIPLE (1<<10)
232 /* --- Status Register bits --- */
233 #define HDSPM_audioIRQPending (1<<0) /* IRQ is high and pending */
234 #define HDSPM_RX_64ch (1<<1) /* Input 64chan. MODE=1, 56chn. MODE=0 */
235 #define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1 (like inp0) */
236 #define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */
238 #define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
239 /* since 64byte accurate last 6 bits
242 #define HDSPM_madiSync (1<<18) /* MADI is in sync */
243 #define HDSPM_DoubleSpeedStatus (1<<19) /* (input) card in double speed */
245 #define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */
246 #define HDSPM_madiFreq1 (1<<23) /* 1=32, 2=44.1 3=48 */
247 #define HDSPM_madiFreq2 (1<<24) /* 4=64, 5=88.2 6=96 */
248 #define HDSPM_madiFreq3 (1<<25) /* 7=128, 8=176.4 9=192 */
250 #define HDSPM_BufferID (1<<26) /* (Double)Buffer ID toggles with Interrupt */
251 #define HDSPM_midi0IRQPending (1<<30) /* MIDI IRQ is pending */
252 #define HDSPM_midi1IRQPending (1<<31) /* and aktiv */
254 /* --- status bit helpers */
255 #define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2|HDSPM_madiFreq3)
256 #define HDSPM_madiFreq32 (HDSPM_madiFreq0)
257 #define HDSPM_madiFreq44_1 (HDSPM_madiFreq1)
258 #define HDSPM_madiFreq48 (HDSPM_madiFreq0|HDSPM_madiFreq1)
259 #define HDSPM_madiFreq64 (HDSPM_madiFreq2)
260 #define HDSPM_madiFreq88_2 (HDSPM_madiFreq0|HDSPM_madiFreq2)
261 #define HDSPM_madiFreq96 (HDSPM_madiFreq1|HDSPM_madiFreq2)
262 #define HDSPM_madiFreq128 (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2)
263 #define HDSPM_madiFreq176_4 (HDSPM_madiFreq3)
264 #define HDSPM_madiFreq192 (HDSPM_madiFreq3|HDSPM_madiFreq0)
266 /* Status2 Register bits */
268 #define HDSPM_version0 (1<<0) /* not realy defined but I guess */
269 #define HDSPM_version1 (1<<1) /* in former cards it was ??? */
270 #define HDSPM_version2 (1<<2)
272 #define HDSPM_wcLock (1<<3) /* Wordclock is detected and locked */
273 #define HDSPM_wcSync (1<<4) /* Wordclock is in sync with systemclock */
275 #define HDSPM_wc_freq0 (1<<5) /* input freq detected via autosync */
276 #define HDSPM_wc_freq1 (1<<6) /* 001=32, 010==44.1, 011=48, */
277 #define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */
278 /* missing Bit for 111=128, 1000=176.4, 1001=192 */
280 #define HDSPM_SelSyncRef0 (1<<8) /* Sync Source in slave mode */
281 #define HDSPM_SelSyncRef1 (1<<9) /* 000=word, 001=MADI, */
282 #define HDSPM_SelSyncRef2 (1<<10) /* 111=no valid signal */
284 #define HDSPM_wc_valid (HDSPM_wcLock|HDSPM_wcSync)
286 #define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2)
287 #define HDSPM_wcFreq32 (HDSPM_wc_freq0)
288 #define HDSPM_wcFreq44_1 (HDSPM_wc_freq1)
289 #define HDSPM_wcFreq48 (HDSPM_wc_freq0|HDSPM_wc_freq1)
290 #define HDSPM_wcFreq64 (HDSPM_wc_freq2)
291 #define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2)
292 #define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2)
295 #define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2)
296 #define HDSPM_SelSyncRef_WORD 0
297 #define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0)
298 #define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2)
301 #define UNITY_GAIN 32768 /* = 65536/2 */
302 #define MINUS_INFINITY_GAIN 0
304 /* Number of channels for different Speed Modes */
305 #define MADI_SS_CHANNELS 64
306 #define MADI_DS_CHANNELS 32
307 #define MADI_QS_CHANNELS 16
309 /* the size of a substream (1 mono data stream) */
310 #define HDSPM_CHANNEL_BUFFER_SAMPLES (16*1024)
311 #define HDSPM_CHANNEL_BUFFER_BYTES (4*HDSPM_CHANNEL_BUFFER_SAMPLES)
313 /* the size of the area we need to allocate for DMA transfers. the
314 size is the same regardless of the number of channels, and
315 also the latency to use.
316 for one direction !!!
318 #define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES)
319 #define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024)
321 typedef struct _hdspm hdspm_t;
322 typedef struct _hdspm_midi hdspm_midi_t;
327 snd_rawmidi_t *rmidi;
328 snd_rawmidi_substream_t *input;
329 snd_rawmidi_substream_t *output;
330 char istimer; /* timer in use */
331 struct timer_list timer;
338 snd_pcm_substream_t *capture_substream; /* only one playback */
339 snd_pcm_substream_t *playback_substream; /* and/or capture stream */
341 char *card_name; /* for procinfo */
342 unsigned short firmware_rev; /* dont know if relevant */
344 int precise_ptr; /* use precise pointers, to be tested */
345 int monitor_outs; /* set up monitoring outs init flag */
347 u32 control_register; /* cached value */
348 u32 control2_register; /* cached value */
350 hdspm_midi_t midi[2];
351 struct tasklet_struct midi_tasklet;
354 unsigned char ss_channels; /* channels of card in single speed */
355 unsigned char ds_channels; /* Double Speed */
356 unsigned char qs_channels; /* Quad Speed */
358 unsigned char *playback_buffer; /* suitably aligned address */
359 unsigned char *capture_buffer; /* suitably aligned address */
361 pid_t capture_pid; /* process id which uses capture */
362 pid_t playback_pid; /* process id which uses capture */
363 int running; /* running status */
365 int last_external_sample_rate; /* samplerate mystic ... */
366 int last_internal_sample_rate;
367 int system_sample_rate;
369 char *channel_map; /* channel map for DS and Quadspeed */
371 int dev; /* Hardware vars... */
374 void __iomem *iobase;
376 int irq_count; /* for debug */
378 snd_card_t *card; /* one card */
379 snd_pcm_t *pcm; /* has one pcm */
380 snd_hwdep_t *hwdep; /* and a hwdep for additional ioctl */
381 struct pci_dev *pci; /* and an pci info */
384 snd_kcontrol_t *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; /* fast alsa mixer */
385 snd_kcontrol_t *input_mixer_ctls[HDSPM_MAX_CHANNELS]; /* but input to much, so not used */
386 hdspm_mixer_t *mixer; /* full mixer accessable over mixer ioctl or hwdep-device */
390 /* These tables map the ALSA channels 1..N to the channels that we
391 need to use in order to find the relevant channel buffer. RME
392 refer to this kind of mapping as between "the ADAT channel and
393 the DMA channel." We index it using the logical audio channel,
394 and the value is the DMA channel (i.e. channel buffer number)
395 where the data for that channel can be read/written from/to.
398 static char channel_map_madi_ss[HDSPM_MAX_CHANNELS] = {
399 0, 1, 2, 3, 4, 5, 6, 7,
400 8, 9, 10, 11, 12, 13, 14, 15,
401 16, 17, 18, 19, 20, 21, 22, 23,
402 24, 25, 26, 27, 28, 29, 30, 31,
403 32, 33, 34, 35, 36, 37, 38, 39,
404 40, 41, 42, 43, 44, 45, 46, 47,
405 48, 49, 50, 51, 52, 53, 54, 55,
406 56, 57, 58, 59, 60, 61, 62, 63
409 static char channel_map_madi_ds[HDSPM_MAX_CHANNELS] = {
410 0, 2, 4, 6, 8, 10, 12, 14,
411 16, 18, 20, 22, 24, 26, 28, 30,
412 32, 34, 36, 38, 40, 42, 44, 46,
413 48, 50, 52, 54, 56, 58, 60, 62,
414 -1, -1, -1, -1, -1, -1, -1, -1,
415 -1, -1, -1, -1, -1, -1, -1, -1,
416 -1, -1, -1, -1, -1, -1, -1, -1,
417 -1, -1, -1, -1, -1, -1, -1, -1
420 static char channel_map_madi_qs[HDSPM_MAX_CHANNELS] = {
421 0, 4, 8, 12, 16, 20, 24, 28,
422 32, 36, 40, 44, 48, 52, 56, 60
423 -1, -1, -1, -1, -1, -1, -1, -1,
424 -1, -1, -1, -1, -1, -1, -1, -1,
425 -1, -1, -1, -1, -1, -1, -1, -1,
426 -1, -1, -1, -1, -1, -1, -1, -1,
427 -1, -1, -1, -1, -1, -1, -1, -1,
428 -1, -1, -1, -1, -1, -1, -1, -1
432 static struct pci_device_id snd_hdspm_ids[] = {
434 .vendor = PCI_VENDOR_ID_XILINX,
435 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI,
436 .subvendor = PCI_ANY_ID,
437 .subdevice = PCI_ANY_ID,
444 MODULE_DEVICE_TABLE(pci, snd_hdspm_ids);
447 static int __devinit snd_hdspm_create_alsa_devices(snd_card_t * card,
449 static int __devinit snd_hdspm_create_pcm(snd_card_t * card,
452 static inline void snd_hdspm_initialize_midi_flush(hdspm_t * hdspm);
453 static int hdspm_update_simple_mixer_controls(hdspm_t * hdspm);
454 static int hdspm_autosync_ref(hdspm_t * hdspm);
455 static int snd_hdspm_set_defaults(hdspm_t * hdspm);
456 static void hdspm_set_sgbuf(hdspm_t * hdspm, struct snd_sg_buf *sgbuf,
457 unsigned int reg, int channels);
459 /* Write/read to/from HDSPM with Adresses in Bytes
460 not words but only 32Bit writes are allowed */
462 static inline void hdspm_write(hdspm_t * hdspm, unsigned int reg,
465 writel(val, hdspm->iobase + reg);
468 static inline unsigned int hdspm_read(hdspm_t * hdspm, unsigned int reg)
470 return readl(hdspm->iobase + reg);
473 /* for each output channel (chan) I have an Input (in) and Playback (pb) Fader
474 mixer is write only on hardware so we have to cache him for read
475 each fader is a u32, but uses only the first 16 bit */
477 static inline int hdspm_read_in_gain(hdspm_t * hdspm, unsigned int chan,
480 if (chan > HDSPM_MIXER_CHANNELS || in > HDSPM_MIXER_CHANNELS)
483 return hdspm->mixer->ch[chan].in[in];
486 static inline int hdspm_read_pb_gain(hdspm_t * hdspm, unsigned int chan,
489 if (chan > HDSPM_MIXER_CHANNELS || pb > HDSPM_MIXER_CHANNELS)
491 return hdspm->mixer->ch[chan].pb[pb];
494 static inline int hdspm_write_in_gain(hdspm_t * hdspm, unsigned int chan,
495 unsigned int in, unsigned short data)
497 if (chan >= HDSPM_MIXER_CHANNELS || in >= HDSPM_MIXER_CHANNELS)
501 HDSPM_MADI_mixerBase +
502 ((in + 128 * chan) * sizeof(u32)),
503 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF));
507 static inline int hdspm_write_pb_gain(hdspm_t * hdspm, unsigned int chan,
508 unsigned int pb, unsigned short data)
510 if (chan >= HDSPM_MIXER_CHANNELS || pb >= HDSPM_MIXER_CHANNELS)
514 HDSPM_MADI_mixerBase +
515 ((64 + pb + 128 * chan) * sizeof(u32)),
516 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF));
521 /* enable DMA for specific channels, now available for DSP-MADI */
522 static inline void snd_hdspm_enable_in(hdspm_t * hdspm, int i, int v)
524 hdspm_write(hdspm, HDSPM_inputEnableBase + (4 * i), v);
527 static inline void snd_hdspm_enable_out(hdspm_t * hdspm, int i, int v)
529 hdspm_write(hdspm, HDSPM_outputEnableBase + (4 * i), v);
532 /* check if same process is writing and reading */
533 static inline int snd_hdspm_use_is_exclusive(hdspm_t * hdspm)
538 spin_lock_irqsave(&hdspm->lock, flags);
539 if ((hdspm->playback_pid != hdspm->capture_pid) &&
540 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) {
543 spin_unlock_irqrestore(&hdspm->lock, flags);
547 /* check for external sample rate */
548 static inline int hdspm_external_sample_rate(hdspm_t * hdspm)
550 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
551 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister);
552 unsigned int rate_bits;
555 /* if wordclock has synced freq and wordclock is valid */
556 if ((status2 & HDSPM_wcLock) != 0 &&
557 (status & HDSPM_SelSyncRef0) == 0) {
559 rate_bits = status2 & HDSPM_wcFreqMask;
565 case HDSPM_wcFreq44_1:
574 case HDSPM_wcFreq88_2:
580 /* Quadspeed Bit missing ???? */
587 /* if rate detected and Syncref is Word than have it, word has priority to MADI */
589 && (status2 & HDSPM_SelSyncRefMask) == HDSPM_SelSyncRef_WORD)
592 /* maby a madi input (which is taken if sel sync is madi) */
593 if (status & HDSPM_madiLock) {
594 rate_bits = status & HDSPM_madiFreqMask;
597 case HDSPM_madiFreq32:
600 case HDSPM_madiFreq44_1:
603 case HDSPM_madiFreq48:
606 case HDSPM_madiFreq64:
609 case HDSPM_madiFreq88_2:
612 case HDSPM_madiFreq96:
615 case HDSPM_madiFreq128:
618 case HDSPM_madiFreq176_4:
621 case HDSPM_madiFreq192:
632 /* Latency function */
633 static inline void hdspm_compute_period_size(hdspm_t * hdspm)
635 hdspm->period_bytes =
636 1 << ((hdspm_decode_latency(hdspm->control_register) + 8));
639 static snd_pcm_uframes_t hdspm_hw_pointer(hdspm_t * hdspm)
643 position = hdspm_read(hdspm, HDSPM_statusRegister);
645 if (!hdspm->precise_ptr) {
646 return (position & HDSPM_BufferID) ? (hdspm->period_bytes /
650 /* hwpointer comes in bytes and is 64Bytes accurate (by docu since PCI Burst)
651 i have experimented that it is at most 64 Byte to much for playing
652 so substraction of 64 byte should be ok for ALSA, but use it only
653 for application where you know what you do since if you come to
654 near with record pointer it can be a disaster */
656 position &= HDSPM_BufferPositionMask;
657 position = ((position - 64) % (2 * hdspm->period_bytes)) / 4;
663 static inline void hdspm_start_audio(hdspm_t * s)
665 s->control_register |= (HDSPM_AudioInterruptEnable | HDSPM_Start);
666 hdspm_write(s, HDSPM_controlRegister, s->control_register);
669 static inline void hdspm_stop_audio(hdspm_t * s)
671 s->control_register &= ~(HDSPM_Start | HDSPM_AudioInterruptEnable);
672 hdspm_write(s, HDSPM_controlRegister, s->control_register);
675 /* should I silence all or only opened ones ? doit all for first even is 4MB*/
676 static inline void hdspm_silence_playback(hdspm_t * hdspm)
679 int n = hdspm->period_bytes;
680 void *buf = hdspm->playback_buffer;
682 snd_assert(buf != NULL, return);
684 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) {
686 buf += HDSPM_CHANNEL_BUFFER_BYTES;
690 static int hdspm_set_interrupt_interval(hdspm_t * s, unsigned int frames)
694 spin_lock_irq(&s->lock);
702 s->control_register &= ~HDSPM_LatencyMask;
703 s->control_register |= hdspm_encode_latency(n);
705 hdspm_write(s, HDSPM_controlRegister, s->control_register);
707 hdspm_compute_period_size(s);
709 spin_unlock_irq(&s->lock);
715 /* dummy set rate lets see what happens */
716 static int hdspm_set_rate(hdspm_t * hdspm, int rate, int called_internally)
718 int reject_if_open = 0;
723 /* ASSUMPTION: hdspm->lock is either set, or there is no need for
724 it (e.g. during module initialization).
727 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
730 if (called_internally) {
732 /* request from ctl or card initialization
733 just make a warning an remember setting
734 for future master mode switching */
737 (KERN_WARNING "HDSPM: Warning: device is not running as a clock master.\n");
741 /* hw_param request while in AutoSync mode */
743 hdspm_external_sample_rate(hdspm);
745 if ((hdspm_autosync_ref(hdspm) ==
746 HDSPM_AUTOSYNC_FROM_NONE)) {
748 snd_printk(KERN_WARNING "HDSPM: Detected no Externel Sync \n");
751 } else if (rate != external_freq) {
754 (KERN_WARNING "HDSPM: Warning: No AutoSync source for requested rate\n");
760 current_rate = hdspm->system_sample_rate;
762 /* Changing between Singe, Double and Quad speed is not
763 allowed if any substreams are open. This is because such a change
764 causes a shift in the location of the DMA buffers and a reduction
765 in the number of available buffers.
767 Note that a similar but essentially insoluble problem exists for
768 externally-driven rate changes. All we can do is to flag rate
769 changes in the read/write routines.
774 if (current_rate > 48000) {
777 rate_bits = HDSPM_Frequency32KHz;
780 if (current_rate > 48000) {
783 rate_bits = HDSPM_Frequency44_1KHz;
786 if (current_rate > 48000) {
789 rate_bits = HDSPM_Frequency48KHz;
792 if (current_rate <= 48000) {
795 rate_bits = HDSPM_Frequency64KHz;
798 if (current_rate <= 48000) {
801 rate_bits = HDSPM_Frequency88_2KHz;
804 if (current_rate <= 48000) {
807 rate_bits = HDSPM_Frequency96KHz;
814 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) {
816 (KERN_ERR "HDSPM: cannot change between single- and double-speed mode (capture PID = %d, playback PID = %d)\n",
817 hdspm->capture_pid, hdspm->playback_pid);
821 hdspm->control_register &= ~HDSPM_FrequencyMask;
822 hdspm->control_register |= rate_bits;
823 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
826 hdspm->channel_map = channel_map_madi_qs;
827 else if (rate > 48000)
828 hdspm->channel_map = channel_map_madi_ds;
830 hdspm->channel_map = channel_map_madi_ss;
832 hdspm->system_sample_rate = rate;
840 /* mainly for init to 0 on load */
841 static void all_in_all_mixer(hdspm_t * hdspm, int sgain)
845 (sgain > UNITY_GAIN) ? UNITY_GAIN : (sgain < 0) ? 0 : sgain;
847 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++)
848 for (j = 0; j < HDSPM_MIXER_CHANNELS; j++) {
849 hdspm_write_in_gain(hdspm, i, j, gain);
850 hdspm_write_pb_gain(hdspm, i, j, gain);
854 /*----------------------------------------------------------------------------
856 ----------------------------------------------------------------------------*/
858 static inline unsigned char snd_hdspm_midi_read_byte (hdspm_t *hdspm, int id)
860 /* the hardware already does the relevant bit-mask with 0xff */
862 return hdspm_read(hdspm, HDSPM_midiDataIn1);
864 return hdspm_read(hdspm, HDSPM_midiDataIn0);
867 static inline void snd_hdspm_midi_write_byte (hdspm_t *hdspm, int id, int val)
869 /* the hardware already does the relevant bit-mask with 0xff */
871 return hdspm_write(hdspm, HDSPM_midiDataOut1, val);
873 return hdspm_write(hdspm, HDSPM_midiDataOut0, val);
876 static inline int snd_hdspm_midi_input_available (hdspm_t *hdspm, int id)
879 return (hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff);
881 return (hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff);
884 static inline int snd_hdspm_midi_output_possible (hdspm_t *hdspm, int id)
889 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xff;
891 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xff;
893 if (fifo_bytes_used < 128)
894 return 128 - fifo_bytes_used;
899 static inline void snd_hdspm_flush_midi_input (hdspm_t *hdspm, int id)
901 while (snd_hdspm_midi_input_available (hdspm, id))
902 snd_hdspm_midi_read_byte (hdspm, id);
905 static int snd_hdspm_midi_output_write (hdspm_midi_t *hmidi)
911 unsigned char buf[128];
913 /* Output is not interrupt driven */
915 spin_lock_irqsave (&hmidi->lock, flags);
917 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
918 if ((n_pending = snd_hdspm_midi_output_possible (hmidi->hdspm, hmidi->id)) > 0) {
919 if (n_pending > (int)sizeof (buf))
920 n_pending = sizeof (buf);
922 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
923 for (i = 0; i < to_write; ++i)
924 snd_hdspm_midi_write_byte (hmidi->hdspm, hmidi->id, buf[i]);
929 spin_unlock_irqrestore (&hmidi->lock, flags);
933 static int snd_hdspm_midi_input_read (hdspm_midi_t *hmidi)
935 unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
940 spin_lock_irqsave (&hmidi->lock, flags);
941 if ((n_pending = snd_hdspm_midi_input_available (hmidi->hdspm, hmidi->id)) > 0) {
943 if (n_pending > (int)sizeof (buf)) {
944 n_pending = sizeof (buf);
946 for (i = 0; i < n_pending; ++i) {
947 buf[i] = snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id);
950 snd_rawmidi_receive (hmidi->input, buf, n_pending);
953 /* flush the MIDI input FIFO */
954 while (n_pending--) {
955 snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id);
961 hmidi->hdspm->control_register |= HDSPM_Midi1InterruptEnable;
963 hmidi->hdspm->control_register |= HDSPM_Midi0InterruptEnable;
965 hdspm_write(hmidi->hdspm, HDSPM_controlRegister, hmidi->hdspm->control_register);
966 spin_unlock_irqrestore (&hmidi->lock, flags);
967 return snd_hdspm_midi_output_write (hmidi);
970 static void snd_hdspm_midi_input_trigger(snd_rawmidi_substream_t * substream, int up)
977 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
978 hdspm = hmidi->hdspm;
979 ie = hmidi->id ? HDSPM_Midi1InterruptEnable : HDSPM_Midi0InterruptEnable;
980 spin_lock_irqsave (&hdspm->lock, flags);
982 if (!(hdspm->control_register & ie)) {
983 snd_hdspm_flush_midi_input (hdspm, hmidi->id);
984 hdspm->control_register |= ie;
987 hdspm->control_register &= ~ie;
990 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
991 spin_unlock_irqrestore (&hdspm->lock, flags);
994 static void snd_hdspm_midi_output_timer(unsigned long data)
996 hdspm_midi_t *hmidi = (hdspm_midi_t *) data;
999 snd_hdspm_midi_output_write(hmidi);
1000 spin_lock_irqsave (&hmidi->lock, flags);
1002 /* this does not bump hmidi->istimer, because the
1003 kernel automatically removed the timer when it
1004 expired, and we are now adding it back, thus
1005 leaving istimer wherever it was set before.
1008 if (hmidi->istimer) {
1009 hmidi->timer.expires = 1 + jiffies;
1010 add_timer(&hmidi->timer);
1013 spin_unlock_irqrestore (&hmidi->lock, flags);
1016 static void snd_hdspm_midi_output_trigger(snd_rawmidi_substream_t * substream, int up)
1018 hdspm_midi_t *hmidi;
1019 unsigned long flags;
1021 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1022 spin_lock_irqsave (&hmidi->lock, flags);
1024 if (!hmidi->istimer) {
1025 init_timer(&hmidi->timer);
1026 hmidi->timer.function = snd_hdspm_midi_output_timer;
1027 hmidi->timer.data = (unsigned long) hmidi;
1028 hmidi->timer.expires = 1 + jiffies;
1029 add_timer(&hmidi->timer);
1033 if (hmidi->istimer && --hmidi->istimer <= 0) {
1034 del_timer (&hmidi->timer);
1037 spin_unlock_irqrestore (&hmidi->lock, flags);
1039 snd_hdspm_midi_output_write(hmidi);
1042 static int snd_hdspm_midi_input_open(snd_rawmidi_substream_t * substream)
1044 hdspm_midi_t *hmidi;
1046 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1047 spin_lock_irq (&hmidi->lock);
1048 snd_hdspm_flush_midi_input (hmidi->hdspm, hmidi->id);
1049 hmidi->input = substream;
1050 spin_unlock_irq (&hmidi->lock);
1055 static int snd_hdspm_midi_output_open(snd_rawmidi_substream_t * substream)
1057 hdspm_midi_t *hmidi;
1059 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1060 spin_lock_irq (&hmidi->lock);
1061 hmidi->output = substream;
1062 spin_unlock_irq (&hmidi->lock);
1067 static int snd_hdspm_midi_input_close(snd_rawmidi_substream_t * substream)
1069 hdspm_midi_t *hmidi;
1071 snd_hdspm_midi_input_trigger (substream, 0);
1073 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1074 spin_lock_irq (&hmidi->lock);
1075 hmidi->input = NULL;
1076 spin_unlock_irq (&hmidi->lock);
1081 static int snd_hdspm_midi_output_close(snd_rawmidi_substream_t * substream)
1083 hdspm_midi_t *hmidi;
1085 snd_hdspm_midi_output_trigger (substream, 0);
1087 hmidi = (hdspm_midi_t *) substream->rmidi->private_data;
1088 spin_lock_irq (&hmidi->lock);
1089 hmidi->output = NULL;
1090 spin_unlock_irq (&hmidi->lock);
1095 static snd_rawmidi_ops_t snd_hdspm_midi_output =
1097 .open = snd_hdspm_midi_output_open,
1098 .close = snd_hdspm_midi_output_close,
1099 .trigger = snd_hdspm_midi_output_trigger,
1102 static snd_rawmidi_ops_t snd_hdspm_midi_input =
1104 .open = snd_hdspm_midi_input_open,
1105 .close = snd_hdspm_midi_input_close,
1106 .trigger = snd_hdspm_midi_input_trigger,
1109 static int __devinit snd_hdspm_create_midi (snd_card_t *card, hdspm_t *hdspm, int id)
1114 hdspm->midi[id].id = id;
1115 hdspm->midi[id].rmidi = NULL;
1116 hdspm->midi[id].input = NULL;
1117 hdspm->midi[id].output = NULL;
1118 hdspm->midi[id].hdspm = hdspm;
1119 hdspm->midi[id].istimer = 0;
1120 hdspm->midi[id].pending = 0;
1121 spin_lock_init (&hdspm->midi[id].lock);
1123 sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1124 if ((err = snd_rawmidi_new (card, buf, id, 1, 1, &hdspm->midi[id].rmidi)) < 0)
1127 sprintf (hdspm->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1);
1128 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
1130 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdspm_midi_output);
1131 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdspm_midi_input);
1133 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1134 SNDRV_RAWMIDI_INFO_INPUT |
1135 SNDRV_RAWMIDI_INFO_DUPLEX;
1141 static void hdspm_midi_tasklet(unsigned long arg)
1143 hdspm_t *hdspm = (hdspm_t *)arg;
1145 if (hdspm->midi[0].pending)
1146 snd_hdspm_midi_input_read (&hdspm->midi[0]);
1147 if (hdspm->midi[1].pending)
1148 snd_hdspm_midi_input_read (&hdspm->midi[1]);
1152 /*-----------------------------------------------------------------------------
1154 ----------------------------------------------------------------------------*/
1156 /* get the system sample rate which is set */
1158 #define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \
1159 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1162 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1163 .info = snd_hdspm_info_system_sample_rate, \
1164 .get = snd_hdspm_get_system_sample_rate \
1167 static int snd_hdspm_info_system_sample_rate(snd_kcontrol_t * kcontrol,
1168 snd_ctl_elem_info_t * uinfo)
1170 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1175 static int snd_hdspm_get_system_sample_rate(snd_kcontrol_t * kcontrol,
1176 snd_ctl_elem_value_t *
1179 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1181 ucontrol->value.enumerated.item[0] = hdspm->system_sample_rate;
1185 #define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1186 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1189 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1190 .info = snd_hdspm_info_autosync_sample_rate, \
1191 .get = snd_hdspm_get_autosync_sample_rate \
1194 static int snd_hdspm_info_autosync_sample_rate(snd_kcontrol_t * kcontrol,
1195 snd_ctl_elem_info_t * uinfo)
1197 static char *texts[] = { "32000", "44100", "48000",
1198 "64000", "88200", "96000",
1199 "128000", "176400", "192000",
1202 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1204 uinfo->value.enumerated.items = 10;
1205 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1206 uinfo->value.enumerated.item =
1207 uinfo->value.enumerated.items - 1;
1208 strcpy(uinfo->value.enumerated.name,
1209 texts[uinfo->value.enumerated.item]);
1213 static int snd_hdspm_get_autosync_sample_rate(snd_kcontrol_t * kcontrol,
1214 snd_ctl_elem_value_t *
1217 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1219 switch (hdspm_external_sample_rate(hdspm)) {
1221 ucontrol->value.enumerated.item[0] = 0;
1224 ucontrol->value.enumerated.item[0] = 1;
1227 ucontrol->value.enumerated.item[0] = 2;
1230 ucontrol->value.enumerated.item[0] = 3;
1233 ucontrol->value.enumerated.item[0] = 4;
1236 ucontrol->value.enumerated.item[0] = 5;
1239 ucontrol->value.enumerated.item[0] = 6;
1242 ucontrol->value.enumerated.item[0] = 7;
1245 ucontrol->value.enumerated.item[0] = 8;
1249 ucontrol->value.enumerated.item[0] = 9;
1254 #define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \
1255 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1258 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1259 .info = snd_hdspm_info_system_clock_mode, \
1260 .get = snd_hdspm_get_system_clock_mode, \
1265 static int hdspm_system_clock_mode(hdspm_t * hdspm)
1267 /* Always reflect the hardware info, rme is never wrong !!!! */
1269 if (hdspm->control_register & HDSPM_ClockModeMaster)
1274 static int snd_hdspm_info_system_clock_mode(snd_kcontrol_t * kcontrol,
1275 snd_ctl_elem_info_t * uinfo)
1277 static char *texts[] = { "Master", "Slave" };
1279 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1281 uinfo->value.enumerated.items = 2;
1282 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1283 uinfo->value.enumerated.item =
1284 uinfo->value.enumerated.items - 1;
1285 strcpy(uinfo->value.enumerated.name,
1286 texts[uinfo->value.enumerated.item]);
1290 static int snd_hdspm_get_system_clock_mode(snd_kcontrol_t * kcontrol,
1291 snd_ctl_elem_value_t * ucontrol)
1293 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1295 ucontrol->value.enumerated.item[0] =
1296 hdspm_system_clock_mode(hdspm);
1300 #define HDSPM_CLOCK_SOURCE(xname, xindex) \
1301 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1304 .info = snd_hdspm_info_clock_source, \
1305 .get = snd_hdspm_get_clock_source, \
1306 .put = snd_hdspm_put_clock_source \
1309 static int hdspm_clock_source(hdspm_t * hdspm)
1311 if (hdspm->control_register & HDSPM_ClockModeMaster) {
1312 switch (hdspm->system_sample_rate) {
1339 static int hdspm_set_clock_source(hdspm_t * hdspm, int mode)
1344 case HDSPM_CLOCK_SOURCE_AUTOSYNC:
1345 if (hdspm_external_sample_rate(hdspm) != 0) {
1346 hdspm->control_register &= ~HDSPM_ClockModeMaster;
1347 hdspm_write(hdspm, HDSPM_controlRegister,
1348 hdspm->control_register);
1352 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ:
1355 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ:
1358 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ:
1361 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
1364 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
1367 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
1370 case HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ:
1373 case HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ:
1376 case HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ:
1383 hdspm->control_register |= HDSPM_ClockModeMaster;
1384 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1385 hdspm_set_rate(hdspm, rate, 1);
1389 static int snd_hdspm_info_clock_source(snd_kcontrol_t * kcontrol,
1390 snd_ctl_elem_info_t * uinfo)
1392 static char *texts[] = { "AutoSync",
1393 "Internal 32.0 kHz", "Internal 44.1 kHz",
1394 "Internal 48.0 kHz",
1395 "Internal 64.0 kHz", "Internal 88.2 kHz",
1396 "Internal 96.0 kHz",
1397 "Internal 128.0 kHz", "Internal 176.4 kHz",
1398 "Internal 192.0 kHz"
1401 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1403 uinfo->value.enumerated.items = 10;
1405 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1406 uinfo->value.enumerated.item =
1407 uinfo->value.enumerated.items - 1;
1409 strcpy(uinfo->value.enumerated.name,
1410 texts[uinfo->value.enumerated.item]);
1415 static int snd_hdspm_get_clock_source(snd_kcontrol_t * kcontrol,
1416 snd_ctl_elem_value_t * ucontrol)
1418 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1420 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm);
1424 static int snd_hdspm_put_clock_source(snd_kcontrol_t * kcontrol,
1425 snd_ctl_elem_value_t * ucontrol)
1427 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1431 if (!snd_hdspm_use_is_exclusive(hdspm))
1433 val = ucontrol->value.enumerated.item[0];
1438 spin_lock_irq(&hdspm->lock);
1439 if (val != hdspm_clock_source(hdspm))
1440 change = (hdspm_set_clock_source(hdspm, val) == 0) ? 1 : 0;
1443 spin_unlock_irq(&hdspm->lock);
1447 #define HDSPM_PREF_SYNC_REF(xname, xindex) \
1448 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1451 .info = snd_hdspm_info_pref_sync_ref, \
1452 .get = snd_hdspm_get_pref_sync_ref, \
1453 .put = snd_hdspm_put_pref_sync_ref \
1456 static int hdspm_pref_sync_ref(hdspm_t * hdspm)
1458 /* Notice that this looks at the requested sync source,
1459 not the one actually in use.
1461 switch (hdspm->control_register & HDSPM_SyncRefMask) {
1462 case HDSPM_SyncRef_Word:
1463 return HDSPM_SYNC_FROM_WORD;
1464 case HDSPM_SyncRef_MADI:
1465 return HDSPM_SYNC_FROM_MADI;
1468 return HDSPM_SYNC_FROM_WORD;
1471 static int hdspm_set_pref_sync_ref(hdspm_t * hdspm, int pref)
1473 hdspm->control_register &= ~HDSPM_SyncRefMask;
1476 case HDSPM_SYNC_FROM_MADI:
1477 hdspm->control_register |= HDSPM_SyncRef_MADI;
1479 case HDSPM_SYNC_FROM_WORD:
1480 hdspm->control_register |= HDSPM_SyncRef_Word;
1485 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1489 static int snd_hdspm_info_pref_sync_ref(snd_kcontrol_t * kcontrol,
1490 snd_ctl_elem_info_t * uinfo)
1492 static char *texts[] = { "Word", "MADI" };
1494 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1497 uinfo->value.enumerated.items = 2;
1499 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1500 uinfo->value.enumerated.item =
1501 uinfo->value.enumerated.items - 1;
1502 strcpy(uinfo->value.enumerated.name,
1503 texts[uinfo->value.enumerated.item]);
1507 static int snd_hdspm_get_pref_sync_ref(snd_kcontrol_t * kcontrol,
1508 snd_ctl_elem_value_t * ucontrol)
1510 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1512 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm);
1516 static int snd_hdspm_put_pref_sync_ref(snd_kcontrol_t * kcontrol,
1517 snd_ctl_elem_value_t * ucontrol)
1519 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1525 if (!snd_hdspm_use_is_exclusive(hdspm))
1528 val = ucontrol->value.enumerated.item[0] % max;
1530 spin_lock_irq(&hdspm->lock);
1531 change = (int) val != hdspm_pref_sync_ref(hdspm);
1532 hdspm_set_pref_sync_ref(hdspm, val);
1533 spin_unlock_irq(&hdspm->lock);
1537 #define HDSPM_AUTOSYNC_REF(xname, xindex) \
1538 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1541 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1542 .info = snd_hdspm_info_autosync_ref, \
1543 .get = snd_hdspm_get_autosync_ref, \
1546 static int hdspm_autosync_ref(hdspm_t * hdspm)
1548 /* This looks at the autosync selected sync reference */
1549 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1551 switch (status2 & HDSPM_SelSyncRefMask) {
1553 case HDSPM_SelSyncRef_WORD:
1554 return HDSPM_AUTOSYNC_FROM_WORD;
1556 case HDSPM_SelSyncRef_MADI:
1557 return HDSPM_AUTOSYNC_FROM_MADI;
1559 case HDSPM_SelSyncRef_NVALID:
1560 return HDSPM_AUTOSYNC_FROM_NONE;
1569 static int snd_hdspm_info_autosync_ref(snd_kcontrol_t * kcontrol,
1570 snd_ctl_elem_info_t * uinfo)
1572 static char *texts[] = { "WordClock", "MADI", "None" };
1574 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1576 uinfo->value.enumerated.items = 3;
1577 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1578 uinfo->value.enumerated.item =
1579 uinfo->value.enumerated.items - 1;
1580 strcpy(uinfo->value.enumerated.name,
1581 texts[uinfo->value.enumerated.item]);
1585 static int snd_hdspm_get_autosync_ref(snd_kcontrol_t * kcontrol,
1586 snd_ctl_elem_value_t * ucontrol)
1588 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1590 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm);
1594 #define HDSPM_LINE_OUT(xname, xindex) \
1595 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1598 .info = snd_hdspm_info_line_out, \
1599 .get = snd_hdspm_get_line_out, \
1600 .put = snd_hdspm_put_line_out \
1603 static int hdspm_line_out(hdspm_t * hdspm)
1605 return (hdspm->control_register & HDSPM_LineOut) ? 1 : 0;
1609 static int hdspm_set_line_output(hdspm_t * hdspm, int out)
1612 hdspm->control_register |= HDSPM_LineOut;
1614 hdspm->control_register &= ~HDSPM_LineOut;
1615 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1620 static int snd_hdspm_info_line_out(snd_kcontrol_t * kcontrol,
1621 snd_ctl_elem_info_t * uinfo)
1623 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1625 uinfo->value.integer.min = 0;
1626 uinfo->value.integer.max = 1;
1630 static int snd_hdspm_get_line_out(snd_kcontrol_t * kcontrol,
1631 snd_ctl_elem_value_t * ucontrol)
1633 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1635 spin_lock_irq(&hdspm->lock);
1636 ucontrol->value.integer.value[0] = hdspm_line_out(hdspm);
1637 spin_unlock_irq(&hdspm->lock);
1641 static int snd_hdspm_put_line_out(snd_kcontrol_t * kcontrol,
1642 snd_ctl_elem_value_t * ucontrol)
1644 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1648 if (!snd_hdspm_use_is_exclusive(hdspm))
1650 val = ucontrol->value.integer.value[0] & 1;
1651 spin_lock_irq(&hdspm->lock);
1652 change = (int) val != hdspm_line_out(hdspm);
1653 hdspm_set_line_output(hdspm, val);
1654 spin_unlock_irq(&hdspm->lock);
1658 #define HDSPM_TX_64(xname, xindex) \
1659 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1662 .info = snd_hdspm_info_tx_64, \
1663 .get = snd_hdspm_get_tx_64, \
1664 .put = snd_hdspm_put_tx_64 \
1667 static int hdspm_tx_64(hdspm_t * hdspm)
1669 return (hdspm->control_register & HDSPM_TX_64ch) ? 1 : 0;
1672 static int hdspm_set_tx_64(hdspm_t * hdspm, int out)
1675 hdspm->control_register |= HDSPM_TX_64ch;
1677 hdspm->control_register &= ~HDSPM_TX_64ch;
1678 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1683 static int snd_hdspm_info_tx_64(snd_kcontrol_t * kcontrol,
1684 snd_ctl_elem_info_t * uinfo)
1686 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1688 uinfo->value.integer.min = 0;
1689 uinfo->value.integer.max = 1;
1693 static int snd_hdspm_get_tx_64(snd_kcontrol_t * kcontrol,
1694 snd_ctl_elem_value_t * ucontrol)
1696 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1698 spin_lock_irq(&hdspm->lock);
1699 ucontrol->value.integer.value[0] = hdspm_tx_64(hdspm);
1700 spin_unlock_irq(&hdspm->lock);
1704 static int snd_hdspm_put_tx_64(snd_kcontrol_t * kcontrol,
1705 snd_ctl_elem_value_t * ucontrol)
1707 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1711 if (!snd_hdspm_use_is_exclusive(hdspm))
1713 val = ucontrol->value.integer.value[0] & 1;
1714 spin_lock_irq(&hdspm->lock);
1715 change = (int) val != hdspm_tx_64(hdspm);
1716 hdspm_set_tx_64(hdspm, val);
1717 spin_unlock_irq(&hdspm->lock);
1721 #define HDSPM_C_TMS(xname, xindex) \
1722 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1725 .info = snd_hdspm_info_c_tms, \
1726 .get = snd_hdspm_get_c_tms, \
1727 .put = snd_hdspm_put_c_tms \
1730 static int hdspm_c_tms(hdspm_t * hdspm)
1732 return (hdspm->control_register & HDSPM_clr_tms) ? 1 : 0;
1735 static int hdspm_set_c_tms(hdspm_t * hdspm, int out)
1738 hdspm->control_register |= HDSPM_clr_tms;
1740 hdspm->control_register &= ~HDSPM_clr_tms;
1741 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1746 static int snd_hdspm_info_c_tms(snd_kcontrol_t * kcontrol,
1747 snd_ctl_elem_info_t * uinfo)
1749 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1751 uinfo->value.integer.min = 0;
1752 uinfo->value.integer.max = 1;
1756 static int snd_hdspm_get_c_tms(snd_kcontrol_t * kcontrol,
1757 snd_ctl_elem_value_t * ucontrol)
1759 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1761 spin_lock_irq(&hdspm->lock);
1762 ucontrol->value.integer.value[0] = hdspm_c_tms(hdspm);
1763 spin_unlock_irq(&hdspm->lock);
1767 static int snd_hdspm_put_c_tms(snd_kcontrol_t * kcontrol,
1768 snd_ctl_elem_value_t * ucontrol)
1770 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1774 if (!snd_hdspm_use_is_exclusive(hdspm))
1776 val = ucontrol->value.integer.value[0] & 1;
1777 spin_lock_irq(&hdspm->lock);
1778 change = (int) val != hdspm_c_tms(hdspm);
1779 hdspm_set_c_tms(hdspm, val);
1780 spin_unlock_irq(&hdspm->lock);
1784 #define HDSPM_SAFE_MODE(xname, xindex) \
1785 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1788 .info = snd_hdspm_info_safe_mode, \
1789 .get = snd_hdspm_get_safe_mode, \
1790 .put = snd_hdspm_put_safe_mode \
1793 static int hdspm_safe_mode(hdspm_t * hdspm)
1795 return (hdspm->control_register & HDSPM_AutoInp) ? 1 : 0;
1798 static int hdspm_set_safe_mode(hdspm_t * hdspm, int out)
1801 hdspm->control_register |= HDSPM_AutoInp;
1803 hdspm->control_register &= ~HDSPM_AutoInp;
1804 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1809 static int snd_hdspm_info_safe_mode(snd_kcontrol_t * kcontrol,
1810 snd_ctl_elem_info_t * uinfo)
1812 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1814 uinfo->value.integer.min = 0;
1815 uinfo->value.integer.max = 1;
1819 static int snd_hdspm_get_safe_mode(snd_kcontrol_t * kcontrol,
1820 snd_ctl_elem_value_t * ucontrol)
1822 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1824 spin_lock_irq(&hdspm->lock);
1825 ucontrol->value.integer.value[0] = hdspm_safe_mode(hdspm);
1826 spin_unlock_irq(&hdspm->lock);
1830 static int snd_hdspm_put_safe_mode(snd_kcontrol_t * kcontrol,
1831 snd_ctl_elem_value_t * ucontrol)
1833 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1837 if (!snd_hdspm_use_is_exclusive(hdspm))
1839 val = ucontrol->value.integer.value[0] & 1;
1840 spin_lock_irq(&hdspm->lock);
1841 change = (int) val != hdspm_safe_mode(hdspm);
1842 hdspm_set_safe_mode(hdspm, val);
1843 spin_unlock_irq(&hdspm->lock);
1847 #define HDSPM_INPUT_SELECT(xname, xindex) \
1848 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1851 .info = snd_hdspm_info_input_select, \
1852 .get = snd_hdspm_get_input_select, \
1853 .put = snd_hdspm_put_input_select \
1856 static int hdspm_input_select(hdspm_t * hdspm)
1858 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0;
1861 static int hdspm_set_input_select(hdspm_t * hdspm, int out)
1864 hdspm->control_register |= HDSPM_InputSelect0;
1866 hdspm->control_register &= ~HDSPM_InputSelect0;
1867 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1872 static int snd_hdspm_info_input_select(snd_kcontrol_t * kcontrol,
1873 snd_ctl_elem_info_t * uinfo)
1875 static char *texts[] = { "optical", "coaxial" };
1877 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1879 uinfo->value.enumerated.items = 2;
1881 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1882 uinfo->value.enumerated.item =
1883 uinfo->value.enumerated.items - 1;
1884 strcpy(uinfo->value.enumerated.name,
1885 texts[uinfo->value.enumerated.item]);
1890 static int snd_hdspm_get_input_select(snd_kcontrol_t * kcontrol,
1891 snd_ctl_elem_value_t * ucontrol)
1893 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1895 spin_lock_irq(&hdspm->lock);
1896 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm);
1897 spin_unlock_irq(&hdspm->lock);
1901 static int snd_hdspm_put_input_select(snd_kcontrol_t * kcontrol,
1902 snd_ctl_elem_value_t * ucontrol)
1904 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1908 if (!snd_hdspm_use_is_exclusive(hdspm))
1910 val = ucontrol->value.integer.value[0] & 1;
1911 spin_lock_irq(&hdspm->lock);
1912 change = (int) val != hdspm_input_select(hdspm);
1913 hdspm_set_input_select(hdspm, val);
1914 spin_unlock_irq(&hdspm->lock);
1919 deprecated since to much faders ???
1920 MIXER interface says output (source, destination, value)
1921 where source > MAX_channels are playback channels
1923 - playback mixer matrix: [channelout+64] [output] [value]
1924 - input(thru) mixer matrix: [channelin] [output] [value]
1925 (better do 2 kontrols for seperation ?)
1928 #define HDSPM_MIXER(xname, xindex) \
1929 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
1933 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
1934 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1935 .info = snd_hdspm_info_mixer, \
1936 .get = snd_hdspm_get_mixer, \
1937 .put = snd_hdspm_put_mixer \
1940 static int snd_hdspm_info_mixer(snd_kcontrol_t * kcontrol,
1941 snd_ctl_elem_info_t * uinfo)
1943 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1945 uinfo->value.integer.min = 0;
1946 uinfo->value.integer.max = 65535;
1947 uinfo->value.integer.step = 1;
1951 static int snd_hdspm_get_mixer(snd_kcontrol_t * kcontrol,
1952 snd_ctl_elem_value_t * ucontrol)
1954 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1958 source = ucontrol->value.integer.value[0];
1961 else if (source >= 2 * HDSPM_MAX_CHANNELS)
1962 source = 2 * HDSPM_MAX_CHANNELS - 1;
1964 destination = ucontrol->value.integer.value[1];
1965 if (destination < 0)
1967 else if (destination >= HDSPM_MAX_CHANNELS)
1968 destination = HDSPM_MAX_CHANNELS - 1;
1970 spin_lock_irq(&hdspm->lock);
1971 if (source >= HDSPM_MAX_CHANNELS)
1972 ucontrol->value.integer.value[2] =
1973 hdspm_read_pb_gain(hdspm, destination,
1974 source - HDSPM_MAX_CHANNELS);
1976 ucontrol->value.integer.value[2] =
1977 hdspm_read_in_gain(hdspm, destination, source);
1979 spin_unlock_irq(&hdspm->lock);
1984 static int snd_hdspm_put_mixer(snd_kcontrol_t * kcontrol,
1985 snd_ctl_elem_value_t * ucontrol)
1987 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
1993 if (!snd_hdspm_use_is_exclusive(hdspm))
1996 source = ucontrol->value.integer.value[0];
1997 destination = ucontrol->value.integer.value[1];
1999 if (source < 0 || source >= 2 * HDSPM_MAX_CHANNELS)
2001 if (destination < 0 || destination >= HDSPM_MAX_CHANNELS)
2004 gain = ucontrol->value.integer.value[2];
2006 spin_lock_irq(&hdspm->lock);
2008 if (source >= HDSPM_MAX_CHANNELS)
2009 change = gain != hdspm_read_pb_gain(hdspm, destination,
2011 HDSPM_MAX_CHANNELS);
2014 gain != hdspm_read_in_gain(hdspm, destination, source);
2017 if (source >= HDSPM_MAX_CHANNELS)
2018 hdspm_write_pb_gain(hdspm, destination,
2019 source - HDSPM_MAX_CHANNELS,
2022 hdspm_write_in_gain(hdspm, destination, source,
2025 spin_unlock_irq(&hdspm->lock);
2030 /* The simple mixer control(s) provide gain control for the
2031 basic 1:1 mappings of playback streams to output
2035 #define HDSPM_PLAYBACK_MIXER \
2036 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2037 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE | \
2038 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2039 .info = snd_hdspm_info_playback_mixer, \
2040 .get = snd_hdspm_get_playback_mixer, \
2041 .put = snd_hdspm_put_playback_mixer \
2044 static int snd_hdspm_info_playback_mixer(snd_kcontrol_t * kcontrol,
2045 snd_ctl_elem_info_t * uinfo)
2047 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2049 uinfo->value.integer.min = 0;
2050 uinfo->value.integer.max = 65536;
2051 uinfo->value.integer.step = 1;
2055 static int snd_hdspm_get_playback_mixer(snd_kcontrol_t * kcontrol,
2056 snd_ctl_elem_value_t * ucontrol)
2058 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2062 channel = ucontrol->id.index - 1;
2064 snd_assert(channel >= 0
2065 || channel < HDSPM_MAX_CHANNELS, return -EINVAL);
2067 if ((mapped_channel = hdspm->channel_map[channel]) < 0)
2070 spin_lock_irq(&hdspm->lock);
2071 ucontrol->value.integer.value[0] =
2072 hdspm_read_pb_gain(hdspm, mapped_channel, mapped_channel);
2073 spin_unlock_irq(&hdspm->lock);
2075 /* snd_printdd("get pb mixer index %d, channel %d, mapped_channel %d, value %d\n",
2076 ucontrol->id.index, channel, mapped_channel, ucontrol->value.integer.value[0]);
2082 static int snd_hdspm_put_playback_mixer(snd_kcontrol_t * kcontrol,
2083 snd_ctl_elem_value_t * ucontrol)
2085 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2091 if (!snd_hdspm_use_is_exclusive(hdspm))
2094 channel = ucontrol->id.index - 1;
2096 snd_assert(channel >= 0
2097 || channel < HDSPM_MAX_CHANNELS, return -EINVAL);
2099 if ((mapped_channel = hdspm->channel_map[channel]) < 0)
2102 gain = ucontrol->value.integer.value[0];
2104 spin_lock_irq(&hdspm->lock);
2106 gain != hdspm_read_pb_gain(hdspm, mapped_channel,
2109 hdspm_write_pb_gain(hdspm, mapped_channel, mapped_channel,
2111 spin_unlock_irq(&hdspm->lock);
2115 #define HDSPM_WC_SYNC_CHECK(xname, xindex) \
2116 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2119 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2120 .info = snd_hdspm_info_sync_check, \
2121 .get = snd_hdspm_get_wc_sync_check \
2124 static int snd_hdspm_info_sync_check(snd_kcontrol_t * kcontrol,
2125 snd_ctl_elem_info_t * uinfo)
2127 static char *texts[] = { "No Lock", "Lock", "Sync" };
2128 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2130 uinfo->value.enumerated.items = 3;
2131 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2132 uinfo->value.enumerated.item =
2133 uinfo->value.enumerated.items - 1;
2134 strcpy(uinfo->value.enumerated.name,
2135 texts[uinfo->value.enumerated.item]);
2139 static int hdspm_wc_sync_check(hdspm_t * hdspm)
2141 int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
2142 if (status2 & HDSPM_wcLock) {
2143 if (status2 & HDSPM_wcSync)
2151 static int snd_hdspm_get_wc_sync_check(snd_kcontrol_t * kcontrol,
2152 snd_ctl_elem_value_t * ucontrol)
2154 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2156 ucontrol->value.enumerated.item[0] = hdspm_wc_sync_check(hdspm);
2161 #define HDSPM_MADI_SYNC_CHECK(xname, xindex) \
2162 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2165 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2166 .info = snd_hdspm_info_sync_check, \
2167 .get = snd_hdspm_get_madisync_sync_check \
2170 static int hdspm_madisync_sync_check(hdspm_t * hdspm)
2172 int status = hdspm_read(hdspm, HDSPM_statusRegister);
2173 if (status & HDSPM_madiLock) {
2174 if (status & HDSPM_madiSync)
2182 static int snd_hdspm_get_madisync_sync_check(snd_kcontrol_t * kcontrol,
2183 snd_ctl_elem_value_t *
2186 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol);
2188 ucontrol->value.enumerated.item[0] =
2189 hdspm_madisync_sync_check(hdspm);
2196 static snd_kcontrol_new_t snd_hdspm_controls[] = {
2198 HDSPM_MIXER("Mixer", 0),
2199 /* 'Sample Clock Source' complies with the alsa control naming scheme */
2200 HDSPM_CLOCK_SOURCE("Sample Clock Source", 0),
2202 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
2203 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
2204 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
2205 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
2206 /* 'External Rate' complies with the alsa control naming scheme */
2207 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
2208 HDSPM_WC_SYNC_CHECK("Word Clock Lock Status", 0),
2209 HDSPM_MADI_SYNC_CHECK("MADI Sync Lock Status", 0),
2210 HDSPM_LINE_OUT("Line Out", 0),
2211 HDSPM_TX_64("TX 64 channels mode", 0),
2212 HDSPM_C_TMS("Clear Track Marker", 0),
2213 HDSPM_SAFE_MODE("Safe Mode", 0),
2214 HDSPM_INPUT_SELECT("Input Select", 0),
2217 static snd_kcontrol_new_t snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER;
2220 static int hdspm_update_simple_mixer_controls(hdspm_t * hdspm)
2224 for (i = hdspm->ds_channels; i < hdspm->ss_channels; ++i) {
2225 if (hdspm->system_sample_rate > 48000) {
2226 hdspm->playback_mixer_ctls[i]->vd[0].access =
2227 SNDRV_CTL_ELEM_ACCESS_INACTIVE |
2228 SNDRV_CTL_ELEM_ACCESS_READ |
2229 SNDRV_CTL_ELEM_ACCESS_VOLATILE;
2231 hdspm->playback_mixer_ctls[i]->vd[0].access =
2232 SNDRV_CTL_ELEM_ACCESS_READWRITE |
2233 SNDRV_CTL_ELEM_ACCESS_VOLATILE;
2235 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE |
2236 SNDRV_CTL_EVENT_MASK_INFO,
2237 &hdspm->playback_mixer_ctls[i]->id);
2244 static int snd_hdspm_create_controls(snd_card_t * card, hdspm_t * hdspm)
2246 unsigned int idx, limit;
2248 snd_kcontrol_t *kctl;
2250 /* add control list first */
2252 for (idx = 0; idx < ARRAY_SIZE(snd_hdspm_controls); idx++) {
2254 snd_ctl_add(card, kctl =
2255 snd_ctl_new1(&snd_hdspm_controls[idx],
2261 /* Channel playback mixer as default control
2262 Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders, thats to big for any alsamixer
2263 they are accesible via special IOCTL on hwdep
2264 and the mixer 2dimensional mixer control */
2266 snd_hdspm_playback_mixer.name = "Chn";
2267 limit = HDSPM_MAX_CHANNELS;
2269 /* The index values are one greater than the channel ID so that alsamixer
2270 will display them correctly. We want to use the index for fast lookup
2271 of the relevant channel, but if we use it at all, most ALSA software
2272 does the wrong thing with it ...
2275 for (idx = 0; idx < limit; ++idx) {
2276 snd_hdspm_playback_mixer.index = idx + 1;
2277 if ((err = snd_ctl_add(card,
2280 (&snd_hdspm_playback_mixer,
2284 hdspm->playback_mixer_ctls[idx] = kctl;
2290 /*------------------------------------------------------------
2292 ------------------------------------------------------------*/
2295 snd_hdspm_proc_read(snd_info_entry_t * entry, snd_info_buffer_t * buffer)
2297 hdspm_t *hdspm = (hdspm_t *) entry->private_data;
2298 unsigned int status;
2299 unsigned int status2;
2300 char *pref_sync_ref;
2302 char *system_clock_mode;
2308 status = hdspm_read(hdspm, HDSPM_statusRegister);
2309 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
2311 snd_iprintf(buffer, "%s (Card #%d) Rev.%x Status2first3bits: %x\n",
2312 hdspm->card_name, hdspm->card->number + 1,
2313 hdspm->firmware_rev,
2314 (status2 & HDSPM_version0) |
2315 (status2 & HDSPM_version1) | (status2 &
2318 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
2319 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
2321 snd_iprintf(buffer, "--- System ---\n");
2324 "IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n",
2325 status & HDSPM_audioIRQPending,
2326 (status & HDSPM_midi0IRQPending) ? 1 : 0,
2327 (status & HDSPM_midi1IRQPending) ? 1 : 0,
2330 "HW pointer: id = %d, rawptr = %d (%d->%d) estimated= %ld (bytes)\n",
2331 ((status & HDSPM_BufferID) ? 1 : 0),
2332 (status & HDSPM_BufferPositionMask),
2333 (status & HDSPM_BufferPositionMask) % (2 *
2336 ((status & HDSPM_BufferPositionMask) -
2337 64) % (2 * (int)hdspm->period_bytes),
2338 (long) hdspm_hw_pointer(hdspm) * 4);
2341 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n",
2342 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF,
2343 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF,
2344 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF,
2345 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF);
2347 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, status2=0x%x\n",
2348 hdspm->control_register, hdspm->control2_register,
2351 snd_iprintf(buffer, "--- Settings ---\n");
2354 hdspm_decode_latency(hdspm->
2356 HDSPM_LatencyMask));
2359 "Size (Latency): %d samples (2 periods of %lu bytes)\n",
2360 x, (unsigned long) hdspm->period_bytes);
2362 snd_iprintf(buffer, "Line out: %s, Precise Pointer: %s\n",
2364 control_register & HDSPM_LineOut) ? "on " : "off",
2365 (hdspm->precise_ptr) ? "on" : "off");
2367 switch (hdspm->control_register & HDSPM_InputMask) {
2368 case HDSPM_InputOptical:
2371 case HDSPM_InputCoaxial:
2378 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2379 case HDSPM_SyncRef_Word:
2380 syncref = "WordClock";
2382 case HDSPM_SyncRef_MADI:
2388 snd_iprintf(buffer, "Inputsel = %s, SyncRef = %s\n", insel,
2392 "ClearTrackMarker = %s, Transmit in %s Channel Mode, Auto Input %s\n",
2394 control_register & HDSPM_clr_tms) ? "on" : "off",
2396 control_register & HDSPM_TX_64ch) ? "64" : "56",
2398 control_register & HDSPM_AutoInp) ? "on" : "off");
2400 switch (hdspm_clock_source(hdspm)) {
2401 case HDSPM_CLOCK_SOURCE_AUTOSYNC:
2402 clock_source = "AutoSync";
2404 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ:
2405 clock_source = "Internal 32 kHz";
2407 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2408 clock_source = "Internal 44.1 kHz";
2410 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ:
2411 clock_source = "Internal 48 kHz";
2413 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
2414 clock_source = "Internal 64 kHz";
2416 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2417 clock_source = "Internal 88.2 kHz";
2419 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
2420 clock_source = "Internal 96 kHz";
2423 clock_source = "Error";
2425 snd_iprintf(buffer, "Sample Clock Source: %s\n", clock_source);
2426 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
2427 system_clock_mode = "Slave";
2429 system_clock_mode = "Master";
2431 snd_iprintf(buffer, "System Clock Mode: %s\n", system_clock_mode);
2433 switch (hdspm_pref_sync_ref(hdspm)) {
2434 case HDSPM_SYNC_FROM_WORD:
2435 pref_sync_ref = "Word Clock";
2437 case HDSPM_SYNC_FROM_MADI:
2438 pref_sync_ref = "MADI Sync";
2441 pref_sync_ref = "XXXX Clock";
2444 snd_iprintf(buffer, "Preferred Sync Reference: %s\n",
2447 snd_iprintf(buffer, "System Clock Frequency: %d\n",
2448 hdspm->system_sample_rate);
2451 snd_iprintf(buffer, "--- Status:\n");
2453 x = status & HDSPM_madiSync;
2454 x2 = status2 & HDSPM_wcSync;
2456 snd_iprintf(buffer, "Inputs MADI=%s, WordClock=%s\n",
2457 (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") :
2459 (status2 & HDSPM_wcLock) ? (x2 ? "Sync" : "Lock") :
2462 switch (hdspm_autosync_ref(hdspm)) {
2463 case HDSPM_AUTOSYNC_FROM_WORD:
2464 autosync_ref = "Word Clock";
2466 case HDSPM_AUTOSYNC_FROM_MADI:
2467 autosync_ref = "MADI Sync";
2469 case HDSPM_AUTOSYNC_FROM_NONE:
2470 autosync_ref = "Input not valid";
2473 autosync_ref = "---";
2477 "AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n",
2478 autosync_ref, hdspm_external_sample_rate(hdspm),
2479 (status & HDSPM_madiFreqMask) >> 22,
2480 (status2 & HDSPM_wcFreqMask) >> 5);
2482 snd_iprintf(buffer, "Input: %s, Mode=%s\n",
2483 (status & HDSPM_AB_int) ? "Coax" : "Optical",
2484 (status & HDSPM_RX_64ch) ? "64 channels" :
2487 snd_iprintf(buffer, "\n");
2490 static void __devinit snd_hdspm_proc_init(hdspm_t * hdspm)
2492 snd_info_entry_t *entry;
2494 if (!snd_card_proc_new(hdspm->card, "hdspm", &entry))
2495 snd_info_set_text_ops(entry, hdspm, 1024,
2496 snd_hdspm_proc_read);
2499 /*------------------------------------------------------------
2501 ------------------------------------------------------------*/
2503 static int snd_hdspm_set_defaults(hdspm_t * hdspm)
2507 /* ASSUMPTION: hdspm->lock is either held, or there is no need to
2508 hold it (e.g. during module initalization).
2513 hdspm->control_register = HDSPM_ClockModeMaster | /* Master Cloack Mode on */
2514 hdspm_encode_latency(7) | /* latency maximum = 8192 samples */
2515 HDSPM_InputCoaxial | /* Input Coax not Optical */
2516 HDSPM_SyncRef_MADI | /* Madi is syncclock */
2517 HDSPM_LineOut | /* Analog output in */
2518 HDSPM_TX_64ch | /* transmit in 64ch mode */
2519 HDSPM_AutoInp; /* AutoInput chossing (takeover) */
2521 /* ! HDSPM_Frequency0|HDSPM_Frequency1 = 44.1khz */
2522 /* ! HDSPM_DoubleSpeed HDSPM_QuadSpeed = normal speed */
2523 /* ! HDSPM_clr_tms = do not clear bits in track marks */
2525 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2527 #ifdef SNDRV_BIG_ENDIAN
2528 hdspm->control2_register = HDSPM_BIGENDIAN_MODE;
2530 hdspm->control2_register = 0;
2533 hdspm_write(hdspm, HDSPM_control2Reg, hdspm->control2_register);
2534 hdspm_compute_period_size(hdspm);
2536 /* silence everything */
2538 all_in_all_mixer(hdspm, 0 * UNITY_GAIN);
2540 if (line_outs_monitor[hdspm->dev]) {
2542 snd_printk(KERN_INFO "HDSPM: sending all playback streams to line outs.\n");
2544 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) {
2545 if (hdspm_write_pb_gain(hdspm, i, i, UNITY_GAIN))
2550 /* set a default rate so that the channel map is set up. */
2551 hdspm->channel_map = channel_map_madi_ss;
2552 hdspm_set_rate(hdspm, 44100, 1);
2558 /*------------------------------------------------------------
2560 ------------------------------------------------------------*/
2562 static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id,
2563 struct pt_regs *regs)
2565 hdspm_t *hdspm = (hdspm_t *) dev_id;
2566 unsigned int status;
2570 unsigned int midi0status;
2571 unsigned int midi1status;
2574 status = hdspm_read(hdspm, HDSPM_statusRegister);
2576 audio = status & HDSPM_audioIRQPending;
2577 midi0 = status & HDSPM_midi0IRQPending;
2578 midi1 = status & HDSPM_midi1IRQPending;
2580 if (!audio && !midi0 && !midi1)
2583 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0);
2586 midi0status = hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff;
2587 midi1status = hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff;
2591 if (hdspm->capture_substream)
2592 snd_pcm_period_elapsed(hdspm->pcm->
2594 [SNDRV_PCM_STREAM_CAPTURE].
2597 if (hdspm->playback_substream)
2598 snd_pcm_period_elapsed(hdspm->pcm->
2600 [SNDRV_PCM_STREAM_PLAYBACK].
2604 if (midi0 && midi0status) {
2605 /* we disable interrupts for this input until processing is done */
2606 hdspm->control_register &= ~HDSPM_Midi0InterruptEnable;
2607 hdspm_write(hdspm, HDSPM_controlRegister,
2608 hdspm->control_register);
2609 hdspm->midi[0].pending = 1;
2612 if (midi1 && midi1status) {
2613 /* we disable interrupts for this input until processing is done */
2614 hdspm->control_register &= ~HDSPM_Midi1InterruptEnable;
2615 hdspm_write(hdspm, HDSPM_controlRegister,
2616 hdspm->control_register);
2617 hdspm->midi[1].pending = 1;
2621 tasklet_hi_schedule(&hdspm->midi_tasklet);
2625 /*------------------------------------------------------------
2627 ------------------------------------------------------------*/
2630 static snd_pcm_uframes_t snd_hdspm_hw_pointer(snd_pcm_substream_t *
2633 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2634 return hdspm_hw_pointer(hdspm);
2637 static char *hdspm_channel_buffer_location(hdspm_t * hdspm,
2638 int stream, int channel)
2642 snd_assert(channel >= 0
2643 || channel < HDSPM_MAX_CHANNELS, return NULL);
2645 if ((mapped_channel = hdspm->channel_map[channel]) < 0)
2648 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
2649 return hdspm->capture_buffer +
2650 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
2652 return hdspm->playback_buffer +
2653 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
2658 /* dont know why need it ??? */
2659 static int snd_hdspm_playback_copy(snd_pcm_substream_t * substream,
2660 int channel, snd_pcm_uframes_t pos,
2661 void __user *src, snd_pcm_uframes_t count)
2663 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2666 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4,
2669 channel_buf = hdspm_channel_buffer_location(hdspm,
2673 snd_assert(channel_buf != NULL, return -EIO);
2675 return copy_from_user(channel_buf + pos * 4, src, count * 4);
2678 static int snd_hdspm_capture_copy(snd_pcm_substream_t * substream,
2679 int channel, snd_pcm_uframes_t pos,
2680 void __user *dst, snd_pcm_uframes_t count)
2682 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2685 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4,
2688 channel_buf = hdspm_channel_buffer_location(hdspm,
2691 snd_assert(channel_buf != NULL, return -EIO);
2692 return copy_to_user(dst, channel_buf + pos * 4, count * 4);
2695 static int snd_hdspm_hw_silence(snd_pcm_substream_t * substream,
2696 int channel, snd_pcm_uframes_t pos,
2697 snd_pcm_uframes_t count)
2699 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2703 hdspm_channel_buffer_location(hdspm, substream->pstr->stream,
2705 snd_assert(channel_buf != NULL, return -EIO);
2706 memset(channel_buf + pos * 4, 0, count * 4);
2710 static int snd_hdspm_reset(snd_pcm_substream_t * substream)
2712 snd_pcm_runtime_t *runtime = substream->runtime;
2713 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2714 snd_pcm_substream_t *other;
2716 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2717 other = hdspm->capture_substream;
2719 other = hdspm->playback_substream;
2722 runtime->status->hw_ptr = hdspm_hw_pointer(hdspm);
2724 runtime->status->hw_ptr = 0;
2726 struct list_head *pos;
2727 snd_pcm_substream_t *s;
2728 snd_pcm_runtime_t *oruntime = other->runtime;
2729 snd_pcm_group_for_each(pos, substream) {
2730 s = snd_pcm_group_substream_entry(pos);
2732 oruntime->status->hw_ptr =
2733 runtime->status->hw_ptr;
2741 static int snd_hdspm_hw_params(snd_pcm_substream_t * substream,
2742 snd_pcm_hw_params_t * params)
2744 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2749 struct snd_sg_buf *sgbuf;
2752 spin_lock_irq(&hdspm->lock);
2754 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2755 this_pid = hdspm->playback_pid;
2756 other_pid = hdspm->capture_pid;
2758 this_pid = hdspm->capture_pid;
2759 other_pid = hdspm->playback_pid;
2762 if ((other_pid > 0) && (this_pid != other_pid)) {
2764 /* The other stream is open, and not by the same
2765 task as this one. Make sure that the parameters
2766 that matter are the same.
2769 if (params_rate(params) != hdspm->system_sample_rate) {
2770 spin_unlock_irq(&hdspm->lock);
2771 _snd_pcm_hw_param_setempty(params,
2772 SNDRV_PCM_HW_PARAM_RATE);
2776 if (params_period_size(params) != hdspm->period_bytes / 4) {
2777 spin_unlock_irq(&hdspm->lock);
2778 _snd_pcm_hw_param_setempty(params,
2779 SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2785 spin_unlock_irq(&hdspm->lock);
2787 /* how to make sure that the rate matches an externally-set one ? */
2789 spin_lock_irq(&hdspm->lock);
2790 if ((err = hdspm_set_rate(hdspm, params_rate(params), 0)) < 0) {
2791 spin_unlock_irq(&hdspm->lock);
2792 _snd_pcm_hw_param_setempty(params,
2793 SNDRV_PCM_HW_PARAM_RATE);
2796 spin_unlock_irq(&hdspm->lock);
2799 hdspm_set_interrupt_interval(hdspm,
2800 params_period_size(params))) <
2802 _snd_pcm_hw_param_setempty(params,
2803 SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2807 /* Memory allocation, takashi's method, dont know if we should spinlock */
2808 /* malloc all buffer even if not enabled to get sure */
2809 /* malloc only needed bytes */
2811 snd_pcm_lib_malloc_pages(substream,
2812 HDSPM_CHANNEL_BUFFER_BYTES *
2813 params_channels(params));
2817 sgbuf = snd_pcm_substream_sgbuf(substream);
2819 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2821 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferOut,
2822 params_channels(params));
2824 for (i = 0; i < params_channels(params); ++i)
2825 snd_hdspm_enable_out(hdspm, i, 1);
2827 hdspm->playback_buffer =
2828 (unsigned char *) substream->runtime->dma_area;
2830 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferIn,
2831 params_channels(params));
2833 for (i = 0; i < params_channels(params); ++i)
2834 snd_hdspm_enable_in(hdspm, i, 1);
2836 hdspm->capture_buffer =
2837 (unsigned char *) substream->runtime->dma_area;
2842 static int snd_hdspm_hw_free(snd_pcm_substream_t * substream)
2845 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2847 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2849 /* params_channels(params) should be enough,
2850 but to get sure in case of error */
2851 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i)
2852 snd_hdspm_enable_out(hdspm, i, 0);
2854 hdspm->playback_buffer = NULL;
2856 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i)
2857 snd_hdspm_enable_in(hdspm, i, 0);
2859 hdspm->capture_buffer = NULL;
2863 snd_pcm_lib_free_pages(substream);
2868 static int snd_hdspm_channel_info(snd_pcm_substream_t * substream,
2869 snd_pcm_channel_info_t * info)
2871 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2874 snd_assert(info->channel < HDSPM_MAX_CHANNELS, return -EINVAL);
2876 if ((mapped_channel = hdspm->channel_map[info->channel]) < 0)
2879 info->offset = mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
2885 static int snd_hdspm_ioctl(snd_pcm_substream_t * substream,
2886 unsigned int cmd, void *arg)
2889 case SNDRV_PCM_IOCTL1_RESET:
2891 return snd_hdspm_reset(substream);
2894 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2896 snd_pcm_channel_info_t *info = arg;
2897 return snd_hdspm_channel_info(substream, info);
2903 return snd_pcm_lib_ioctl(substream, cmd, arg);
2906 static int snd_hdspm_trigger(snd_pcm_substream_t * substream, int cmd)
2908 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
2909 snd_pcm_substream_t *other;
2912 spin_lock(&hdspm->lock);
2913 running = hdspm->running;
2915 case SNDRV_PCM_TRIGGER_START:
2916 running |= 1 << substream->stream;
2918 case SNDRV_PCM_TRIGGER_STOP:
2919 running &= ~(1 << substream->stream);
2923 spin_unlock(&hdspm->lock);
2926 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2927 other = hdspm->capture_substream;
2929 other = hdspm->playback_substream;
2932 struct list_head *pos;
2933 snd_pcm_substream_t *s;
2934 snd_pcm_group_for_each(pos, substream) {
2935 s = snd_pcm_group_substream_entry(pos);
2937 snd_pcm_trigger_done(s, substream);
2938 if (cmd == SNDRV_PCM_TRIGGER_START)
2939 running |= 1 << s->stream;
2941 running &= ~(1 << s->stream);
2945 if (cmd == SNDRV_PCM_TRIGGER_START) {
2946 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK))
2947 && substream->stream ==
2948 SNDRV_PCM_STREAM_CAPTURE)
2949 hdspm_silence_playback(hdspm);
2952 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2953 hdspm_silence_playback(hdspm);
2956 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2957 hdspm_silence_playback(hdspm);
2960 snd_pcm_trigger_done(substream, substream);
2961 if (!hdspm->running && running)
2962 hdspm_start_audio(hdspm);
2963 else if (hdspm->running && !running)
2964 hdspm_stop_audio(hdspm);
2965 hdspm->running = running;
2966 spin_unlock(&hdspm->lock);
2971 static int snd_hdspm_prepare(snd_pcm_substream_t * substream)
2976 static unsigned int period_sizes[] =
2977 { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2979 static snd_pcm_hardware_t snd_hdspm_playback_subinfo = {
2980 .info = (SNDRV_PCM_INFO_MMAP |
2981 SNDRV_PCM_INFO_MMAP_VALID |
2982 SNDRV_PCM_INFO_NONINTERLEAVED |
2983 SNDRV_PCM_INFO_SYNC_START | SNDRV_PCM_INFO_DOUBLE),
2984 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2985 .rates = (SNDRV_PCM_RATE_32000 |
2986 SNDRV_PCM_RATE_44100 |
2987 SNDRV_PCM_RATE_48000 |
2988 SNDRV_PCM_RATE_64000 |
2989 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000),
2993 .channels_max = HDSPM_MAX_CHANNELS,
2995 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS,
2996 .period_bytes_min = (64 * 4),
2997 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS,
3003 static snd_pcm_hardware_t snd_hdspm_capture_subinfo = {
3004 .info = (SNDRV_PCM_INFO_MMAP |
3005 SNDRV_PCM_INFO_MMAP_VALID |
3006 SNDRV_PCM_INFO_NONINTERLEAVED |
3007 SNDRV_PCM_INFO_SYNC_START),
3008 .formats = SNDRV_PCM_FMTBIT_S32_LE,
3009 .rates = (SNDRV_PCM_RATE_32000 |
3010 SNDRV_PCM_RATE_44100 |
3011 SNDRV_PCM_RATE_48000 |
3012 SNDRV_PCM_RATE_64000 |
3013 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000),
3017 .channels_max = HDSPM_MAX_CHANNELS,
3019 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS,
3020 .period_bytes_min = (64 * 4),
3021 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS,
3027 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
3028 .count = ARRAY_SIZE(period_sizes),
3029 .list = period_sizes,
3034 static int snd_hdspm_hw_rule_channels_rate(snd_pcm_hw_params_t * params,
3035 snd_pcm_hw_rule_t * rule)
3037 hdspm_t *hdspm = rule->private;
3039 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
3041 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
3043 if (r->min > 48000) {
3044 snd_interval_t t = {
3046 .max = hdspm->ds_channels,
3049 return snd_interval_refine(c, &t);
3050 } else if (r->max < 64000) {
3051 snd_interval_t t = {
3053 .max = hdspm->ss_channels,
3056 return snd_interval_refine(c, &t);
3061 static int snd_hdspm_hw_rule_rate_channels(snd_pcm_hw_params_t * params,
3062 snd_pcm_hw_rule_t * rule)
3064 hdspm_t *hdspm = rule->private;
3066 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
3068 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
3070 if (c->min <= hdspm->ss_channels) {
3071 snd_interval_t t = {
3076 return snd_interval_refine(r, &t);
3077 } else if (c->max > hdspm->ss_channels) {
3078 snd_interval_t t = {
3084 return snd_interval_refine(r, &t);
3089 static int snd_hdspm_playback_open(snd_pcm_substream_t * substream)
3091 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3092 snd_pcm_runtime_t *runtime = substream->runtime;
3094 snd_printdd("Open device substream %d\n", substream->stream);
3096 spin_lock_irq(&hdspm->lock);
3098 snd_pcm_set_sync(substream);
3100 runtime->hw = snd_hdspm_playback_subinfo;
3102 if (hdspm->capture_substream == NULL)
3103 hdspm_stop_audio(hdspm);
3105 hdspm->playback_pid = current->pid;
3106 hdspm->playback_substream = substream;
3108 spin_unlock_irq(&hdspm->lock);
3110 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
3112 snd_pcm_hw_constraint_list(runtime, 0,
3113 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
3114 &hw_constraints_period_sizes);
3116 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
3117 snd_hdspm_hw_rule_channels_rate, hdspm,
3118 SNDRV_PCM_HW_PARAM_RATE, -1);
3120 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
3121 snd_hdspm_hw_rule_rate_channels, hdspm,
3122 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
3127 static int snd_hdspm_playback_release(snd_pcm_substream_t * substream)
3129 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3131 spin_lock_irq(&hdspm->lock);
3133 hdspm->playback_pid = -1;
3134 hdspm->playback_substream = NULL;
3136 spin_unlock_irq(&hdspm->lock);
3142 static int snd_hdspm_capture_open(snd_pcm_substream_t * substream)
3144 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3145 snd_pcm_runtime_t *runtime = substream->runtime;
3147 spin_lock_irq(&hdspm->lock);
3148 snd_pcm_set_sync(substream);
3149 runtime->hw = snd_hdspm_capture_subinfo;
3151 if (hdspm->playback_substream == NULL)
3152 hdspm_stop_audio(hdspm);
3154 hdspm->capture_pid = current->pid;
3155 hdspm->capture_substream = substream;
3157 spin_unlock_irq(&hdspm->lock);
3159 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
3160 snd_pcm_hw_constraint_list(runtime, 0,
3161 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
3162 &hw_constraints_period_sizes);
3164 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
3165 snd_hdspm_hw_rule_channels_rate, hdspm,
3166 SNDRV_PCM_HW_PARAM_RATE, -1);
3168 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
3169 snd_hdspm_hw_rule_rate_channels, hdspm,
3170 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
3174 static int snd_hdspm_capture_release(snd_pcm_substream_t * substream)
3176 hdspm_t *hdspm = snd_pcm_substream_chip(substream);
3178 spin_lock_irq(&hdspm->lock);
3180 hdspm->capture_pid = -1;
3181 hdspm->capture_substream = NULL;
3183 spin_unlock_irq(&hdspm->lock);
3187 static int snd_hdspm_hwdep_dummy_op(snd_hwdep_t * hw, struct file *file)
3189 /* we have nothing to initialize but the call is required */
3194 static int snd_hdspm_hwdep_ioctl(snd_hwdep_t * hw, struct file *file,
3195 unsigned int cmd, unsigned long arg)
3197 hdspm_t *hdspm = (hdspm_t *) hw->private_data;
3198 struct sndrv_hdspm_mixer_ioctl mixer;
3199 hdspm_config_info_t info;
3200 hdspm_version_t hdspm_version;
3201 struct sndrv_hdspm_peak_rms_ioctl rms;
3206 case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS:
3207 if (copy_from_user(&rms, (void __user *)arg, sizeof(rms)))
3209 /* maybe there is a chance to memorymap in future so dont touch just copy */
3210 if(copy_to_user_fromio((void __user *)rms.peak,
3211 hdspm->iobase+HDSPM_MADI_peakrmsbase,
3212 sizeof(hdspm_peak_rms_t)) != 0 )
3218 case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO:
3220 spin_lock_irq(&hdspm->lock);
3221 info.pref_sync_ref =
3222 (unsigned char) hdspm_pref_sync_ref(hdspm);
3223 info.wordclock_sync_check =
3224 (unsigned char) hdspm_wc_sync_check(hdspm);
3226 info.system_sample_rate = hdspm->system_sample_rate;
3227 info.autosync_sample_rate =
3228 hdspm_external_sample_rate(hdspm);
3229 info.system_clock_mode =
3230 (unsigned char) hdspm_system_clock_mode(hdspm);
3232 (unsigned char) hdspm_clock_source(hdspm);
3234 (unsigned char) hdspm_autosync_ref(hdspm);
3235 info.line_out = (unsigned char) hdspm_line_out(hdspm);
3237 spin_unlock_irq(&hdspm->lock);
3238 if (copy_to_user((void __user *) arg, &info, sizeof(info)))
3242 case SNDRV_HDSPM_IOCTL_GET_VERSION:
3243 hdspm_version.firmware_rev = hdspm->firmware_rev;
3244 if (copy_to_user((void __user *) arg, &hdspm_version,
3245 sizeof(hdspm_version)))
3249 case SNDRV_HDSPM_IOCTL_GET_MIXER:
3250 if (copy_from_user(&mixer, (void __user *)arg, sizeof(mixer)))
3253 ((void __user *)mixer.mixer, hdspm->mixer, sizeof(hdspm_mixer_t)))
3263 static snd_pcm_ops_t snd_hdspm_playback_ops = {
3264 .open = snd_hdspm_playback_open,
3265 .close = snd_hdspm_playback_release,
3266 .ioctl = snd_hdspm_ioctl,
3267 .hw_params = snd_hdspm_hw_params,
3268 .hw_free = snd_hdspm_hw_free,
3269 .prepare = snd_hdspm_prepare,
3270 .trigger = snd_hdspm_trigger,
3271 .pointer = snd_hdspm_hw_pointer,
3272 .copy = snd_hdspm_playback_copy,
3273 .silence = snd_hdspm_hw_silence,
3274 .page = snd_pcm_sgbuf_ops_page,
3277 static snd_pcm_ops_t snd_hdspm_capture_ops = {
3278 .open = snd_hdspm_capture_open,
3279 .close = snd_hdspm_capture_release,
3280 .ioctl = snd_hdspm_ioctl,
3281 .hw_params = snd_hdspm_hw_params,
3282 .hw_free = snd_hdspm_hw_free,
3283 .prepare = snd_hdspm_prepare,
3284 .trigger = snd_hdspm_trigger,
3285 .pointer = snd_hdspm_hw_pointer,
3286 .copy = snd_hdspm_capture_copy,
3287 .page = snd_pcm_sgbuf_ops_page,
3290 static int __devinit snd_hdspm_create_hwdep(snd_card_t * card,
3296 if ((err = snd_hwdep_new(card, "HDSPM hwdep", 0, &hw)) < 0)
3300 hw->private_data = hdspm;
3301 strcpy(hw->name, "HDSPM hwdep interface");
3303 hw->ops.open = snd_hdspm_hwdep_dummy_op;
3304 hw->ops.ioctl = snd_hdspm_hwdep_ioctl;
3305 hw->ops.release = snd_hdspm_hwdep_dummy_op;
3311 /*------------------------------------------------------------
3313 ------------------------------------------------------------*/
3314 static int __devinit snd_hdspm_preallocate_memory(hdspm_t * hdspm)
3322 wanted = HDSPM_DMA_AREA_BYTES + 4096; /* dont know why, but it works */
3325 snd_pcm_lib_preallocate_pages_for_all(pcm,
3326 SNDRV_DMA_TYPE_DEV_SG,
3327 snd_dma_pci_data(hdspm->pci),
3330 snd_printdd("Could not preallocate %d Bytes\n", wanted);
3334 snd_printdd(" Preallocated %d Bytes\n", wanted);
3339 static int snd_hdspm_memory_free(hdspm_t * hdspm)
3341 snd_printdd("memory_free_for_all %p\n", hdspm->pcm);
3343 snd_pcm_lib_preallocate_free_for_all(hdspm->pcm);
3348 static void hdspm_set_sgbuf(hdspm_t * hdspm, struct snd_sg_buf *sgbuf,
3349 unsigned int reg, int channels)
3352 for (i = 0; i < (channels * 16); i++)
3353 hdspm_write(hdspm, reg + 4 * i,
3354 snd_pcm_sgbuf_get_addr(sgbuf,
3355 (size_t) 4096 * i));
3358 /* ------------- ALSA Devices ---------------------------- */
3359 static int __devinit snd_hdspm_create_pcm(snd_card_t * card,
3365 if ((err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm)) < 0)
3369 pcm->private_data = hdspm;
3370 strcpy(pcm->name, hdspm->card_name);
3372 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
3373 &snd_hdspm_playback_ops);
3374 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
3375 &snd_hdspm_capture_ops);
3377 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
3379 if ((err = snd_hdspm_preallocate_memory(hdspm)) < 0)
3385 static inline void snd_hdspm_initialize_midi_flush(hdspm_t * hdspm)
3387 snd_hdspm_flush_midi_input(hdspm, 0);
3388 snd_hdspm_flush_midi_input(hdspm, 1);
3391 static int __devinit snd_hdspm_create_alsa_devices(snd_card_t * card,
3396 snd_printdd("Create card...\n");
3397 if ((err = snd_hdspm_create_pcm(card, hdspm)) < 0)
3400 if ((err = snd_hdspm_create_midi(card, hdspm, 0)) < 0)
3403 if ((err = snd_hdspm_create_midi(card, hdspm, 1)) < 0)
3406 if ((err = snd_hdspm_create_controls(card, hdspm)) < 0)
3409 if ((err = snd_hdspm_create_hwdep(card, hdspm)) < 0)
3412 snd_printdd("proc init...\n");
3413 snd_hdspm_proc_init(hdspm);
3415 hdspm->system_sample_rate = -1;
3416 hdspm->last_external_sample_rate = -1;
3417 hdspm->last_internal_sample_rate = -1;
3418 hdspm->playback_pid = -1;
3419 hdspm->capture_pid = -1;
3420 hdspm->capture_substream = NULL;
3421 hdspm->playback_substream = NULL;
3423 snd_printdd("Set defaults...\n");
3424 if ((err = snd_hdspm_set_defaults(hdspm)) < 0)
3427 snd_printdd("Update mixer controls...\n");
3428 hdspm_update_simple_mixer_controls(hdspm);
3430 snd_printdd("Initializeing complete ???\n");
3432 if ((err = snd_card_register(card)) < 0) {
3433 snd_printk(KERN_ERR "HDSPM: error registering card\n");
3437 snd_printdd("... yes now\n");
3442 static int __devinit snd_hdspm_create(snd_card_t * card, hdspm_t * hdspm,
3443 int precise_ptr, int enable_monitor)
3445 struct pci_dev *pci = hdspm->pci;
3449 unsigned long io_extent;
3452 hdspm->irq_count = 0;
3454 hdspm->midi[0].rmidi = NULL;
3455 hdspm->midi[1].rmidi = NULL;
3456 hdspm->midi[0].input = NULL;
3457 hdspm->midi[1].input = NULL;
3458 hdspm->midi[0].output = NULL;
3459 hdspm->midi[1].output = NULL;
3460 spin_lock_init(&hdspm->midi[0].lock);
3461 spin_lock_init(&hdspm->midi[1].lock);
3462 hdspm->iobase = NULL;
3463 hdspm->control_register = 0;
3464 hdspm->control2_register = 0;
3466 hdspm->playback_buffer = NULL;
3467 hdspm->capture_buffer = NULL;
3469 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i)
3470 hdspm->playback_mixer_ctls[i] = NULL;
3471 hdspm->mixer = NULL;
3475 spin_lock_init(&hdspm->lock);
3477 tasklet_init(&hdspm->midi_tasklet,
3478 hdspm_midi_tasklet, (unsigned long) hdspm);
3480 pci_read_config_word(hdspm->pci,
3481 PCI_CLASS_REVISION, &hdspm->firmware_rev);
3483 strcpy(card->driver, "HDSPM");
3484 strcpy(card->mixername, "Xilinx FPGA");
3485 hdspm->card_name = "RME HDSPM MADI";
3487 if ((err = pci_enable_device(pci)) < 0)
3490 pci_set_master(hdspm->pci);
3492 if ((err = pci_request_regions(pci, "hdspm")) < 0)
3495 hdspm->port = pci_resource_start(pci, 0);
3496 io_extent = pci_resource_len(pci, 0);
3498 snd_printdd("grabbed memory region 0x%lx-0x%lx\n",
3499 hdspm->port, hdspm->port + io_extent - 1);
3502 if ((hdspm->iobase = ioremap_nocache(hdspm->port, io_extent)) == NULL) {
3503 snd_printk(KERN_ERR "HDSPM: unable to remap region 0x%lx-0x%lx\n",
3504 hdspm->port, hdspm->port + io_extent - 1);
3507 snd_printdd("remapped region (0x%lx) 0x%lx-0x%lx\n",
3508 (unsigned long)hdspm->iobase, hdspm->port,
3509 hdspm->port + io_extent - 1);
3511 if (request_irq(pci->irq, snd_hdspm_interrupt,
3512 SA_INTERRUPT | SA_SHIRQ, "hdspm",
3514 snd_printk(KERN_ERR "HDSPM: unable to use IRQ %d\n", pci->irq);
3518 snd_printdd("use IRQ %d\n", pci->irq);
3520 hdspm->irq = pci->irq;
3521 hdspm->precise_ptr = precise_ptr;
3523 hdspm->monitor_outs = enable_monitor;
3525 snd_printdd("kmalloc Mixer memory of %d Bytes\n",
3526 sizeof(hdspm_mixer_t));
3528 (hdspm_mixer_t *) kmalloc(sizeof(hdspm_mixer_t), GFP_KERNEL))
3530 snd_printk(KERN_ERR "HDSPM: unable to kmalloc Mixer memory of %d Bytes\n",
3531 (int)sizeof(hdspm_mixer_t));
3535 hdspm->ss_channels = MADI_SS_CHANNELS;
3536 hdspm->ds_channels = MADI_DS_CHANNELS;
3537 hdspm->qs_channels = MADI_QS_CHANNELS;
3539 snd_printdd("create alsa devices.\n");
3540 if ((err = snd_hdspm_create_alsa_devices(card, hdspm)) < 0)
3543 snd_hdspm_initialize_midi_flush(hdspm);
3548 static int snd_hdspm_free(hdspm_t * hdspm)
3553 /* stop th audio, and cancel all interrupts */
3554 hdspm->control_register &=
3555 ~(HDSPM_Start | HDSPM_AudioInterruptEnable
3556 | HDSPM_Midi0InterruptEnable |
3557 HDSPM_Midi1InterruptEnable);
3558 hdspm_write(hdspm, HDSPM_controlRegister,
3559 hdspm->control_register);
3562 if (hdspm->irq >= 0)
3563 free_irq(hdspm->irq, (void *) hdspm);
3566 kfree(hdspm->mixer);
3569 iounmap(hdspm->iobase);
3571 snd_hdspm_memory_free(hdspm);
3574 pci_release_regions(hdspm->pci);
3576 pci_disable_device(hdspm->pci);
3580 static void snd_hdspm_card_free(snd_card_t * card)
3582 hdspm_t *hdspm = (hdspm_t *) card->private_data;
3585 snd_hdspm_free(hdspm);
3588 static int __devinit snd_hdspm_probe(struct pci_dev *pci,
3589 const struct pci_device_id *pci_id)
3596 if (dev >= SNDRV_CARDS)
3603 if (!(card = snd_card_new(index[dev], id[dev],
3604 THIS_MODULE, sizeof(hdspm_t))))
3607 hdspm = (hdspm_t *) card->private_data;
3608 card->private_free = snd_hdspm_card_free;
3613 snd_hdspm_create(card, hdspm, precise_ptr[dev],
3614 enable_monitor[dev])) < 0) {
3615 snd_card_free(card);
3619 strcpy(card->shortname, "HDSPM MADI");
3620 sprintf(card->longname, "%s at 0x%lx, irq %d", hdspm->card_name,
3621 hdspm->port, hdspm->irq);
3623 if ((err = snd_card_register(card)) < 0) {
3624 snd_card_free(card);
3628 pci_set_drvdata(pci, card);
3634 static void __devexit snd_hdspm_remove(struct pci_dev *pci)
3636 snd_card_free(pci_get_drvdata(pci));
3637 pci_set_drvdata(pci, NULL);
3640 static struct pci_driver driver = {
3641 .name = "RME Hammerfall DSP MADI",
3642 .id_table = snd_hdspm_ids,
3643 .probe = snd_hdspm_probe,
3644 .remove = __devexit_p(snd_hdspm_remove),
3648 static int __init alsa_card_hdspm_init(void)
3650 return pci_register_driver(&driver);
3653 static void __exit alsa_card_hdspm_exit(void)
3655 pci_unregister_driver(&driver);
3658 module_init(alsa_card_hdspm_init)
3659 module_exit(alsa_card_hdspm_exit)