2 * Adaptec AIC79xx device driver for Linux.
4 * Copyright (c) 2000-2001 Adaptec Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#166 $
42 #ifndef _AIC79XX_LINUX_H_
43 #define _AIC79XX_LINUX_H_
45 #include <linux/types.h>
46 #include <linux/blkdev.h>
47 #include <linux/delay.h>
48 #include <linux/ioport.h>
49 #include <linux/pci.h>
50 #include <linux/interrupt.h>
51 #include <linux/module.h>
52 #include <linux/slab.h>
53 #include <asm/byteorder.h>
56 #include <scsi/scsi.h>
57 #include <scsi/scsi_cmnd.h>
58 #include <scsi/scsi_eh.h>
59 #include <scsi/scsi_device.h>
60 #include <scsi/scsi_host.h>
61 #include <scsi/scsi_tcq.h>
62 #include <scsi/scsi_transport.h>
63 #include <scsi/scsi_transport_spi.h>
65 /* Core SCSI definitions */
66 #define AIC_LIB_PREFIX ahd
68 /* Name space conflict with BSD queue macros */
75 #include "scsi_message.h"
79 /*********************************** Debugging ********************************/
80 #ifdef CONFIG_AIC79XX_DEBUG_ENABLE
81 #ifdef CONFIG_AIC79XX_DEBUG_MASK
83 #define AHD_DEBUG_OPTS CONFIG_AIC79XX_DEBUG_MASK
86 * Compile in debugging code, but do not enable any printfs.
89 #define AHD_DEBUG_OPTS 0
91 /* No debugging code. */
94 /********************************** Misc Macros *******************************/
95 #define powerof2(x) ((((x)-1)&(x))==0)
97 /************************* Forward Declarations *******************************/
99 typedef struct pci_dev *ahd_dev_softc_t;
100 typedef struct scsi_cmnd *ahd_io_ctx_t;
102 /******************************* Byte Order ***********************************/
103 #define ahd_htobe16(x) cpu_to_be16(x)
104 #define ahd_htobe32(x) cpu_to_be32(x)
105 #define ahd_htobe64(x) cpu_to_be64(x)
106 #define ahd_htole16(x) cpu_to_le16(x)
107 #define ahd_htole32(x) cpu_to_le32(x)
108 #define ahd_htole64(x) cpu_to_le64(x)
110 #define ahd_be16toh(x) be16_to_cpu(x)
111 #define ahd_be32toh(x) be32_to_cpu(x)
112 #define ahd_be64toh(x) be64_to_cpu(x)
113 #define ahd_le16toh(x) le16_to_cpu(x)
114 #define ahd_le32toh(x) le32_to_cpu(x)
115 #define ahd_le64toh(x) le64_to_cpu(x)
117 /************************* Configuration Data *********************************/
118 extern uint32_t aic79xx_allow_memio;
119 extern struct scsi_host_template aic79xx_driver_template;
121 /***************************** Bus Space/DMA **********************************/
123 typedef uint32_t bus_size_t;
132 volatile uint8_t __iomem *maddr;
133 } bus_space_handle_t;
135 typedef struct bus_dma_segment
141 struct ahd_linux_dma_tag
143 bus_size_t alignment;
147 typedef struct ahd_linux_dma_tag* bus_dma_tag_t;
149 typedef dma_addr_t bus_dmamap_t;
151 typedef int bus_dma_filter_t(void*, dma_addr_t);
152 typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
154 #define BUS_DMA_WAITOK 0x0
155 #define BUS_DMA_NOWAIT 0x1
156 #define BUS_DMA_ALLOCNOW 0x2
157 #define BUS_DMA_LOAD_SEGS 0x4 /*
158 * Argument is an S/G list not
162 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
163 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
164 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
166 int ahd_dma_tag_create(struct ahd_softc *, bus_dma_tag_t /*parent*/,
167 bus_size_t /*alignment*/, bus_size_t /*boundary*/,
168 dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
169 bus_dma_filter_t*/*filter*/, void */*filterarg*/,
170 bus_size_t /*maxsize*/, int /*nsegments*/,
171 bus_size_t /*maxsegsz*/, int /*flags*/,
172 bus_dma_tag_t */*dma_tagp*/);
174 void ahd_dma_tag_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/);
176 int ahd_dmamem_alloc(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
177 void** /*vaddr*/, int /*flags*/,
178 bus_dmamap_t* /*mapp*/);
180 void ahd_dmamem_free(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
181 void* /*vaddr*/, bus_dmamap_t /*map*/);
183 void ahd_dmamap_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/,
184 bus_dmamap_t /*map*/);
186 int ahd_dmamap_load(struct ahd_softc *ahd, bus_dma_tag_t /*dmat*/,
187 bus_dmamap_t /*map*/, void * /*buf*/,
188 bus_size_t /*buflen*/, bus_dmamap_callback_t *,
189 void */*callback_arg*/, int /*flags*/);
191 int ahd_dmamap_unload(struct ahd_softc *, bus_dma_tag_t, bus_dmamap_t);
194 * Operations performed by ahd_dmamap_sync().
196 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
197 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
198 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
199 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
203 * ahd_dmamap_sync is only used on buffers allocated with
204 * the pci_alloc_consistent() API. Although I'm not sure how
205 * this works on architectures with a write buffer, Linux does
206 * not have an API to sync "coherent" memory. Perhaps we need
209 #define ahd_dmamap_sync(ahd, dma_tag, dmamap, offset, len, op)
211 /************************** Timer DataStructures ******************************/
212 typedef struct timer_list ahd_timer_t;
214 /********************************** Includes **********************************/
215 #ifdef CONFIG_AIC79XX_REG_PRETTY_PRINT
216 #define AIC_DEBUG_REGISTERS 1
218 #define AIC_DEBUG_REGISTERS 0
222 /***************************** Timer Facilities *******************************/
223 #define ahd_timer_init init_timer
224 #define ahd_timer_stop del_timer_sync
226 /***************************** SMP support ************************************/
227 #include <linux/spinlock.h>
229 #define AIC79XX_DRIVER_VERSION "3.0"
231 /*************************** Device Data Structures ***************************/
233 * A per probed device structure used to deal with some error recovery
234 * scenarios that the Linux mid-layer code just doesn't know how to
235 * handle. The structure allocated for a device only becomes persistent
236 * after a successfully completed inquiry command to the target when
237 * that inquiry data indicates a lun is present.
241 AHD_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
242 AHD_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */
243 AHD_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */
244 AHD_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */
245 } ahd_linux_dev_flags;
247 struct ahd_linux_device {
248 TAILQ_ENTRY(ahd_linux_device) links;
251 * The number of transactions currently
252 * queued to the device.
257 * The currently allowed number of
258 * transactions that can be queued to
259 * the device. Must be signed for
260 * conversion from tagged to untagged
261 * mode where the device may have more
262 * than one outstanding active transaction.
267 * A positive count indicates that this
268 * device's queue is halted.
273 * Cumulative command counter.
275 u_long commands_issued;
278 * The number of tagged transactions when
279 * running at our current opening level
280 * that have been successfully received by
281 * this device since the last QUEUE FULL.
283 u_int tag_success_count;
284 #define AHD_TAG_SUCCESS_INTERVAL 50
286 ahd_linux_dev_flags flags;
291 struct timer_list timer;
294 * The high limit for the tags variable.
299 * The computed number of tags outstanding
300 * at the time of the last QUEUE FULL event.
302 u_int tags_on_last_queuefull;
305 * How many times we have seen a queue full
306 * with the same number of tags. This is used
307 * to stop our adaptive queue depth algorithm
308 * on devices with a fixed number of tags.
310 u_int last_queuefull_same_count;
311 #define AHD_LOCK_TAGS_COUNT 50
314 * How many transactions have been queued
315 * without the device going idle. We use
316 * this statistic to determine when to issue
317 * an ordered tag to prevent transaction
318 * starvation. This statistic is only updated
319 * if the AHD_DEV_PERIODIC_OTAG flag is set
322 u_int commands_since_idle_or_otag;
323 #define AHD_OTAG_THRESH 500
326 /********************* Definitions Required by the Core ***********************/
328 * Number of SG segments we require. So long as the S/G segments for
329 * a particular transaction are allocated in a physically contiguous
330 * manner and are allocated below 4GB, the number of S/G segments is
336 * Per-SCB OSM storage.
338 struct scb_platform_data {
339 struct ahd_linux_device *dev;
340 dma_addr_t buf_busaddr;
342 uint32_t sense_resid; /* Auto-Sense residual */
346 * Define a structure used for each host adapter. All members are
347 * aligned on a boundary >= the size of the member to honor the
348 * alignment restrictions of the various platforms supported by
351 struct ahd_platform_data {
353 * Fields accessed from interrupt context.
355 struct scsi_target *starget[AHD_NUM_TARGETS];
357 spinlock_t spin_lock;
358 struct completion *eh_done;
359 struct Scsi_Host *host; /* pointer to scsi host */
360 #define AHD_LINUX_NOIRQ ((uint32_t)~0)
361 uint32_t irq; /* IRQ for this adapter */
362 uint32_t bios_address;
363 resource_size_t mem_busaddr; /* Mem Base Addr */
366 /************************** OS Utility Wrappers *******************************/
367 #define printf printk
368 #define M_NOWAIT GFP_ATOMIC
370 #define malloc(size, type, flags) kmalloc(size, flags)
371 #define free(ptr, type) kfree(ptr)
373 void ahd_delay(long);
375 /***************************** Low Level I/O **********************************/
376 uint8_t ahd_inb(struct ahd_softc * ahd, long port);
377 void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
378 void ahd_outw_atomic(struct ahd_softc * ahd,
379 long port, uint16_t val);
380 void ahd_outsb(struct ahd_softc * ahd, long port,
381 uint8_t *, int count);
382 void ahd_insb(struct ahd_softc * ahd, long port,
383 uint8_t *, int count);
385 /**************************** Initialization **********************************/
386 int ahd_linux_register_host(struct ahd_softc *,
387 struct scsi_host_template *);
389 /*************************** Pretty Printing **********************************/
397 /******************************** Locking *************************************/
399 ahd_lockinit(struct ahd_softc *ahd)
401 spin_lock_init(&ahd->platform_data->spin_lock);
405 ahd_lock(struct ahd_softc *ahd, unsigned long *flags)
407 spin_lock_irqsave(&ahd->platform_data->spin_lock, *flags);
411 ahd_unlock(struct ahd_softc *ahd, unsigned long *flags)
413 spin_unlock_irqrestore(&ahd->platform_data->spin_lock, *flags);
416 /******************************* PCI Definitions ******************************/
418 * PCIM_xxx: mask to locate subfield in register
419 * PCIR_xxx: config register offset
420 * PCIC_xxx: device class
421 * PCIS_xxx: device subclass
422 * PCIP_xxx: device programming interface
423 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
424 * PCID_xxx: device ID
426 #define PCIR_DEVVENDOR 0x00
427 #define PCIR_VENDOR 0x00
428 #define PCIR_DEVICE 0x02
429 #define PCIR_COMMAND 0x04
430 #define PCIM_CMD_PORTEN 0x0001
431 #define PCIM_CMD_MEMEN 0x0002
432 #define PCIM_CMD_BUSMASTEREN 0x0004
433 #define PCIM_CMD_MWRICEN 0x0010
434 #define PCIM_CMD_PERRESPEN 0x0040
435 #define PCIM_CMD_SERRESPEN 0x0100
436 #define PCIR_STATUS 0x06
437 #define PCIR_REVID 0x08
438 #define PCIR_PROGIF 0x09
439 #define PCIR_SUBCLASS 0x0a
440 #define PCIR_CLASS 0x0b
441 #define PCIR_CACHELNSZ 0x0c
442 #define PCIR_LATTIMER 0x0d
443 #define PCIR_HEADERTYPE 0x0e
444 #define PCIM_MFDEV 0x80
445 #define PCIR_BIST 0x0f
446 #define PCIR_CAP_PTR 0x34
448 /* config registers for header type 0 devices */
449 #define PCIR_MAPS 0x10
450 #define PCIR_SUBVEND_0 0x2c
451 #define PCIR_SUBDEV_0 0x2e
453 /****************************** PCI-X definitions *****************************/
454 #define PCIXR_COMMAND 0x96
455 #define PCIXR_DEVADDR 0x98
456 #define PCIXM_DEVADDR_FNUM 0x0003 /* Function Number */
457 #define PCIXM_DEVADDR_DNUM 0x00F8 /* Device Number */
458 #define PCIXM_DEVADDR_BNUM 0xFF00 /* Bus Number */
459 #define PCIXR_STATUS 0x9A
460 #define PCIXM_STATUS_64BIT 0x0001 /* Active 64bit connection to device. */
461 #define PCIXM_STATUS_133CAP 0x0002 /* Device is 133MHz capable */
462 #define PCIXM_STATUS_SCDISC 0x0004 /* Split Completion Discarded */
463 #define PCIXM_STATUS_UNEXPSC 0x0008 /* Unexpected Split Completion */
464 #define PCIXM_STATUS_CMPLEXDEV 0x0010 /* Device Complexity (set == bridge) */
465 #define PCIXM_STATUS_MAXMRDBC 0x0060 /* Maximum Burst Read Count */
466 #define PCIXM_STATUS_MAXSPLITS 0x0380 /* Maximum Split Transactions */
467 #define PCIXM_STATUS_MAXCRDS 0x1C00 /* Maximum Cumulative Read Size */
468 #define PCIXM_STATUS_RCVDSCEM 0x2000 /* Received a Split Comp w/Error msg */
478 void ahd_power_state_change(struct ahd_softc *ahd,
479 ahd_power_state new_state);
481 /******************************* PCI Routines *********************************/
482 int ahd_linux_pci_init(void);
483 void ahd_linux_pci_exit(void);
484 int ahd_pci_map_registers(struct ahd_softc *ahd);
485 int ahd_pci_map_int(struct ahd_softc *ahd);
487 uint32_t ahd_pci_read_config(ahd_dev_softc_t pci,
489 void ahd_pci_write_config(ahd_dev_softc_t pci,
490 int reg, uint32_t value,
493 static __inline int ahd_get_pci_function(ahd_dev_softc_t);
495 ahd_get_pci_function(ahd_dev_softc_t pci)
497 return (PCI_FUNC(pci->devfn));
500 static __inline int ahd_get_pci_slot(ahd_dev_softc_t);
502 ahd_get_pci_slot(ahd_dev_softc_t pci)
504 return (PCI_SLOT(pci->devfn));
507 static __inline int ahd_get_pci_bus(ahd_dev_softc_t);
509 ahd_get_pci_bus(ahd_dev_softc_t pci)
511 return (pci->bus->number);
514 static __inline void ahd_flush_device_writes(struct ahd_softc *);
516 ahd_flush_device_writes(struct ahd_softc *ahd)
518 /* XXX Is this sufficient for all architectures??? */
519 ahd_inb(ahd, INTSTAT);
522 /**************************** Proc FS Support *********************************/
523 int ahd_linux_proc_info(struct Scsi_Host *, char *, char **,
526 /*********************** Transaction Access Wrappers **************************/
527 static __inline void ahd_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
528 static __inline void ahd_set_transaction_status(struct scb *, uint32_t);
529 static __inline void ahd_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
530 static __inline void ahd_set_scsi_status(struct scb *, uint32_t);
531 static __inline uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd);
532 static __inline uint32_t ahd_get_transaction_status(struct scb *);
533 static __inline uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd);
534 static __inline uint32_t ahd_get_scsi_status(struct scb *);
535 static __inline void ahd_set_transaction_tag(struct scb *, int, u_int);
536 static __inline u_long ahd_get_transfer_length(struct scb *);
537 static __inline int ahd_get_transfer_dir(struct scb *);
538 static __inline void ahd_set_residual(struct scb *, u_long);
539 static __inline void ahd_set_sense_residual(struct scb *scb, u_long resid);
540 static __inline u_long ahd_get_residual(struct scb *);
541 static __inline u_long ahd_get_sense_residual(struct scb *);
542 static __inline int ahd_perform_autosense(struct scb *);
543 static __inline uint32_t ahd_get_sense_bufsize(struct ahd_softc *,
545 static __inline void ahd_notify_xfer_settings_change(struct ahd_softc *,
546 struct ahd_devinfo *);
547 static __inline void ahd_platform_scb_free(struct ahd_softc *ahd,
549 static __inline void ahd_freeze_scb(struct scb *scb);
552 void ahd_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
554 cmd->result &= ~(CAM_STATUS_MASK << 16);
555 cmd->result |= status << 16;
559 void ahd_set_transaction_status(struct scb *scb, uint32_t status)
561 ahd_cmd_set_transaction_status(scb->io_ctx,status);
565 void ahd_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
567 cmd->result &= ~0xFFFF;
568 cmd->result |= status;
572 void ahd_set_scsi_status(struct scb *scb, uint32_t status)
574 ahd_cmd_set_scsi_status(scb->io_ctx, status);
578 uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd)
580 return ((cmd->result >> 16) & CAM_STATUS_MASK);
584 uint32_t ahd_get_transaction_status(struct scb *scb)
586 return (ahd_cmd_get_transaction_status(scb->io_ctx));
590 uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd)
592 return (cmd->result & 0xFFFF);
596 uint32_t ahd_get_scsi_status(struct scb *scb)
598 return (ahd_cmd_get_scsi_status(scb->io_ctx));
602 void ahd_set_transaction_tag(struct scb *scb, int enabled, u_int type)
605 * Nothing to do for linux as the incoming transaction
606 * has no concept of tag/non tagged, etc.
611 u_long ahd_get_transfer_length(struct scb *scb)
613 return (scb->platform_data->xfer_len);
617 int ahd_get_transfer_dir(struct scb *scb)
619 return (scb->io_ctx->sc_data_direction);
623 void ahd_set_residual(struct scb *scb, u_long resid)
625 scsi_set_resid(scb->io_ctx, resid);
629 void ahd_set_sense_residual(struct scb *scb, u_long resid)
631 scb->platform_data->sense_resid = resid;
635 u_long ahd_get_residual(struct scb *scb)
637 return scsi_get_resid(scb->io_ctx);
641 u_long ahd_get_sense_residual(struct scb *scb)
643 return (scb->platform_data->sense_resid);
647 int ahd_perform_autosense(struct scb *scb)
650 * We always perform autosense in Linux.
651 * On other platforms this is set on a
652 * per-transaction basis.
657 static __inline uint32_t
658 ahd_get_sense_bufsize(struct ahd_softc *ahd, struct scb *scb)
660 return (sizeof(struct scsi_sense_data));
664 ahd_notify_xfer_settings_change(struct ahd_softc *ahd,
665 struct ahd_devinfo *devinfo)
667 /* Nothing to do here for linux */
671 ahd_platform_scb_free(struct ahd_softc *ahd, struct scb *scb)
673 ahd->flags &= ~AHD_RESOURCE_SHORTAGE;
676 int ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg);
677 void ahd_platform_free(struct ahd_softc *ahd);
678 void ahd_platform_init(struct ahd_softc *ahd);
679 void ahd_platform_freeze_devq(struct ahd_softc *ahd, struct scb *scb);
682 ahd_freeze_scb(struct scb *scb)
684 if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
685 scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
686 scb->platform_data->dev->qfrozen++;
690 void ahd_platform_set_tags(struct ahd_softc *ahd, struct scsi_device *sdev,
691 struct ahd_devinfo *devinfo, ahd_queue_alg);
692 int ahd_platform_abort_scbs(struct ahd_softc *ahd, int target,
693 char channel, int lun, u_int tag,
694 role_t role, uint32_t status);
696 ahd_linux_isr(int irq, void *dev_id);
697 void ahd_done(struct ahd_softc*, struct scb*);
698 void ahd_send_async(struct ahd_softc *, char channel,
699 u_int target, u_int lun, ac_code);
700 void ahd_print_path(struct ahd_softc *, struct scb *);
703 #define AHD_PCI_CONFIG 1
705 #define AHD_PCI_CONFIG 0
707 #define bootverbose aic79xx_verbose
708 extern uint32_t aic79xx_verbose;
710 #endif /* _AIC79XX_LINUX_H_ */