4 /* cmt.h: Chip Multi-Threading register definitions
6 * Copyright (C) 2004 David S. Miller (davem@redhat.com)
9 /* ASI_CORE_ID - private */
10 #define LP_ID 0x0000000000000010UL
11 #define LP_ID_MAX 0x00000000003f0000UL
12 #define LP_ID_ID 0x000000000000003fUL
14 /* ASI_INTR_ID - private */
15 #define LP_INTR_ID 0x0000000000000000UL
16 #define LP_INTR_ID_ID 0x00000000000003ffUL
18 /* ASI_CESR_ID - private */
19 #define CESR_ID 0x0000000000000040UL
20 #define CESR_ID_ID 0x00000000000000ffUL
22 /* ASI_CORE_AVAILABLE - shared */
23 #define LP_AVAIL 0x0000000000000000UL
24 #define LP_AVAIL_1 0x0000000000000002UL
25 #define LP_AVAIL_0 0x0000000000000001UL
27 /* ASI_CORE_ENABLE_STATUS - shared */
28 #define LP_ENAB_STAT 0x0000000000000010UL
29 #define LP_ENAB_STAT_1 0x0000000000000002UL
30 #define LP_ENAB_STAT_0 0x0000000000000001UL
32 /* ASI_CORE_ENABLE - shared */
33 #define LP_ENAB 0x0000000000000020UL
34 #define LP_ENAB_1 0x0000000000000002UL
35 #define LP_ENAB_0 0x0000000000000001UL
37 /* ASI_CORE_RUNNING - shared */
38 #define LP_RUNNING_RW 0x0000000000000050UL
39 #define LP_RUNNING_W1S 0x0000000000000060UL
40 #define LP_RUNNING_W1C 0x0000000000000068UL
41 #define LP_RUNNING_1 0x0000000000000002UL
42 #define LP_RUNNING_0 0x0000000000000001UL
44 /* ASI_CORE_RUNNING_STAT - shared */
45 #define LP_RUN_STAT 0x0000000000000058UL
46 #define LP_RUN_STAT_1 0x0000000000000002UL
47 #define LP_RUN_STAT_0 0x0000000000000001UL
49 /* ASI_XIR_STEERING - shared */
50 #define LP_XIR_STEER 0x0000000000000030UL
51 #define LP_XIR_STEER_1 0x0000000000000002UL
52 #define LP_XIR_STEER_0 0x0000000000000001UL
54 /* ASI_CMT_ERROR_STEERING - shared */
55 #define CMT_ER_STEER 0x0000000000000040UL
56 #define CMT_ER_STEER_1 0x0000000000000002UL
57 #define CMT_ER_STEER_0 0x0000000000000001UL
59 #endif /* _SPARC64_CMT_H */