2 * $Id: l440gx.c,v 1.18 2005/11/07 11:14:27 gleixner Exp $
4 * BIOS Flash chip on Intel 440GX board.
6 * Bugs this currently does not work under linuxBIOS.
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/map.h>
17 #define PIIXE_IOBASE_RESOURCE 11
19 #define WINDOW_ADDR 0xfff00000
20 #define WINDOW_SIZE 0x00100000
25 #define TRIBUF_PORT (IOBASE+0x37)
26 #define VPP_PORT (IOBASE+0x28)
28 static struct mtd_info *mymtd;
31 /* Is this really the vpp port? */
32 static void l440gx_set_vpp(struct map_info *map, int vpp)
45 static struct map_info l440gx_map = {
46 .name = "L440GX BIOS",
48 .bankwidth = BUSWIDTH,
51 /* FIXME verify that this is the
52 * appripriate code for vpp enable/disable
54 .set_vpp = l440gx_set_vpp
58 static int __init init_l440gx(void)
60 struct pci_dev *dev, *pm_dev;
61 struct resource *pm_iobase;
64 dev = pci_get_device(PCI_VENDOR_ID_INTEL,
65 PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
67 pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
68 PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
72 if (!dev || !pm_dev) {
73 printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
78 l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
80 if (!l440gx_map.virt) {
81 printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
85 simple_map_init(&l440gx_map);
86 printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
88 /* Setup the pm iobase resource
89 * This code should move into some kind of generic bridge
90 * driver but for the moment I'm content with getting the
93 pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
94 if (!(pm_iobase->flags & IORESOURCE_IO)) {
95 pm_iobase->name = "pm iobase";
98 pm_iobase->flags = IORESOURCE_IO;
100 /* Put the current value in the resource */
101 pci_read_config_dword(pm_dev, 0x40, &iobase);
103 pm_iobase->start += iobase & ~1;
104 pm_iobase->end += iobase & ~1;
108 /* Allocate the resource region */
109 if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
112 printk(KERN_WARNING "Could not allocate pm iobase resource\n");
113 iounmap(l440gx_map.virt);
118 iobase = pm_iobase->start;
119 pci_write_config_dword(pm_dev, 0x40, iobase | 1);
123 pci_read_config_word(dev, 0x4e, &word);
125 pci_write_config_word(dev, 0x4e, word);
127 /* Supply write voltage to the chip */
128 l440gx_set_vpp(&l440gx_map, 1);
130 /* Enable the gate on the WE line */
131 outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
133 printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
135 mymtd = do_map_probe("jedec_probe", &l440gx_map);
137 printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
138 mymtd = do_map_probe("map_rom", &l440gx_map);
141 mymtd->owner = THIS_MODULE;
143 add_mtd_device(mymtd);
147 iounmap(l440gx_map.virt);
151 static void __exit cleanup_l440gx(void)
153 del_mtd_device(mymtd);
156 iounmap(l440gx_map.virt);
159 module_init(init_l440gx);
160 module_exit(cleanup_l440gx);
162 MODULE_LICENSE("GPL");
163 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
164 MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");