[POWERPC] Use Freescale pci/pcie common code for 85xx boards
[linux-2.6] / arch / powerpc / platforms / 85xx / mpc85xx_mds.c
1 /*
2  * Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved.
3  *
4  * Author: Andy Fleming <afleming@freescale.com>
5  *
6  * Based on 83xx/mpc8360e_pb.c by:
7  *         Li Yang <LeoLi@freescale.com>
8  *         Yin Olivia <Hong-hua.Yin@freescale.com>
9  *
10  * Description:
11  * MPC85xx MDS board specific routines.
12  *
13  * This program is free software; you can redistribute  it and/or modify it
14  * under  the terms of  the GNU General  Public License as published by the
15  * Free Software Foundation;  either version 2 of the  License, or (at your
16  * option) any later version.
17  */
18
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/errno.h>
23 #include <linux/reboot.h>
24 #include <linux/pci.h>
25 #include <linux/kdev_t.h>
26 #include <linux/major.h>
27 #include <linux/console.h>
28 #include <linux/delay.h>
29 #include <linux/seq_file.h>
30 #include <linux/initrd.h>
31 #include <linux/module.h>
32 #include <linux/fsl_devices.h>
33
34 #include <asm/of_device.h>
35 #include <asm/of_platform.h>
36 #include <asm/system.h>
37 #include <asm/atomic.h>
38 #include <asm/time.h>
39 #include <asm/io.h>
40 #include <asm/machdep.h>
41 #include <asm/bootinfo.h>
42 #include <asm/pci-bridge.h>
43 #include <asm/mpc85xx.h>
44 #include <asm/irq.h>
45 #include <mm/mmu_decl.h>
46 #include <asm/prom.h>
47 #include <asm/udbg.h>
48 #include <sysdev/fsl_soc.h>
49 #include <sysdev/fsl_pci.h>
50 #include <asm/qe.h>
51 #include <asm/qe_ic.h>
52 #include <asm/mpic.h>
53
54 #include "mpc85xx.h"
55
56 #undef DEBUG
57 #ifdef DEBUG
58 #define DBG(fmt...) udbg_printf(fmt)
59 #else
60 #define DBG(fmt...)
61 #endif
62
63 /* ************************************************************************
64  *
65  * Setup the architecture
66  *
67  */
68 static void __init mpc85xx_mds_setup_arch(void)
69 {
70         struct device_node *np;
71         static u8 *bcsr_regs = NULL;
72
73         if (ppc_md.progress)
74                 ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
75
76         np = of_find_node_by_type(NULL, "cpu");
77         if (np != NULL) {
78                 const unsigned int *fp =
79                     of_get_property(np, "clock-frequency", NULL);
80                 if (fp != NULL)
81                         loops_per_jiffy = *fp / HZ;
82                 else
83                         loops_per_jiffy = 50000000 / HZ;
84                 of_node_put(np);
85         }
86
87         /* Map BCSR area */
88         np = of_find_node_by_name(NULL, "bcsr");
89         if (np != NULL) {
90                 struct resource res;
91
92                 of_address_to_resource(np, 0, &res);
93                 bcsr_regs = ioremap(res.start, res.end - res.start +1);
94                 of_node_put(np);
95         }
96
97 #ifdef CONFIG_PCI
98         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
99                 fsl_add_bridge(np, 1);
100         of_node_put(np);
101 #endif
102
103 #ifdef CONFIG_QUICC_ENGINE
104         if ((np = of_find_node_by_name(NULL, "qe")) != NULL) {
105                 qe_reset();
106                 of_node_put(np);
107         }
108
109         if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
110                 struct device_node *ucc = NULL;
111
112                 par_io_init(np);
113                 of_node_put(np);
114
115                 for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;)
116                         par_io_of_config(ucc);
117
118                 of_node_put(ucc);
119         }
120
121         if (bcsr_regs) {
122                 u8 bcsr_phy;
123
124                 /* Reset the Ethernet PHY */
125                 bcsr_phy = in_be8(&bcsr_regs[9]);
126                 bcsr_phy &= ~0x20;
127                 out_be8(&bcsr_regs[9], bcsr_phy);
128
129                 udelay(1000);
130
131                 bcsr_phy = in_be8(&bcsr_regs[9]);
132                 bcsr_phy |= 0x20;
133                 out_be8(&bcsr_regs[9], bcsr_phy);
134
135                 iounmap(bcsr_regs);
136         }
137
138 #endif  /* CONFIG_QUICC_ENGINE */
139 }
140
141 static struct of_device_id mpc85xx_ids[] = {
142         { .type = "soc", },
143         { .compatible = "soc", },
144         { .type = "qe", },
145         { .type = "mdio", },
146         {},
147 };
148
149 static int __init mpc85xx_publish_devices(void)
150 {
151         if (!machine_is(mpc85xx_mds))
152                 return 0;
153
154         /* Publish the QE devices */
155         of_platform_bus_probe(NULL,mpc85xx_ids,NULL);
156
157         return 0;
158 }
159 device_initcall(mpc85xx_publish_devices);
160
161 static void __init mpc85xx_mds_pic_init(void)
162 {
163         struct mpic *mpic;
164         struct resource r;
165         struct device_node *np = NULL;
166
167         np = of_find_node_by_type(NULL, "open-pic");
168         if (!np)
169                 return;
170
171         if (of_address_to_resource(np, 0, &r)) {
172                 printk(KERN_ERR "Failed to map mpic register space\n");
173                 of_node_put(np);
174                 return;
175         }
176
177         mpic = mpic_alloc(np, r.start,
178                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
179                         0, 256, " OpenPIC  ");
180         BUG_ON(mpic == NULL);
181         of_node_put(np);
182
183         mpic_init(mpic);
184
185 #ifdef CONFIG_QUICC_ENGINE
186         np = of_find_node_by_type(NULL, "qeic");
187         if (!np)
188                 return;
189
190         qe_ic_init(np, 0);
191         of_node_put(np);
192 #endif                          /* CONFIG_QUICC_ENGINE */
193 }
194
195 static int __init mpc85xx_mds_probe(void)
196 {
197         unsigned long root = of_get_flat_dt_root();
198
199         return of_flat_dt_is_compatible(root, "MPC85xxMDS");
200 }
201
202 define_machine(mpc85xx_mds) {
203         .name           = "MPC85xx MDS",
204         .probe          = mpc85xx_mds_probe,
205         .setup_arch     = mpc85xx_mds_setup_arch,
206         .init_IRQ       = mpc85xx_mds_pic_init,
207         .get_irq        = mpic_get_irq,
208         .restart        = mpc85xx_restart,
209         .calibrate_decr = generic_calibrate_decr,
210         .progress       = udbg_progress,
211 };