4 * Derived from ivtv-gpio.c
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
24 #include "cx18-driver.h"
26 #include "cx18-cards.h"
27 #include "cx18-gpio.h"
28 #include "tuner-xc2028.h"
30 /********************* GPIO stuffs *********************/
33 #define CX18_REG_GPIO_IN 0xc72010
34 #define CX18_REG_GPIO_OUT1 0xc78100
35 #define CX18_REG_GPIO_DIR1 0xc78108
36 #define CX18_REG_GPIO_OUT2 0xc78104
37 #define CX18_REG_GPIO_DIR2 0xc7810c
40 * HVR-1600 GPIO pins, courtesy of Hauppauge:
42 * gpio0: zilog ir process reset pin
43 * gpio1: zilog programming pin (you should never use this)
44 * gpio12: cx24227 reset pin
45 * gpio13: cs5345 reset pin
48 static void gpio_write(struct cx18 *cx)
50 u32 dir_lo = cx->gpio_dir & 0xffff;
51 u32 val_lo = cx->gpio_val & 0xffff;
52 u32 dir_hi = cx->gpio_dir >> 16;
53 u32 val_hi = cx->gpio_val >> 16;
55 cx18_write_reg_expect(cx, dir_lo << 16,
56 CX18_REG_GPIO_DIR1, ~dir_lo, dir_lo);
57 cx18_write_reg_expect(cx, (dir_lo << 16) | val_lo,
58 CX18_REG_GPIO_OUT1, val_lo, dir_lo);
59 cx18_write_reg_expect(cx, dir_hi << 16,
60 CX18_REG_GPIO_DIR2, ~dir_hi, dir_hi);
61 cx18_write_reg_expect(cx, (dir_hi << 16) | val_hi,
62 CX18_REG_GPIO_OUT2, val_hi, dir_hi);
65 void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
67 const struct cx18_gpio_i2c_slave_reset *p;
69 p = &cx->card->gpio_i2c_slave_reset;
71 if ((p->active_lo_mask | p->active_hi_mask) == 0)
74 /* Assuming that the masks are a subset of the bits in gpio_dir */
77 mutex_lock(&cx->gpio_lock);
79 (cx->gpio_val | p->active_hi_mask) & ~(p->active_lo_mask);
81 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
85 (cx->gpio_val | p->active_lo_mask) & ~(p->active_hi_mask);
87 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
88 mutex_unlock(&cx->gpio_lock);
91 void cx18_reset_ir_gpio(void *data)
93 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
94 const struct cx18_gpio_i2c_slave_reset *p;
96 p = &cx->card->gpio_i2c_slave_reset;
98 if (p->ir_reset_mask == 0)
101 CX18_DEBUG_INFO("Resetting IR microcontroller\n");
104 Assert timing for the Z8F0811 on HVR-1600 boards:
105 1. Assert RESET for min of 4 clock cycles at 18.432 MHz to initiate
106 2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock cycles
107 (6,601,085 nanoseconds ~= 7 milliseconds)
108 3. DBG pin must be high before chip exits reset for normal operation.
109 DBG is open drain and hopefully pulled high since we don't
110 normally drive it (GPIO 1?) for the HVR-1600
111 4. Z8F0811 won't exit reset until RESET is deasserted
113 mutex_lock(&cx->gpio_lock);
114 cx->gpio_val = cx->gpio_val & ~p->ir_reset_mask;
116 mutex_unlock(&cx->gpio_lock);
117 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
120 Zilog comes out of reset, loads reset vector address and executes
121 from there. Required recovery delay unknown.
123 mutex_lock(&cx->gpio_lock);
124 cx->gpio_val = cx->gpio_val | p->ir_reset_mask;
126 mutex_unlock(&cx->gpio_lock);
127 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
129 EXPORT_SYMBOL(cx18_reset_ir_gpio);
130 /* This symbol is exported for use by an infrared module for the IR-blaster */
132 void cx18_gpio_init(struct cx18 *cx)
134 mutex_lock(&cx->gpio_lock);
135 cx->gpio_dir = cx->card->gpio_init.direction;
136 cx->gpio_val = cx->card->gpio_init.initial_value;
138 if (cx->card->tuners[0].tuner == TUNER_XC2028) {
139 cx->gpio_dir |= 1 << cx->card->xceive_pin;
140 cx->gpio_val |= 1 << cx->card->xceive_pin;
143 if (cx->gpio_dir == 0) {
144 mutex_unlock(&cx->gpio_lock);
148 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n",
149 cx18_read_reg(cx, CX18_REG_GPIO_DIR1),
150 cx18_read_reg(cx, CX18_REG_GPIO_DIR2),
151 cx18_read_reg(cx, CX18_REG_GPIO_OUT1),
152 cx18_read_reg(cx, CX18_REG_GPIO_OUT2));
155 mutex_unlock(&cx->gpio_lock);
158 /* Xceive tuner reset function */
159 int cx18_reset_tuner_gpio(void *dev, int component, int cmd, int value)
161 struct i2c_algo_bit_data *algo = dev;
162 struct cx18_i2c_algo_callback_data *cb_data = algo->data;
163 struct cx18 *cx = cb_data->cx;
165 if (cmd != XC2028_TUNER_RESET)
167 CX18_DEBUG_INFO("Resetting tuner\n");
169 mutex_lock(&cx->gpio_lock);
170 cx->gpio_val &= ~(1 << cx->card->xceive_pin);
172 mutex_unlock(&cx->gpio_lock);
173 schedule_timeout_interruptible(msecs_to_jiffies(1));
175 mutex_lock(&cx->gpio_lock);
176 cx->gpio_val |= 1 << cx->card->xceive_pin;
178 mutex_unlock(&cx->gpio_lock);
179 schedule_timeout_interruptible(msecs_to_jiffies(1));
183 int cx18_gpio(struct cx18 *cx, unsigned int command, void *arg)
185 struct v4l2_routing *route = arg;
189 case VIDIOC_INT_S_AUDIO_ROUTING:
190 if (route->input > 2)
192 mask = cx->card->gpio_audio_input.mask;
193 switch (route->input) {
195 data = cx->card->gpio_audio_input.tuner;
198 data = cx->card->gpio_audio_input.linein;
202 data = cx->card->gpio_audio_input.radio;
211 mutex_lock(&cx->gpio_lock);
212 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask);
214 mutex_unlock(&cx->gpio_lock);