2 * Low-Level PCI Access for i386 machines.
4 * (c) 1999 Martin Mares <mj@ucw.cz>
10 #define DBG(x...) printk(x)
15 #define PCI_PROBE_BIOS 0x0001
16 #define PCI_PROBE_CONF1 0x0002
17 #define PCI_PROBE_CONF2 0x0004
18 #define PCI_PROBE_MMCONF 0x0008
19 #define PCI_PROBE_MASK 0x000f
21 #define PCI_NO_SORT 0x0100
22 #define PCI_BIOS_SORT 0x0200
23 #define PCI_NO_CHECKS 0x0400
24 #define PCI_USE_PIRQ_MASK 0x0800
25 #define PCI_ASSIGN_ROMS 0x1000
26 #define PCI_BIOS_IRQ_SCAN 0x2000
27 #define PCI_ASSIGN_ALL_BUSSES 0x4000
29 extern unsigned int pci_probe;
30 extern unsigned long pirq_table_addr;
34 extern unsigned int pcibios_max_latency;
36 void pcibios_resource_survey(void);
37 int pcibios_enable_resources(struct pci_dev *, int);
41 extern int pcibios_last_bus;
42 extern struct pci_bus *pci_root_bus;
43 extern struct pci_ops pci_root_ops;
48 u8 bus, devfn; /* Bus, device and function */
50 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
51 u16 bitmap; /* Available IRQs */
52 } __attribute__((packed)) irq[4];
53 u8 slot; /* Slot number, 0=onboard */
55 } __attribute__((packed));
57 struct irq_routing_table {
58 u32 signature; /* PIRQ_SIGNATURE should be here */
59 u16 version; /* PIRQ_VERSION */
60 u16 size; /* Table size in bytes */
61 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
62 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
63 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
64 u32 miniport_data; /* Crap */
66 u8 checksum; /* Modulo 256 checksum must give zero */
67 struct irq_info slots[0];
68 } __attribute__((packed));
70 extern unsigned int pcibios_irq_mask;
72 extern int pcibios_scanned;
73 extern spinlock_t pci_config_lock;
75 extern int (*pcibios_enable_irq)(struct pci_dev *dev);
76 extern void (*pcibios_disable_irq)(struct pci_dev *dev);