2 * arch/sh/kernel/cpu/sh3/entry.S
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2003 - 2006 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/sys.h>
12 #include <linux/errno.h>
13 #include <linux/linkage.h>
14 #include <asm/asm-offsets.h>
15 #include <asm/thread_info.h>
16 #include <asm/unistd.h>
17 #include <cpu/mmu_context.h>
19 #include <asm/cache.h>
22 ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
23 ! to be jumped is too far, but it causes illegal slot exception.
26 * entry.S contains the system-call and fault low-level handling routines.
27 * This also contains the timer-interrupt handler, as well as all interrupts
28 * and faults that can result in a task-switch.
30 * NOTE: This code handles signal-recognition, which happens every time
31 * after a timer-interrupt and after each system call.
33 * NOTE: This code uses a convention that instructions in the delay slot
34 * of a transfer-control instruction are indented by an extra space, thus:
36 * jmp @k0 ! control-transfer instruction
37 * ldc k1, ssr ! delay slot
39 * Stack layout in 'ret_from_syscall':
40 * ptrace needs to have all regs on the stack.
41 * if the order here is changed, it needs to be
42 * updated in ptrace.c and ptrace.h
56 #if defined(CONFIG_KGDB)
57 NMI_VEC = 0x1c0 ! Must catch early for debounce
60 /* Offsets to the stack */
61 OFF_R0 = 0 /* Return value. New ABI also arg4 */
62 OFF_R1 = 4 /* New ABI: arg5 */
63 OFF_R2 = 8 /* New ABI: arg6 */
64 OFF_R3 = 12 /* New ABI: syscall_nr */
65 OFF_R4 = 16 /* New ABI: arg0 */
66 OFF_R5 = 20 /* New ABI: arg1 */
67 OFF_R6 = 24 /* New ABI: arg2 */
68 OFF_R7 = 28 /* New ABI: arg3 */
81 #define g_imask r6 /* r6_bank1 */
82 #define k_g_imask r6_bank /* r6_bank1 */
83 #define current r7 /* r7_bank1 */
85 #include <asm/entry-macros.S>
88 * Kernel mode register usage:
91 * k2 scratch (Exception code)
92 * k3 scratch (Return address)
95 * k6 Global Interrupt Mask (0--15 << 4)
96 * k7 CURRENT_THREAD_INFO (pointer to current thread info)
100 ! TLB Miss / Initial Page write exception handling
102 ! TLB hits, but the access violate the protection.
103 ! It can be valid access, such as stack grow and/or C-O-W.
106 ! Find the pmd/pte entry and loadtlb
107 ! If it's not found, cause address error (SEGV)
109 ! Although this could be written in assembly language (and it'd be faster),
110 ! this first version depends *much* on C implementation.
113 #if defined(CONFIG_MMU)
120 ENTRY(tlb_miss_store)
125 ENTRY(initial_page_write)
130 ENTRY(tlb_protection_violation_load)
135 ENTRY(tlb_protection_violation_store)
162 2: .long __do_page_fault
163 3: .long do_page_fault
166 ENTRY(address_error_load)
168 mov #0,r5 ! writeaccess = 0
171 ENTRY(address_error_store)
173 mov #1,r5 ! writeaccess = 1
178 mov.l @r0, r6 ! address
185 2: .long do_address_error
186 #endif /* CONFIG_MMU */
188 #if defined(CONFIG_SH_STANDARD_BIOS)
189 /* Unwind the stack and jmp to the debug entry */
190 ENTRY(sh_bios_handler)
195 lds k2, pr ! restore pr
204 2: .long gdb_vbr_vector
205 #endif /* CONFIG_SH_STANDARD_BIOS */
208 ! - restore r0, r1, r2, r3, r4, r5, r6, r7 from the stack
210 ! - restore r8, r9, r10, r11, r12, r13, r14, r15 from the stack
211 ! - restore spc, pr*, ssr, gbr, mach, macl, skip default tra
212 ! k2 returns original pr
213 ! k3 returns original sr
214 ! k4 returns original stack pointer
215 ! r8 passes SR bitmask, overwritten with restored data on return
217 ! BL=0 on entry, on exit BL=1 (depending on r8).
240 mov.l @r15+, k4 ! original stack pointer
242 mov.l @r15+, k2 ! original PR
243 mov.l @r15+, k3 ! original SR
248 add #4, r15 ! Skip syscall number
255 lds k2, pr ! restore pr
258 mov.l @r15+, k0 ! DSP mode marker
260 cmp/eq k0, k1 ! Do we have a DSP stack frame?
263 stc sr, k0 ! Enable CPU DSP mode
264 or k1, k0 ! (within kernel it may be disabled)
266 mov r2, k0 ! Backup r2
268 ! Restore DSP registers from stack
287 mov k0, r2 ! Restore r2
291 ! Calculate new SR value
292 mov k3, k2 ! original SR value
296 and k1, k2 ! Mask original SR value
298 mov k3, k0 ! Calculate IMASK-bits
306 6: or k0, k2 ! Set the IMASK-bits
309 #if defined(CONFIG_KGDB)
320 5: .long 0x00001000 ! DSP
326 ! common exception handler
327 #include "../../entry-common.S"
329 ! Exception Vector Base
331 ! Should be aligned page boundary.
337 ! 0x100: General exception vector
341 #ifndef CONFIG_CPU_SUBTYPE_SHX3
343 sts pr, k3 ! save original pr value in k3
348 ! Is EXPEVT larger than 0x800?
354 ! then add 0x580 (k2 is 0xd80 or 0xda0)
360 ! Setup stack and save DSP context (k0 contains original r15 on return)
361 bsr prepare_stack_save_dsp
364 ! Save registers / Switch to bank 0
365 mov k4, k2 ! keep vector in k2
366 mov.l 1f, k4 ! SR bits to clear in k4
367 bsr save_regs ! needs original pr value in k3
370 bra handle_exception_special
377 ! prepare_stack_save_dsp()
379 ! - switch to kernel stack
381 ! k0 returns original sp (after roll back)
385 prepare_stack_save_dsp:
387 ! Check for roll back gRB (User and Kernel)
395 cmp/hs k0, k1 ! test k1 (saved PC) >= k0 (saved r0)
401 ldc k0, spc ! PC = saved r0 + r15 - 2
402 2: mov k1, r15 ! SP = r1
405 ! Switch to kernel stack if needed
406 stc ssr, k0 ! Is it from kernel space?
407 shll k0 ! Check MD bit (bit30) by shifting it into...
408 shll k0 ! ...the T bit
409 bt/s 1f ! It's a kernel to kernel transition.
410 mov r15, k0 ! save original stack to k0
411 /* User space to kernel */
412 mov #(THREAD_SIZE >> 10), k1
413 shll8 k1 ! k1 := THREAD_SIZE
416 mov k1, r15 ! change to kernel stack
420 ! Save DSP context if needed
423 shll8 k2 ! DSP=1 (0x00001000)
424 tst k2, k1 ! Check if in DSP mode (passed in k2)
426 mov #0, k1 ! Set marker for no stack frame
428 mov k2, k1 ! Save has-frame marker
430 ! Save DSP registers on stack
441 ! GAS is broken, does not generate correct "movs.l Ds,@-As" instr.
443 ! FIXME: Make sure that this is still the case with newer toolchains,
444 ! as we're not at all interested in supporting ancient toolchains at
445 ! this point. -- PFM.
448 .word 0xf653 ! movs.l a1, @-r2
449 .word 0xf6f3 ! movs.l a0g, @-r2
450 .word 0xf6d3 ! movs.l a1g, @-r2
451 .word 0xf6c3 ! movs.l m0, @-r2
452 .word 0xf6e3 ! movs.l m1, @-r2
456 mov.l k1, @-r15 ! Push DSP mode marker onto stack
461 ! 0x400: Instruction and Data TLB miss exception vector
465 sts pr, k3 ! save original pr value in k3
468 mova exception_data, k0
470 ! Setup stack and save DSP context (k0 contains original r15 on return)
471 bsr prepare_stack_save_dsp
474 ! Save registers / Switch to bank 0
475 mov.l 5f, k2 ! vector register address
476 mov.l 1f, k4 ! SR bits to clear in k4
477 bsr save_regs ! needs original pr value in k3
478 mov.l @k2, k2 ! read out vector and keep in k2
480 handle_exception_special:
481 ! Setup return address and jump to exception handler
482 mov.l 7f, r9 ! fetch return address
483 stc r2_bank, r0 ! k2 (vector)
487 mov.l @(r0, r10), r10
489 lds r9, pr ! put return address in pr
491 .align L1_CACHE_SHIFT
494 ! - save default tra, macl, mach, gbr, ssr, pr* and spc on the stack
495 ! - save r15*, r14, r13, r12, r11, r10, r9, r8 on the stack
497 ! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack
498 ! k0 contains original stack pointer*
500 ! k3 passes original pr*
501 ! k4 passes SR bitmask
502 ! BL=1 on entry, on exit BL=0.
506 mov.l k1, @-r15 ! set TRA (default: -1)
511 mov.l k3, @-r15 ! original pr in k3
514 mov.l k0, @-r15 ! original stack pointer in k0
523 mov.l 0f, k3 ! SR bits to set in k3
528 ! - modify SR for bank switch
529 ! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack
530 ! k3 passes bits to set in SR
531 ! k4 passes bits to clear in SR
550 ! 0x600: Interrupt / NMI vector
553 ENTRY(handle_interrupt)
554 #if defined(CONFIG_KGDB)
556 ! Debounce (filter nested NMI)
570 #endif /* defined(CONFIG_KGDB) */
571 sts pr, k3 ! save original pr value in k3
572 mova exception_data, k0
574 ! Setup stack and save DSP context (k0 contains original r15 on return)
575 bsr prepare_stack_save_dsp
578 ! Save registers / Switch to bank 0
579 mov.l 1f, k4 ! SR bits to clear in k4
580 bsr save_regs ! needs original pr value in k3
581 mov #-1, k2 ! default vector kept in k2
583 ! Setup return address and jump to do_IRQ
584 mov.l 4f, r9 ! fetch return address
585 lds r9, pr ! put return address in pr
588 mov.l @r4, r4 ! pass INTEVT vector as arg0
590 mov r15, r5 ! pass saved registers as arg1
592 ENTRY(exception_none)
596 .align L1_CACHE_SHIFT
598 0: .long 0x000080f0 ! FD=1, IMASK=15
599 1: .long 0xcfffffff ! RB=0, BL=0
602 4: .long ret_from_irq
604 6: .long exception_handling_table
605 7: .long ret_from_exception