1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/pci.h>
12 #include <linux/tcp.h>
15 #include <linux/if_ether.h>
16 #include <linux/highmem.h>
17 #include "net_driver.h"
21 #include "workarounds.h"
24 * TX descriptor ring full threshold
26 * The tx_queue descriptor ring fill-level must fall below this value
27 * before we restart the netif queue
29 #define EFX_NETDEV_TX_THRESHOLD(_tx_queue) \
30 (_tx_queue->efx->type->txd_ring_mask / 2u)
32 /* We want to be able to nest calls to netif_stop_queue(), since each
33 * channel can have an individual stop on the queue.
35 void efx_stop_queue(struct efx_nic *efx)
37 spin_lock_bh(&efx->netif_stop_lock);
38 EFX_TRACE(efx, "stop TX queue\n");
40 atomic_inc(&efx->netif_stop_count);
41 netif_stop_queue(efx->net_dev);
43 spin_unlock_bh(&efx->netif_stop_lock);
46 /* Wake netif's TX queue
47 * We want to be able to nest calls to netif_stop_queue(), since each
48 * channel can have an individual stop on the queue.
50 void efx_wake_queue(struct efx_nic *efx)
53 if (atomic_dec_and_lock(&efx->netif_stop_count,
54 &efx->netif_stop_lock)) {
55 EFX_TRACE(efx, "waking TX queue\n");
56 netif_wake_queue(efx->net_dev);
57 spin_unlock(&efx->netif_stop_lock);
62 static void efx_dequeue_buffer(struct efx_tx_queue *tx_queue,
63 struct efx_tx_buffer *buffer)
65 if (buffer->unmap_len) {
66 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
67 dma_addr_t unmap_addr = (buffer->dma_addr + buffer->len -
69 if (buffer->unmap_single)
70 pci_unmap_single(pci_dev, unmap_addr, buffer->unmap_len,
73 pci_unmap_page(pci_dev, unmap_addr, buffer->unmap_len,
75 buffer->unmap_len = 0;
76 buffer->unmap_single = false;
80 dev_kfree_skb_any((struct sk_buff *) buffer->skb);
82 EFX_TRACE(tx_queue->efx, "TX queue %d transmission id %x "
83 "complete\n", tx_queue->queue, read_ptr);
88 * struct efx_tso_header - a DMA mapped buffer for packet headers
89 * @next: Linked list of free ones.
90 * The list is protected by the TX queue lock.
91 * @dma_unmap_len: Length to unmap for an oversize buffer, or 0.
92 * @dma_addr: The DMA address of the header below.
94 * This controls the memory used for a TSO header. Use TSOH_DATA()
95 * to find the packet header data. Use TSOH_SIZE() to calculate the
96 * total size required for a given packet header length. TSO headers
97 * in the free list are exactly %TSOH_STD_SIZE bytes in size.
99 struct efx_tso_header {
101 struct efx_tso_header *next;
107 static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
108 struct sk_buff *skb);
109 static void efx_fini_tso(struct efx_tx_queue *tx_queue);
110 static void efx_tsoh_heap_free(struct efx_tx_queue *tx_queue,
111 struct efx_tso_header *tsoh);
113 static void efx_tsoh_free(struct efx_tx_queue *tx_queue,
114 struct efx_tx_buffer *buffer)
117 if (likely(!buffer->tsoh->unmap_len)) {
118 buffer->tsoh->next = tx_queue->tso_headers_free;
119 tx_queue->tso_headers_free = buffer->tsoh;
121 efx_tsoh_heap_free(tx_queue, buffer->tsoh);
129 * Add a socket buffer to a TX queue
131 * This maps all fragments of a socket buffer for DMA and adds them to
132 * the TX queue. The queue's insert pointer will be incremented by
133 * the number of fragments in the socket buffer.
135 * If any DMA mapping fails, any mapped fragments will be unmapped,
136 * the queue's insert pointer will be restored to its original value.
138 * Returns NETDEV_TX_OK or NETDEV_TX_BUSY
139 * You must hold netif_tx_lock() to call this function.
141 static int efx_enqueue_skb(struct efx_tx_queue *tx_queue,
144 struct efx_nic *efx = tx_queue->efx;
145 struct pci_dev *pci_dev = efx->pci_dev;
146 struct efx_tx_buffer *buffer;
147 skb_frag_t *fragment;
150 unsigned int len, unmap_len = 0, fill_level, insert_ptr, misalign;
151 dma_addr_t dma_addr, unmap_addr = 0;
152 unsigned int dma_len;
155 int rc = NETDEV_TX_OK;
157 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
159 if (skb_shinfo((struct sk_buff *)skb)->gso_size)
160 return efx_enqueue_skb_tso(tx_queue, skb);
162 /* Get size of the initial fragment */
163 len = skb_headlen(skb);
165 /* Pad if necessary */
166 if (EFX_WORKAROUND_15592(efx) && skb->len <= 32) {
167 EFX_BUG_ON_PARANOID(skb->data_len);
169 if (skb_pad(skb, len - skb->len))
173 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
174 q_space = efx->type->txd_ring_mask - 1 - fill_level;
176 /* Map for DMA. Use pci_map_single rather than pci_map_page
177 * since this is more efficient on machines with sparse
181 dma_addr = pci_map_single(pci_dev, skb->data, len, PCI_DMA_TODEVICE);
183 /* Process all fragments */
185 if (unlikely(pci_dma_mapping_error(pci_dev, dma_addr)))
188 /* Store fields for marking in the per-fragment final
191 unmap_addr = dma_addr;
193 /* Add to TX queue, splitting across DMA boundaries */
195 if (unlikely(q_space-- <= 0)) {
196 /* It might be that completions have
197 * happened since the xmit path last
198 * checked. Update the xmit path's
199 * copy of read_count.
202 /* This memory barrier protects the
203 * change of stopped from the access
206 tx_queue->old_read_count =
207 *(volatile unsigned *)
208 &tx_queue->read_count;
209 fill_level = (tx_queue->insert_count
210 - tx_queue->old_read_count);
211 q_space = (efx->type->txd_ring_mask - 1 -
213 if (unlikely(q_space-- <= 0))
219 insert_ptr = (tx_queue->insert_count &
220 efx->type->txd_ring_mask);
221 buffer = &tx_queue->buffer[insert_ptr];
222 efx_tsoh_free(tx_queue, buffer);
223 EFX_BUG_ON_PARANOID(buffer->tsoh);
224 EFX_BUG_ON_PARANOID(buffer->skb);
225 EFX_BUG_ON_PARANOID(buffer->len);
226 EFX_BUG_ON_PARANOID(!buffer->continuation);
227 EFX_BUG_ON_PARANOID(buffer->unmap_len);
229 dma_len = (((~dma_addr) & efx->type->tx_dma_mask) + 1);
230 if (likely(dma_len > len))
233 misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
234 if (misalign && dma_len + misalign > 512)
235 dma_len = 512 - misalign;
237 /* Fill out per descriptor fields */
238 buffer->len = dma_len;
239 buffer->dma_addr = dma_addr;
242 ++tx_queue->insert_count;
245 /* Transfer ownership of the unmapping to the final buffer */
246 buffer->unmap_single = unmap_single;
247 buffer->unmap_len = unmap_len;
250 /* Get address and size of next fragment */
251 if (i >= skb_shinfo(skb)->nr_frags)
253 fragment = &skb_shinfo(skb)->frags[i];
254 len = fragment->size;
255 page = fragment->page;
256 page_offset = fragment->page_offset;
259 unmap_single = false;
260 dma_addr = pci_map_page(pci_dev, page, page_offset, len,
264 /* Transfer ownership of the skb to the final buffer */
266 buffer->continuation = false;
268 /* Pass off to hardware */
269 falcon_push_buffers(tx_queue);
274 EFX_ERR_RL(efx, " TX queue %d could not map skb with %d bytes %d "
275 "fragments for DMA\n", tx_queue->queue, skb->len,
276 skb_shinfo(skb)->nr_frags + 1);
278 /* Mark the packet as transmitted, and free the SKB ourselves */
279 dev_kfree_skb_any((struct sk_buff *)skb);
285 if (tx_queue->stopped == 1)
289 /* Work backwards until we hit the original insert pointer value */
290 while (tx_queue->insert_count != tx_queue->write_count) {
291 --tx_queue->insert_count;
292 insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
293 buffer = &tx_queue->buffer[insert_ptr];
294 efx_dequeue_buffer(tx_queue, buffer);
298 /* Free the fragment we were mid-way through pushing */
301 pci_unmap_single(pci_dev, unmap_addr, unmap_len,
304 pci_unmap_page(pci_dev, unmap_addr, unmap_len,
311 /* Remove packets from the TX queue
313 * This removes packets from the TX queue, up to and including the
316 static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
319 struct efx_nic *efx = tx_queue->efx;
320 unsigned int stop_index, read_ptr;
321 unsigned int mask = tx_queue->efx->type->txd_ring_mask;
323 stop_index = (index + 1) & mask;
324 read_ptr = tx_queue->read_count & mask;
326 while (read_ptr != stop_index) {
327 struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
328 if (unlikely(buffer->len == 0)) {
329 EFX_ERR(tx_queue->efx, "TX queue %d spurious TX "
330 "completion id %x\n", tx_queue->queue,
332 efx_schedule_reset(efx, RESET_TYPE_TX_SKIP);
336 efx_dequeue_buffer(tx_queue, buffer);
337 buffer->continuation = true;
340 ++tx_queue->read_count;
341 read_ptr = tx_queue->read_count & mask;
345 /* Initiate a packet transmission on the specified TX queue.
346 * Note that returning anything other than NETDEV_TX_OK will cause the
347 * OS to free the skb.
349 * This function is split out from efx_hard_start_xmit to allow the
350 * loopback test to direct packets via specific TX queues. It is
351 * therefore a non-static inline, so as not to penalise performance
352 * for non-loopback transmissions.
354 * Context: netif_tx_lock held
356 inline int efx_xmit(struct efx_nic *efx,
357 struct efx_tx_queue *tx_queue, struct sk_buff *skb)
361 /* Map fragments for DMA and add to TX queue */
362 rc = efx_enqueue_skb(tx_queue, skb);
366 /* Initiate a packet transmission. We use one channel per CPU
367 * (sharing when we have more CPUs than channels). On Falcon, the TX
368 * completion events will be directed back to the CPU that transmitted
369 * the packet, which should be cache-efficient.
371 * Context: non-blocking.
372 * Note that returning anything other than NETDEV_TX_OK will cause the
373 * OS to free the skb.
375 int efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
377 struct efx_nic *efx = netdev_priv(net_dev);
378 struct efx_tx_queue *tx_queue;
380 if (unlikely(efx->port_inhibited))
381 return NETDEV_TX_BUSY;
383 if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
384 tx_queue = &efx->tx_queue[EFX_TX_QUEUE_OFFLOAD_CSUM];
386 tx_queue = &efx->tx_queue[EFX_TX_QUEUE_NO_CSUM];
388 return efx_xmit(efx, tx_queue, skb);
391 void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
394 struct efx_nic *efx = tx_queue->efx;
396 EFX_BUG_ON_PARANOID(index > efx->type->txd_ring_mask);
398 efx_dequeue_buffers(tx_queue, index);
400 /* See if we need to restart the netif queue. This barrier
401 * separates the update of read_count from the test of
404 if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) {
405 fill_level = tx_queue->insert_count - tx_queue->read_count;
406 if (fill_level < EFX_NETDEV_TX_THRESHOLD(tx_queue)) {
407 EFX_BUG_ON_PARANOID(!efx_dev_registered(efx));
409 /* Do this under netif_tx_lock(), to avoid racing
410 * with efx_xmit(). */
411 netif_tx_lock(efx->net_dev);
412 if (tx_queue->stopped) {
413 tx_queue->stopped = 0;
416 netif_tx_unlock(efx->net_dev);
421 int efx_probe_tx_queue(struct efx_tx_queue *tx_queue)
423 struct efx_nic *efx = tx_queue->efx;
424 unsigned int txq_size;
427 EFX_LOG(efx, "creating TX queue %d\n", tx_queue->queue);
429 /* Allocate software ring */
430 txq_size = (efx->type->txd_ring_mask + 1) * sizeof(*tx_queue->buffer);
431 tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
432 if (!tx_queue->buffer)
434 for (i = 0; i <= efx->type->txd_ring_mask; ++i)
435 tx_queue->buffer[i].continuation = true;
437 /* Allocate hardware ring */
438 rc = falcon_probe_tx(tx_queue);
445 kfree(tx_queue->buffer);
446 tx_queue->buffer = NULL;
450 void efx_init_tx_queue(struct efx_tx_queue *tx_queue)
452 EFX_LOG(tx_queue->efx, "initialising TX queue %d\n", tx_queue->queue);
454 tx_queue->insert_count = 0;
455 tx_queue->write_count = 0;
456 tx_queue->read_count = 0;
457 tx_queue->old_read_count = 0;
458 BUG_ON(tx_queue->stopped);
460 /* Set up TX descriptor ring */
461 falcon_init_tx(tx_queue);
464 void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
466 struct efx_tx_buffer *buffer;
468 if (!tx_queue->buffer)
471 /* Free any buffers left in the ring */
472 while (tx_queue->read_count != tx_queue->write_count) {
473 buffer = &tx_queue->buffer[tx_queue->read_count &
474 tx_queue->efx->type->txd_ring_mask];
475 efx_dequeue_buffer(tx_queue, buffer);
476 buffer->continuation = true;
479 ++tx_queue->read_count;
483 void efx_fini_tx_queue(struct efx_tx_queue *tx_queue)
485 EFX_LOG(tx_queue->efx, "shutting down TX queue %d\n", tx_queue->queue);
487 /* Flush TX queue, remove descriptor ring */
488 falcon_fini_tx(tx_queue);
490 efx_release_tx_buffers(tx_queue);
492 /* Free up TSO header cache */
493 efx_fini_tso(tx_queue);
495 /* Release queue's stop on port, if any */
496 if (tx_queue->stopped) {
497 tx_queue->stopped = 0;
498 efx_wake_queue(tx_queue->efx);
502 void efx_remove_tx_queue(struct efx_tx_queue *tx_queue)
504 EFX_LOG(tx_queue->efx, "destroying TX queue %d\n", tx_queue->queue);
505 falcon_remove_tx(tx_queue);
507 kfree(tx_queue->buffer);
508 tx_queue->buffer = NULL;
512 /* Efx TCP segmentation acceleration.
514 * Why? Because by doing it here in the driver we can go significantly
515 * faster than the GSO.
517 * Requires TX checksum offload support.
520 /* Number of bytes inserted at the start of a TSO header buffer,
521 * similar to NET_IP_ALIGN.
523 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
524 #define TSOH_OFFSET 0
526 #define TSOH_OFFSET NET_IP_ALIGN
529 #define TSOH_BUFFER(tsoh) ((u8 *)(tsoh + 1) + TSOH_OFFSET)
531 /* Total size of struct efx_tso_header, buffer and padding */
532 #define TSOH_SIZE(hdr_len) \
533 (sizeof(struct efx_tso_header) + TSOH_OFFSET + hdr_len)
535 /* Size of blocks on free list. Larger blocks must be allocated from
538 #define TSOH_STD_SIZE 128
540 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
541 #define ETH_HDR_LEN(skb) (skb_network_header(skb) - (skb)->data)
542 #define SKB_TCP_OFF(skb) PTR_DIFF(tcp_hdr(skb), (skb)->data)
543 #define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
546 * struct tso_state - TSO state for an SKB
547 * @out_len: Remaining length in current segment
548 * @seqnum: Current sequence number
549 * @ipv4_id: Current IPv4 ID, host endian
550 * @packet_space: Remaining space in current packet
551 * @dma_addr: DMA address of current position
552 * @in_len: Remaining length in current SKB fragment
553 * @unmap_len: Length of SKB fragment
554 * @unmap_addr: DMA address of SKB fragment
555 * @unmap_single: DMA single vs page mapping flag
556 * @header_len: Number of bytes of header
557 * @full_packet_size: Number of bytes to put in each outgoing segment
559 * The state used during segmentation. It is put into this data structure
560 * just to make it easy to pass into inline functions.
563 /* Output position */
567 unsigned packet_space;
573 dma_addr_t unmap_addr;
577 int full_packet_size;
582 * Verify that our various assumptions about sk_buffs and the conditions
583 * under which TSO will be attempted hold true.
585 static void efx_tso_check_safe(struct sk_buff *skb)
587 __be16 protocol = skb->protocol;
589 EFX_BUG_ON_PARANOID(((struct ethhdr *)skb->data)->h_proto !=
591 if (protocol == htons(ETH_P_8021Q)) {
592 /* Find the encapsulated protocol; reset network header
593 * and transport header based on that. */
594 struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data;
595 protocol = veh->h_vlan_encapsulated_proto;
596 skb_set_network_header(skb, sizeof(*veh));
597 if (protocol == htons(ETH_P_IP))
598 skb_set_transport_header(skb, sizeof(*veh) +
599 4 * ip_hdr(skb)->ihl);
602 EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IP));
603 EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP);
604 EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data)
605 + (tcp_hdr(skb)->doff << 2u)) >
611 * Allocate a page worth of efx_tso_header structures, and string them
612 * into the tx_queue->tso_headers_free linked list. Return 0 or -ENOMEM.
614 static int efx_tsoh_block_alloc(struct efx_tx_queue *tx_queue)
617 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
618 struct efx_tso_header *tsoh;
622 base_kva = pci_alloc_consistent(pci_dev, PAGE_SIZE, &dma_addr);
623 if (base_kva == NULL) {
624 EFX_ERR(tx_queue->efx, "Unable to allocate page for TSO"
629 /* pci_alloc_consistent() allocates pages. */
630 EFX_BUG_ON_PARANOID(dma_addr & (PAGE_SIZE - 1u));
632 for (kva = base_kva; kva < base_kva + PAGE_SIZE; kva += TSOH_STD_SIZE) {
633 tsoh = (struct efx_tso_header *)kva;
634 tsoh->dma_addr = dma_addr + (TSOH_BUFFER(tsoh) - base_kva);
635 tsoh->next = tx_queue->tso_headers_free;
636 tx_queue->tso_headers_free = tsoh;
643 /* Free up a TSO header, and all others in the same page. */
644 static void efx_tsoh_block_free(struct efx_tx_queue *tx_queue,
645 struct efx_tso_header *tsoh,
646 struct pci_dev *pci_dev)
648 struct efx_tso_header **p;
649 unsigned long base_kva;
652 base_kva = (unsigned long)tsoh & PAGE_MASK;
653 base_dma = tsoh->dma_addr & PAGE_MASK;
655 p = &tx_queue->tso_headers_free;
657 if (((unsigned long)*p & PAGE_MASK) == base_kva)
663 pci_free_consistent(pci_dev, PAGE_SIZE, (void *)base_kva, base_dma);
666 static struct efx_tso_header *
667 efx_tsoh_heap_alloc(struct efx_tx_queue *tx_queue, size_t header_len)
669 struct efx_tso_header *tsoh;
671 tsoh = kmalloc(TSOH_SIZE(header_len), GFP_ATOMIC | GFP_DMA);
675 tsoh->dma_addr = pci_map_single(tx_queue->efx->pci_dev,
676 TSOH_BUFFER(tsoh), header_len,
678 if (unlikely(pci_dma_mapping_error(tx_queue->efx->pci_dev,
684 tsoh->unmap_len = header_len;
689 efx_tsoh_heap_free(struct efx_tx_queue *tx_queue, struct efx_tso_header *tsoh)
691 pci_unmap_single(tx_queue->efx->pci_dev,
692 tsoh->dma_addr, tsoh->unmap_len,
698 * efx_tx_queue_insert - push descriptors onto the TX queue
699 * @tx_queue: Efx TX queue
700 * @dma_addr: DMA address of fragment
701 * @len: Length of fragment
702 * @final_buffer: The final buffer inserted into the queue
704 * Push descriptors onto the TX queue. Return 0 on success or 1 if
707 static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
708 dma_addr_t dma_addr, unsigned len,
709 struct efx_tx_buffer **final_buffer)
711 struct efx_tx_buffer *buffer;
712 struct efx_nic *efx = tx_queue->efx;
713 unsigned dma_len, fill_level, insert_ptr, misalign;
716 EFX_BUG_ON_PARANOID(len <= 0);
718 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
719 /* -1 as there is no way to represent all descriptors used */
720 q_space = efx->type->txd_ring_mask - 1 - fill_level;
723 if (unlikely(q_space-- <= 0)) {
724 /* It might be that completions have happened
725 * since the xmit path last checked. Update
726 * the xmit path's copy of read_count.
729 /* This memory barrier protects the change of
730 * stopped from the access of read_count. */
732 tx_queue->old_read_count =
733 *(volatile unsigned *)&tx_queue->read_count;
734 fill_level = (tx_queue->insert_count
735 - tx_queue->old_read_count);
736 q_space = efx->type->txd_ring_mask - 1 - fill_level;
737 if (unlikely(q_space-- <= 0)) {
738 *final_buffer = NULL;
745 insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
746 buffer = &tx_queue->buffer[insert_ptr];
747 ++tx_queue->insert_count;
749 EFX_BUG_ON_PARANOID(tx_queue->insert_count -
750 tx_queue->read_count >
751 efx->type->txd_ring_mask);
753 efx_tsoh_free(tx_queue, buffer);
754 EFX_BUG_ON_PARANOID(buffer->len);
755 EFX_BUG_ON_PARANOID(buffer->unmap_len);
756 EFX_BUG_ON_PARANOID(buffer->skb);
757 EFX_BUG_ON_PARANOID(!buffer->continuation);
758 EFX_BUG_ON_PARANOID(buffer->tsoh);
760 buffer->dma_addr = dma_addr;
762 /* Ensure we do not cross a boundary unsupported by H/W */
763 dma_len = (~dma_addr & efx->type->tx_dma_mask) + 1;
765 misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
766 if (misalign && dma_len + misalign > 512)
767 dma_len = 512 - misalign;
769 /* If there is enough space to send then do so */
773 buffer->len = dma_len; /* Don't set the other members */
778 EFX_BUG_ON_PARANOID(!len);
780 *final_buffer = buffer;
786 * Put a TSO header into the TX queue.
788 * This is special-cased because we know that it is small enough to fit in
789 * a single fragment, and we know it doesn't cross a page boundary. It
790 * also allows us to not worry about end-of-packet etc.
792 static void efx_tso_put_header(struct efx_tx_queue *tx_queue,
793 struct efx_tso_header *tsoh, unsigned len)
795 struct efx_tx_buffer *buffer;
797 buffer = &tx_queue->buffer[tx_queue->insert_count &
798 tx_queue->efx->type->txd_ring_mask];
799 efx_tsoh_free(tx_queue, buffer);
800 EFX_BUG_ON_PARANOID(buffer->len);
801 EFX_BUG_ON_PARANOID(buffer->unmap_len);
802 EFX_BUG_ON_PARANOID(buffer->skb);
803 EFX_BUG_ON_PARANOID(!buffer->continuation);
804 EFX_BUG_ON_PARANOID(buffer->tsoh);
806 buffer->dma_addr = tsoh->dma_addr;
809 ++tx_queue->insert_count;
813 /* Remove descriptors put into a tx_queue. */
814 static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
816 struct efx_tx_buffer *buffer;
817 dma_addr_t unmap_addr;
819 /* Work backwards until we hit the original insert pointer value */
820 while (tx_queue->insert_count != tx_queue->write_count) {
821 --tx_queue->insert_count;
822 buffer = &tx_queue->buffer[tx_queue->insert_count &
823 tx_queue->efx->type->txd_ring_mask];
824 efx_tsoh_free(tx_queue, buffer);
825 EFX_BUG_ON_PARANOID(buffer->skb);
827 buffer->continuation = true;
828 if (buffer->unmap_len) {
829 unmap_addr = (buffer->dma_addr + buffer->len -
831 if (buffer->unmap_single)
832 pci_unmap_single(tx_queue->efx->pci_dev,
833 unmap_addr, buffer->unmap_len,
836 pci_unmap_page(tx_queue->efx->pci_dev,
837 unmap_addr, buffer->unmap_len,
839 buffer->unmap_len = 0;
845 /* Parse the SKB header and initialise state. */
846 static void tso_start(struct tso_state *st, const struct sk_buff *skb)
848 /* All ethernet/IP/TCP headers combined size is TCP header size
849 * plus offset of TCP header relative to start of packet.
851 st->header_len = ((tcp_hdr(skb)->doff << 2u)
852 + PTR_DIFF(tcp_hdr(skb), skb->data));
853 st->full_packet_size = st->header_len + skb_shinfo(skb)->gso_size;
855 st->ipv4_id = ntohs(ip_hdr(skb)->id);
856 st->seqnum = ntohl(tcp_hdr(skb)->seq);
858 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg);
859 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->syn);
860 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->rst);
862 st->packet_space = st->full_packet_size;
863 st->out_len = skb->len - st->header_len;
865 st->unmap_single = false;
868 static int tso_get_fragment(struct tso_state *st, struct efx_nic *efx,
871 st->unmap_addr = pci_map_page(efx->pci_dev, frag->page,
872 frag->page_offset, frag->size,
874 if (likely(!pci_dma_mapping_error(efx->pci_dev, st->unmap_addr))) {
875 st->unmap_single = false;
876 st->unmap_len = frag->size;
877 st->in_len = frag->size;
878 st->dma_addr = st->unmap_addr;
884 static int tso_get_head_fragment(struct tso_state *st, struct efx_nic *efx,
885 const struct sk_buff *skb)
887 int hl = st->header_len;
888 int len = skb_headlen(skb) - hl;
890 st->unmap_addr = pci_map_single(efx->pci_dev, skb->data + hl,
891 len, PCI_DMA_TODEVICE);
892 if (likely(!pci_dma_mapping_error(efx->pci_dev, st->unmap_addr))) {
893 st->unmap_single = true;
896 st->dma_addr = st->unmap_addr;
904 * tso_fill_packet_with_fragment - form descriptors for the current fragment
905 * @tx_queue: Efx TX queue
906 * @skb: Socket buffer
909 * Form descriptors for the current fragment, until we reach the end
910 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
911 * space in @tx_queue.
913 static int tso_fill_packet_with_fragment(struct efx_tx_queue *tx_queue,
914 const struct sk_buff *skb,
915 struct tso_state *st)
917 struct efx_tx_buffer *buffer;
918 int n, end_of_packet, rc;
922 if (st->packet_space == 0)
925 EFX_BUG_ON_PARANOID(st->in_len <= 0);
926 EFX_BUG_ON_PARANOID(st->packet_space <= 0);
928 n = min(st->in_len, st->packet_space);
930 st->packet_space -= n;
934 rc = efx_tx_queue_insert(tx_queue, st->dma_addr, n, &buffer);
935 if (likely(rc == 0)) {
936 if (st->out_len == 0)
937 /* Transfer ownership of the skb */
940 end_of_packet = st->out_len == 0 || st->packet_space == 0;
941 buffer->continuation = !end_of_packet;
943 if (st->in_len == 0) {
944 /* Transfer ownership of the pci mapping */
945 buffer->unmap_len = st->unmap_len;
946 buffer->unmap_single = st->unmap_single;
957 * tso_start_new_packet - generate a new header and prepare for the new packet
958 * @tx_queue: Efx TX queue
959 * @skb: Socket buffer
962 * Generate a new header and prepare for the new packet. Return 0 on
963 * success, or -1 if failed to alloc header.
965 static int tso_start_new_packet(struct efx_tx_queue *tx_queue,
966 const struct sk_buff *skb,
967 struct tso_state *st)
969 struct efx_tso_header *tsoh;
970 struct iphdr *tsoh_iph;
971 struct tcphdr *tsoh_th;
975 /* Allocate a DMA-mapped header buffer. */
976 if (likely(TSOH_SIZE(st->header_len) <= TSOH_STD_SIZE)) {
977 if (tx_queue->tso_headers_free == NULL) {
978 if (efx_tsoh_block_alloc(tx_queue))
981 EFX_BUG_ON_PARANOID(!tx_queue->tso_headers_free);
982 tsoh = tx_queue->tso_headers_free;
983 tx_queue->tso_headers_free = tsoh->next;
986 tx_queue->tso_long_headers++;
987 tsoh = efx_tsoh_heap_alloc(tx_queue, st->header_len);
992 header = TSOH_BUFFER(tsoh);
993 tsoh_th = (struct tcphdr *)(header + SKB_TCP_OFF(skb));
994 tsoh_iph = (struct iphdr *)(header + SKB_IPV4_OFF(skb));
996 /* Copy and update the headers. */
997 memcpy(header, skb->data, st->header_len);
999 tsoh_th->seq = htonl(st->seqnum);
1000 st->seqnum += skb_shinfo(skb)->gso_size;
1001 if (st->out_len > skb_shinfo(skb)->gso_size) {
1002 /* This packet will not finish the TSO burst. */
1003 ip_length = st->full_packet_size - ETH_HDR_LEN(skb);
1007 /* This packet will be the last in the TSO burst. */
1008 ip_length = st->header_len - ETH_HDR_LEN(skb) + st->out_len;
1009 tsoh_th->fin = tcp_hdr(skb)->fin;
1010 tsoh_th->psh = tcp_hdr(skb)->psh;
1012 tsoh_iph->tot_len = htons(ip_length);
1014 /* Linux leaves suitable gaps in the IP ID space for us to fill. */
1015 tsoh_iph->id = htons(st->ipv4_id);
1018 st->packet_space = skb_shinfo(skb)->gso_size;
1019 ++tx_queue->tso_packets;
1021 /* Form a descriptor for this header. */
1022 efx_tso_put_header(tx_queue, tsoh, st->header_len);
1029 * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer
1030 * @tx_queue: Efx TX queue
1031 * @skb: Socket buffer
1033 * Context: You must hold netif_tx_lock() to call this function.
1035 * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if
1036 * @skb was not enqueued. In all cases @skb is consumed. Return
1037 * %NETDEV_TX_OK or %NETDEV_TX_BUSY.
1039 static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
1040 struct sk_buff *skb)
1042 struct efx_nic *efx = tx_queue->efx;
1043 int frag_i, rc, rc2 = NETDEV_TX_OK;
1044 struct tso_state state;
1046 /* Verify TSO is safe - these checks should never fail. */
1047 efx_tso_check_safe(skb);
1049 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
1051 tso_start(&state, skb);
1053 /* Assume that skb header area contains exactly the headers, and
1054 * all payload is in the frag list.
1056 if (skb_headlen(skb) == state.header_len) {
1057 /* Grab the first payload fragment. */
1058 EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags < 1);
1060 rc = tso_get_fragment(&state, efx,
1061 skb_shinfo(skb)->frags + frag_i);
1065 rc = tso_get_head_fragment(&state, efx, skb);
1071 if (tso_start_new_packet(tx_queue, skb, &state) < 0)
1075 rc = tso_fill_packet_with_fragment(tx_queue, skb, &state);
1079 /* Move onto the next fragment? */
1080 if (state.in_len == 0) {
1081 if (++frag_i >= skb_shinfo(skb)->nr_frags)
1082 /* End of payload reached. */
1084 rc = tso_get_fragment(&state, efx,
1085 skb_shinfo(skb)->frags + frag_i);
1090 /* Start at new packet? */
1091 if (state.packet_space == 0 &&
1092 tso_start_new_packet(tx_queue, skb, &state) < 0)
1096 /* Pass off to hardware */
1097 falcon_push_buffers(tx_queue);
1099 tx_queue->tso_bursts++;
1100 return NETDEV_TX_OK;
1103 EFX_ERR(efx, "Out of memory for TSO headers, or PCI mapping error\n");
1104 dev_kfree_skb_any((struct sk_buff *)skb);
1108 rc2 = NETDEV_TX_BUSY;
1110 /* Stop the queue if it wasn't stopped before. */
1111 if (tx_queue->stopped == 1)
1112 efx_stop_queue(efx);
1115 /* Free the DMA mapping we were in the process of writing out */
1116 if (state.unmap_len) {
1117 if (state.unmap_single)
1118 pci_unmap_single(efx->pci_dev, state.unmap_addr,
1119 state.unmap_len, PCI_DMA_TODEVICE);
1121 pci_unmap_page(efx->pci_dev, state.unmap_addr,
1122 state.unmap_len, PCI_DMA_TODEVICE);
1125 efx_enqueue_unwind(tx_queue);
1131 * Free up all TSO datastructures associated with tx_queue. This
1132 * routine should be called only once the tx_queue is both empty and
1133 * will no longer be used.
1135 static void efx_fini_tso(struct efx_tx_queue *tx_queue)
1139 if (tx_queue->buffer) {
1140 for (i = 0; i <= tx_queue->efx->type->txd_ring_mask; ++i)
1141 efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
1144 while (tx_queue->tso_headers_free != NULL)
1145 efx_tsoh_block_free(tx_queue, tx_queue->tso_headers_free,
1146 tx_queue->efx->pci_dev);