2 * Device Tree Source for the Socrates board (MPC8544).
4 * Copyright (c) 2008 Emcraft Systems.
5 * Sergei Poselenov, <sposelenov@emcraft.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
16 model = "abb,socrates";
17 compatible = "abb,socrates";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
40 timebase-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
48 device_type = "memory";
49 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
57 ranges = <0x00000000 0xe0000000 0x00100000>;
58 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
59 bus-frequency = <0>; // Filled in by U-Boot
60 compatible = "fsl,mpc8544-immr", "simple-bus";
62 memory-controller@2000 {
63 compatible = "fsl,mpc8544-memory-controller";
64 reg = <0x2000 0x1000>;
65 interrupt-parent = <&mpic>;
69 L2: l2-cache-controller@20000 {
70 compatible = "fsl,mpc8544-l2-cache-controller";
71 reg = <0x20000 0x1000>;
72 cache-line-size = <32>;
73 cache-size = <0x40000>; // L2, 256K
74 interrupt-parent = <&mpic>;
82 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
85 interrupt-parent = <&mpic>;
86 fsl,preserve-clocking;
89 compatible = "winbond,w83782d";
93 compatible = "epson,rx8025";
96 interrupt-parent = <&mpic>;
99 compatible = "dallas,ds75";
103 compatible = "ti,tsc2003";
105 interrupt-parent = <&mpic>;
111 #address-cells = <1>;
114 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
115 reg = <0x3100 0x100>;
117 interrupt-parent = <&mpic>;
118 fsl,preserve-clocking;
121 enet0: ethernet@24000 {
122 #address-cells = <1>;
125 device_type = "network";
127 compatible = "gianfar";
128 reg = <0x24000 0x1000>;
129 ranges = <0x0 0x24000 0x1000>;
130 local-mac-address = [ 00 00 00 00 00 00 ];
131 interrupts = <29 2 30 2 34 2>;
132 interrupt-parent = <&mpic>;
133 phy-handle = <&phy0>;
134 tbi-handle = <&tbi0>;
135 phy-connection-type = "rgmii-id";
138 #address-cells = <1>;
140 compatible = "fsl,gianfar-mdio";
143 phy0: ethernet-phy@0 {
144 interrupt-parent = <&mpic>;
148 phy1: ethernet-phy@1 {
149 interrupt-parent = <&mpic>;
159 enet1: ethernet@26000 {
160 #address-cells = <1>;
163 device_type = "network";
165 compatible = "gianfar";
166 reg = <0x26000 0x1000>;
167 ranges = <0x0 0x26000 0x1000>;
168 local-mac-address = [ 00 00 00 00 00 00 ];
169 interrupts = <31 2 32 2 33 2>;
170 interrupt-parent = <&mpic>;
171 phy-handle = <&phy1>;
172 tbi-handle = <&tbi1>;
173 phy-connection-type = "rgmii-id";
176 #address-cells = <1>;
178 compatible = "fsl,gianfar-tbi";
187 serial0: serial@4500 {
189 device_type = "serial";
190 compatible = "ns16550";
191 reg = <0x4500 0x100>;
192 clock-frequency = <0>;
194 interrupt-parent = <&mpic>;
197 serial1: serial@4600 {
199 device_type = "serial";
200 compatible = "ns16550";
201 reg = <0x4600 0x100>;
202 clock-frequency = <0>;
204 interrupt-parent = <&mpic>;
207 global-utilities@e0000 { //global utilities block
208 compatible = "fsl,mpc8548-guts";
209 reg = <0xe0000 0x1000>;
214 interrupt-controller;
215 #address-cells = <0>;
216 #interrupt-cells = <2>;
217 reg = <0x40000 0x40000>;
218 compatible = "chrp,open-pic";
219 device_type = "open-pic";
225 compatible = "fsl,mpc8544-localbus",
228 #address-cells = <2>;
230 reg = <0xe0005000 0x40>;
232 ranges = <0 0 0xfc000000 0x04000000
233 2 0 0xc8000000 0x04000000
234 3 0 0xc0000000 0x00100000
235 >; /* Overwritten by U-Boot */
238 compatible = "amd,s29gl256n", "cfi-flash";
240 reg = <0x0 0x000000 0x4000000>;
241 #address-cells = <1>;
245 reg = <0x0 0x1e0000>;
250 reg = <0x1e0000 0x20000>;
254 reg = <0x200000 0x200000>;
258 reg = <0x400000 0x3b80000>;
262 reg = <0x3f80000 0x40000>;
267 reg = <0x3fc0000 0x40000>;
273 compatible = "fujitsu,lime";
274 reg = <2 0x0 0x4000000>;
275 interrupt-parent = <&mpic>;
279 fpga_pic: fpga-pic@3,10 {
280 compatible = "abb,socrates-fpga-pic";
282 interrupt-controller;
283 /* IRQs 2, 10, 11, active low, level-sensitive */
284 interrupts = <2 1 10 1 11 1>;
285 interrupt-parent = <&mpic>;
286 #interrupt-cells = <3>;
290 compatible = "abb,socrates-spi";
292 interrupts = <8 4 0>; // number, type, routing
293 interrupt-parent = <&fpga_pic>;
297 compatible = "abb,socrates-nand";
300 #address-cells = <1>;
304 reg = <0x0 0x40000000>;
309 compatible = "philips,sja1000";
310 reg = <3 0x100 0x80>;
311 interrupts = <2 8 1>; // number, type, routing
312 interrupt-parent = <&fpga_pic>;
318 #interrupt-cells = <1>;
320 #address-cells = <3>;
321 compatible = "fsl,mpc8540-pci";
323 reg = <0xe0008000 0x1000>;
324 clock-frequency = <66666666>;
326 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
329 0x8800 0x0 0x0 1 &mpic 5 1
331 0x9000 0x0 0x0 1 &mpic 4 1>;
332 interrupt-parent = <&mpic>;
334 bus-range = <0x0 0x0>;
335 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
336 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;