Merge x86-64 update from Andi
[linux-2.6] / arch / arm / mach-s3c2410 / mach-vr1000.c
1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
2  *
3  * Copyright (c) 2003-2005 Simtec Electronics
4  *   Ben Dooks <ben@simtec.co.uk>
5  *
6  * Machine support for Thorcom VR1000 board. Designed for Thorcom by
7  * Simtec Electronics, http://www.simtec.co.uk/
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * Modifications:
14  *     14-Sep-2004 BJD  USB Power control
15  *     04-Sep-2004 BJD  Added new uart init, and io init
16  *     21-Aug-2004 BJD  Added struct s3c2410_board
17  *     06-Aug-2004 BJD  Fixed call to time initialisation
18  *     05-Apr-2004 BJD  Copied to make mach-vr1000.c
19  *     18-Oct-2004 BJD  Updated board struct
20  *     04-Nov-2004 BJD  Clock and serial configuration update
21  *
22  *     04-Jan-2005 BJD  Updated uart init call
23  *     10-Jan-2005 BJD  Removed include of s3c2410.h
24  *     14-Jan-2005 BJD  Added clock init
25  *     15-Jan-2005 BJD  Add serial port device definition
26  *     20-Jan-2005 BJD  Use UPF_IOREMAP for ports
27  *     10-Feb-2005 BJD  Added power-off capability
28  *     10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
29  *     14-Mar-2006 BJD  void __iomem fixes
30  *     22-Jun-2006 BJD  Added DM9000 platform information
31  *     20-Sep-2005 BJD  Added static to non-exported items
32 */
33
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/interrupt.h>
37 #include <linux/list.h>
38 #include <linux/timer.h>
39 #include <linux/init.h>
40 #include <linux/dm9000.h>
41
42 #include <linux/serial.h>
43 #include <linux/tty.h>
44 #include <linux/serial_8250.h>
45 #include <linux/serial_reg.h>
46
47 #include <asm/mach/arch.h>
48 #include <asm/mach/map.h>
49 #include <asm/mach/irq.h>
50
51 #include <asm/arch/bast-map.h>
52 #include <asm/arch/vr1000-map.h>
53 #include <asm/arch/vr1000-irq.h>
54 #include <asm/arch/vr1000-cpld.h>
55
56 #include <asm/hardware.h>
57 #include <asm/io.h>
58 #include <asm/irq.h>
59 #include <asm/mach-types.h>
60
61 #include <asm/arch/regs-serial.h>
62 #include <asm/arch/regs-gpio.h>
63
64 #include "clock.h"
65 #include "devs.h"
66 #include "cpu.h"
67 #include "usb-simtec.h"
68
69 /* macros for virtual address mods for the io space entries */
70 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
71 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
72 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
73 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
74
75 /* macros to modify the physical addresses for io space */
76
77 #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
78 #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
79 #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
80 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
81
82 static struct map_desc vr1000_iodesc[] __initdata = {
83   /* ISA IO areas */
84   {
85           .virtual      = (u32)S3C24XX_VA_ISA_BYTE,
86           .pfn          = PA_CS2(BAST_PA_ISAIO),
87           .length       = SZ_16M,
88           .type         = MT_DEVICE,
89   }, {
90           .virtual      = (u32)S3C24XX_VA_ISA_WORD,
91           .pfn          = PA_CS3(BAST_PA_ISAIO),
92           .length       = SZ_16M,
93           .type         = MT_DEVICE,
94   },
95
96   /*  CPLD control registers, and external interrupt controls */
97   {
98           .virtual      = (u32)VR1000_VA_CTRL1,
99           .pfn          = __phys_to_pfn(VR1000_PA_CTRL1),
100           .length       = SZ_1M,
101           .type         = MT_DEVICE,
102   }, {
103           .virtual      = (u32)VR1000_VA_CTRL2,
104           .pfn          = __phys_to_pfn(VR1000_PA_CTRL2),
105           .length       = SZ_1M,
106           .type         = MT_DEVICE,
107   }, {
108           .virtual      = (u32)VR1000_VA_CTRL3,
109           .pfn          = __phys_to_pfn(VR1000_PA_CTRL3),
110           .length       = SZ_1M,
111           .type         = MT_DEVICE,
112   }, {
113           .virtual      = (u32)VR1000_VA_CTRL4,
114           .pfn          = __phys_to_pfn(VR1000_PA_CTRL4),
115           .length       = SZ_1M,
116           .type         = MT_DEVICE,
117   },
118
119   /* peripheral space... one for each of fast/slow/byte/16bit */
120   /* note, ide is only decoded in word space, even though some registers
121    * are only 8bit */
122
123   /* slow, byte */
124   { VA_C2(VR1000_VA_IDEPRI),  PA_CS3(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
125   { VA_C2(VR1000_VA_IDESEC),  PA_CS3(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
126   { VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
127   { VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
128
129   /* slow, word */
130   { VA_C3(VR1000_VA_IDEPRI),  PA_CS3(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
131   { VA_C3(VR1000_VA_IDESEC),  PA_CS3(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
132   { VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
133   { VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
134
135   /* fast, byte */
136   { VA_C4(VR1000_VA_IDEPRI),  PA_CS5(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
137   { VA_C4(VR1000_VA_IDESEC),  PA_CS5(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
138   { VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
139   { VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
140
141   /* fast, word */
142   { VA_C5(VR1000_VA_IDEPRI),  PA_CS5(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
143   { VA_C5(VR1000_VA_IDESEC),  PA_CS5(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
144   { VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
145   { VA_C5(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
146 };
147
148 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
149 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
150 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
151
152 /* uart clock source(s) */
153
154 static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
155         [0] = {
156                 .name           = "uclk",
157                 .divisor        = 1,
158                 .min_baud       = 0,
159                 .max_baud       = 0,
160         },
161         [1] = {
162                 .name           = "pclk",
163                 .divisor        = 1,
164                 .min_baud       = 0,
165                 .max_baud       = 0.
166         }
167 };
168
169 static struct s3c2410_uartcfg vr1000_uartcfgs[] = {
170         [0] = {
171                 .hwport      = 0,
172                 .flags       = 0,
173                 .ucon        = UCON,
174                 .ulcon       = ULCON,
175                 .ufcon       = UFCON,
176                 .clocks      = vr1000_serial_clocks,
177                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
178         },
179         [1] = {
180                 .hwport      = 1,
181                 .flags       = 0,
182                 .ucon        = UCON,
183                 .ulcon       = ULCON,
184                 .ufcon       = UFCON,
185                 .clocks      = vr1000_serial_clocks,
186                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
187         },
188         /* port 2 is not actually used */
189         [2] = {
190                 .hwport      = 2,
191                 .flags       = 0,
192                 .ucon        = UCON,
193                 .ulcon       = ULCON,
194                 .ufcon       = UFCON,
195                 .clocks      = vr1000_serial_clocks,
196                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
197
198         }
199 };
200
201 /* definitions for the vr1000 extra 16550 serial ports */
202
203 #define VR1000_BAUDBASE (3692307)
204
205 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
206
207 static struct plat_serial8250_port serial_platform_data[] = {
208         [0] = {
209                 .mapbase        = VR1000_SERIAL_MAPBASE(0),
210                 .irq            = IRQ_VR1000_SERIAL + 0,
211                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
212                 .iotype         = UPIO_MEM,
213                 .regshift       = 0,
214                 .uartclk        = VR1000_BAUDBASE,
215         },
216         [1] = {
217                 .mapbase        = VR1000_SERIAL_MAPBASE(1),
218                 .irq            = IRQ_VR1000_SERIAL + 1,
219                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
220                 .iotype         = UPIO_MEM,
221                 .regshift       = 0,
222                 .uartclk        = VR1000_BAUDBASE,
223         },
224         [2] = {
225                 .mapbase        = VR1000_SERIAL_MAPBASE(2),
226                 .irq            = IRQ_VR1000_SERIAL + 2,
227                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
228                 .iotype         = UPIO_MEM,
229                 .regshift       = 0,
230                 .uartclk        = VR1000_BAUDBASE,
231         },
232         [3] = {
233                 .mapbase        = VR1000_SERIAL_MAPBASE(3),
234                 .irq            = IRQ_VR1000_SERIAL + 3,
235                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
236                 .iotype         = UPIO_MEM,
237                 .regshift       = 0,
238                 .uartclk        = VR1000_BAUDBASE,
239         },
240         { },
241 };
242
243 static struct platform_device serial_device = {
244         .name                   = "serial8250",
245         .id                     = PLAT8250_DEV_PLATFORM,
246         .dev                    = {
247                 .platform_data  = serial_platform_data,
248         },
249 };
250
251 /* MTD NOR Flash */
252
253 static struct resource vr1000_nor_resource[] = {
254         [0] = {
255                 .start  = S3C2410_CS1 + 0x4000000,
256                 .end    = S3C2410_CS1 + 0x4000000 + SZ_16M - 1,
257                 .flags  = IORESOURCE_MEM,
258         }
259 };
260
261 static struct platform_device vr1000_nor = {
262         .name           = "bast-nor",
263         .id             = -1,
264         .num_resources  = ARRAY_SIZE(vr1000_nor_resource),
265         .resource       = vr1000_nor_resource,
266 };
267
268 /* DM9000 ethernet devices */
269
270 static struct resource vr1000_dm9k0_resource[] = {
271         [0] = {
272                 .start = S3C2410_CS5 + VR1000_PA_DM9000,
273                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
274                 .flags = IORESOURCE_MEM
275         },
276         [1] = {
277                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
278                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
279                 .flags = IORESOURCE_MEM
280         },
281         [2] = {
282                 .start = IRQ_VR1000_DM9000A,
283                 .end   = IRQ_VR1000_DM9000A,
284                 .flags = IORESOURCE_IRQ
285         }
286
287 };
288
289 static struct resource vr1000_dm9k1_resource[] = {
290         [0] = {
291                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
292                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
293                 .flags = IORESOURCE_MEM
294         },
295         [1] = {
296                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
297                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
298                 .flags = IORESOURCE_MEM
299         },
300         [2] = {
301                 .start = IRQ_VR1000_DM9000N,
302                 .end   = IRQ_VR1000_DM9000N,
303                 .flags = IORESOURCE_IRQ
304         }
305 };
306
307 /* for the moment we limit ourselves to 16bit IO until some
308  * better IO routines can be written and tested
309 */
310
311 static struct dm9000_plat_data vr1000_dm9k_platdata = {
312         .flags          = DM9000_PLATF_16BITONLY,
313 };
314
315 static struct platform_device vr1000_dm9k0 = {
316         .name           = "dm9000",
317         .id             = 0,
318         .num_resources  = ARRAY_SIZE(vr1000_dm9k0_resource),
319         .resource       = vr1000_dm9k0_resource,
320         .dev            = {
321                 .platform_data = &vr1000_dm9k_platdata,
322         }
323 };
324
325 static struct platform_device vr1000_dm9k1 = {
326         .name           = "dm9000",
327         .id             = 1,
328         .num_resources  = ARRAY_SIZE(vr1000_dm9k1_resource),
329         .resource       = vr1000_dm9k1_resource,
330         .dev            = {
331                 .platform_data = &vr1000_dm9k_platdata,
332         }
333 };
334
335 /* devices for this board */
336
337 static struct platform_device *vr1000_devices[] __initdata = {
338         &s3c_device_usb,
339         &s3c_device_lcd,
340         &s3c_device_wdt,
341         &s3c_device_i2c,
342         &s3c_device_iis,
343         &s3c_device_adc,
344         &serial_device,
345         &vr1000_nor,
346         &vr1000_dm9k0,
347         &vr1000_dm9k1
348 };
349
350 static struct clk *vr1000_clocks[] = {
351         &s3c24xx_dclk0,
352         &s3c24xx_dclk1,
353         &s3c24xx_clkout0,
354         &s3c24xx_clkout1,
355         &s3c24xx_uclk,
356 };
357
358 static struct s3c24xx_board vr1000_board __initdata = {
359         .devices       = vr1000_devices,
360         .devices_count = ARRAY_SIZE(vr1000_devices),
361         .clocks        = vr1000_clocks,
362         .clocks_count  = ARRAY_SIZE(vr1000_clocks),
363 };
364
365 static void vr1000_power_off(void)
366 {
367         s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
368         s3c2410_gpio_setpin(S3C2410_GPB9, 1);
369 }
370
371 static void __init vr1000_map_io(void)
372 {
373         /* initialise clock sources */
374
375         s3c24xx_dclk0.parent = NULL;
376         s3c24xx_dclk0.rate   = 12*1000*1000;
377
378         s3c24xx_dclk1.parent = NULL;
379         s3c24xx_dclk1.rate   = 3692307;
380
381         s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
382         s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
383
384         s3c24xx_uclk.parent  = &s3c24xx_clkout1;
385
386         pm_power_off = vr1000_power_off;
387
388         s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
389         s3c24xx_init_clocks(0);
390         s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
391         s3c24xx_set_board(&vr1000_board);
392         usb_simtec_init();
393 }
394
395
396 MACHINE_START(VR1000, "Thorcom-VR1000")
397         /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
398         .phys_ram       = S3C2410_SDRAM_PA,
399         .phys_io        = S3C2410_PA_UART,
400         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
401         .boot_params    = S3C2410_SDRAM_PA + 0x100,
402         .map_io         = vr1000_map_io,
403         .init_irq       = s3c24xx_init_irq,
404         .timer          = &s3c24xx_timer,
405 MACHINE_END