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   1 /*
   2  * video1394.c - video driver for OHCI 1394 boards
   3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software Foundation,
  18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  *
  20  * NOTES:
  21  *
  22  * ioctl return codes:
  23  * EFAULT is only for invalid address for the argp
  24  * EINVAL for out of range values
  25  * EBUSY when trying to use an already used resource
  26  * ESRCH when trying to free/stop a not used resource
  27  * EAGAIN for resource allocation failure that could perhaps succeed later
  28  * ENOTTY for unsupported ioctl request
  29  *
  30  */
  31 #include <linux/config.h>
  32 #include <linux/kernel.h>
  33 #include <linux/list.h>
  34 #include <linux/slab.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/wait.h>
  37 #include <linux/errno.h>
  38 #include <linux/module.h>
  39 #include <linux/init.h>
  40 #include <linux/pci.h>
  41 #include <linux/fs.h>
  42 #include <linux/poll.h>
  43 #include <linux/smp_lock.h>
  44 #include <linux/delay.h>
  45 #include <linux/devfs_fs_kernel.h>
  46 #include <linux/bitops.h>
  47 #include <linux/types.h>
  48 #include <linux/vmalloc.h>
  49 #include <linux/timex.h>
  50 #include <linux/mm.h>
  51 #include <linux/compat.h>
  52 #include <linux/cdev.h>
  53
  54 #include "ieee1394.h"
  55 #include "ieee1394_types.h"
  56 #include "hosts.h"
  57 #include "ieee1394_core.h"
  58 #include "highlevel.h"
  59 #include "video1394.h"
  60 #include "nodemgr.h"
  61 #include "dma.h"
  62
  63 #include "ohci1394.h"
  64
  65 #define ISO_CHANNELS 64
  66
  67 struct it_dma_prg {
  68         struct dma_cmd begin;
  69         quadlet_t data[4];
  70         struct dma_cmd end;
  71         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
  72 };
  73
  74 struct dma_iso_ctx {
  75         struct ti_ohci *ohci;
  76         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
  77         struct ohci1394_iso_tasklet iso_tasklet;
  78         int channel;
  79         int ctx;
  80         int last_buffer;
  81         int * next_buffer;  /* For ISO Transmit of video packets
  82                                to write the correct SYT field
  83                                into the next block */
  84         unsigned int num_desc;
  85         unsigned int buf_size;
  86         unsigned int frame_size;
  87         unsigned int packet_size;
  88         unsigned int left_size;
  89         unsigned int nb_cmd;
  90
  91         struct dma_region dma;
  92
  93         struct dma_prog_region *prg_reg;
  94
  95         struct dma_cmd **ir_prg;
  96         struct it_dma_prg **it_prg;
  97
  98         unsigned int *buffer_status;
  99         unsigned int *buffer_prg_assignment;
 100         struct timeval *buffer_time; /* time when the buffer was received */
 101         unsigned int *last_used_cmd; /* For ISO Transmit with
 102                                         variable sized packets only ! */
 103         int ctrlClear;
 104         int ctrlSet;
 105         int cmdPtr;
 106         int ctxMatch;
 107         wait_queue_head_t waitq;
 108         spinlock_t lock;
 109         unsigned int syt_offset;
 110         int flags;
 111
 112         struct list_head link;
 113 };
 114
 115
 116 struct file_ctx {
 117         struct ti_ohci *ohci;
 118         struct list_head context_list;
 119         struct dma_iso_ctx *current_ctx;
 120 };
 121
 122 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
 123 #define VIDEO1394_DEBUG
 124 #endif
 125
 126 #ifdef DBGMSG
 127 #undef DBGMSG
 128 #endif
 129
 130 #ifdef VIDEO1394_DEBUG
 131 #define DBGMSG(card, fmt, args...) \
 132 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
 133 #else
 134 #define DBGMSG(card, fmt, args...)
 135 #endif
 136
 137 /* print general (card independent) information */
 138 #define PRINT_G(level, fmt, args...) \
 139 printk(level "video1394: " fmt "\n" , ## args)
 140
 141 /* print card specific information */
 142 #define PRINT(level, card, fmt, args...) \
 143 printk(level "video1394_%d: " fmt "\n" , card , ## args)
 144
 145 static void wakeup_dma_ir_ctx(unsigned long l);
 146 static void wakeup_dma_it_ctx(unsigned long l);
 147
 148 static struct hpsb_highlevel video1394_highlevel;
 149
 150 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
 151 {
 152         int i;
 153
 154         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
 155
 156         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
 157         if (d->iso_tasklet.link.next != NULL)
 158                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
 159
 160         dma_region_free(&d->dma);
 161
 162         if (d->prg_reg) {
 163                 for (i = 0; i < d->num_desc; i++)
 164                         dma_prog_region_free(&d->prg_reg[i]);
 165                 kfree(d->prg_reg);
 166         }
 167
 168         kfree(d->ir_prg);
 169         kfree(d->it_prg);
 170         kfree(d->buffer_status);
 171         kfree(d->buffer_prg_assignment);
 172         kfree(d->buffer_time);
 173         kfree(d->last_used_cmd);
 174         kfree(d->next_buffer);
 175         list_del(&d->link);
 176         kfree(d);
 177
 178         return 0;
 179 }
 180
 181 static struct dma_iso_ctx *
 182 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
 183                   int buf_size, int channel, unsigned int packet_size)
 184 {
 185         struct dma_iso_ctx *d;
 186         int i;
 187
 188         d = kzalloc(sizeof(*d), GFP_KERNEL);
 189         if (!d) {
 190                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
 191                 return NULL;
 192         }
 193
 194         d->ohci = ohci;
 195         d->type = type;
 196         d->channel = channel;
 197         d->num_desc = num_desc;
 198         d->frame_size = buf_size;
 199         d->buf_size = PAGE_ALIGN(buf_size);
 200         d->last_buffer = -1;
 201         INIT_LIST_HEAD(&d->link);
 202         init_waitqueue_head(&d->waitq);
 203
 204         /* Init the regions for easy cleanup */
 205         dma_region_init(&d->dma);
 206
 207         if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
 208                              PCI_DMA_BIDIRECTIONAL)) {
 209                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
 210                 free_dma_iso_ctx(d);
 211                 return NULL;
 212         }
 213
 214         if (type == OHCI_ISO_RECEIVE)
 215                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 216                                           wakeup_dma_ir_ctx,
 217                                           (unsigned long) d);
 218         else
 219                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 220                                           wakeup_dma_it_ctx,
 221                                           (unsigned long) d);
 222
 223         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
 224                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
 225                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
 226                 free_dma_iso_ctx(d);
 227                 return NULL;
 228         }
 229         d->ctx = d->iso_tasklet.context;
 230
 231         d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
 232         if (!d->prg_reg) {
 233                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
 234                 free_dma_iso_ctx(d);
 235                 return NULL;
 236         }
 237         /* Makes for easier cleanup */
 238         for (i = 0; i < d->num_desc; i++)
 239                 dma_prog_region_init(&d->prg_reg[i]);
 240
 241         if (type == OHCI_ISO_RECEIVE) {
 242                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
 243                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
 244                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
 245                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
 246
 247                 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
 248                                     GFP_KERNEL);
 249
 250                 if (!d->ir_prg) {
 251                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 252                         free_dma_iso_ctx(d);
 253                         return NULL;
 254                 }
 255
 256                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
 257                 d->left_size = (d->frame_size % PAGE_SIZE) ?
 258                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
 259
 260                 for (i = 0;i < d->num_desc; i++) {
 261                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 262                                                   sizeof(struct dma_cmd), ohci->dev)) {
 263                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 264                                 free_dma_iso_ctx(d);
 265                                 return NULL;
 266                         }
 267                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
 268                 }
 269
 270         } else {  /* OHCI_ISO_TRANSMIT */
 271                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
 272                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
 273                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
 274
 275                 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
 276                                     GFP_KERNEL);
 277
 278                 if (!d->it_prg) {
 279                         PRINT(KERN_ERR, ohci->host->id,
 280                               "Failed to allocate dma it prg");
 281                         free_dma_iso_ctx(d);
 282                         return NULL;
 283                 }
 284
 285                 d->packet_size = packet_size;
 286
 287                 if (PAGE_SIZE % packet_size || packet_size>4096) {
 288                         PRINT(KERN_ERR, ohci->host->id,
 289                               "Packet size %d (page_size: %ld) "
 290                               "not yet supported\n",
 291                               packet_size, PAGE_SIZE);
 292                         free_dma_iso_ctx(d);
 293                         return NULL;
 294                 }
 295
 296                 d->nb_cmd = d->frame_size / d->packet_size;
 297                 if (d->frame_size % d->packet_size) {
 298                         d->nb_cmd++;
 299                         d->left_size = d->frame_size % d->packet_size;
 300                 } else
 301                         d->left_size = d->packet_size;
 302
 303                 for (i = 0; i < d->num_desc; i++) {
 304                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 305                                                 sizeof(struct it_dma_prg), ohci->dev)) {
 306                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
 307                                 free_dma_iso_ctx(d);
 308                                 return NULL;
 309                         }
 310                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
 311                 }
 312         }
 313
 314         d->buffer_status =
 315             kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
 316         d->buffer_prg_assignment =
 317             kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
 318         d->buffer_time =
 319             kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
 320         d->last_used_cmd =
 321             kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
 322         d->next_buffer =
 323             kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
 324
 325         if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
 326             !d->last_used_cmd || !d->next_buffer) {
 327                 PRINT(KERN_ERR, ohci->host->id,
 328                       "Failed to allocate dma_iso_ctx member");
 329                 free_dma_iso_ctx(d);
 330                 return NULL;
 331         }
 332
 333         spin_lock_init(&d->lock);
 334
 335         PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
 336               "of size %d allocated for a frame size %d, each with %d prgs",
 337               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
 338               d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
 339
 340         return d;
 341 }
 342
 343 static void reset_ir_status(struct dma_iso_ctx *d, int n)
 344 {
 345         int i;
 346         d->ir_prg[n][0].status = cpu_to_le32(4);
 347         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
 348         for (i = 2; i < d->nb_cmd - 1; i++)
 349                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
 350         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
 351 }
 352
 353 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
 354 {
 355         struct dma_cmd *ir_prg = d->ir_prg[n];
 356         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 357         int i;
 358
 359         d->buffer_prg_assignment[n] = buffer;
 360
 361         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 362                                 (unsigned long)d->dma.kvirt));
 363         ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 364                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 365
 366         for (i=2;i<d->nb_cmd-1;i++) {
 367                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 368                                                 (buf+(i-1)*PAGE_SIZE) -
 369                                                 (unsigned long)d->dma.kvirt));
 370         }
 371
 372         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 373                                   DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 374         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 375                                   (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
 376 }
 377
 378 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
 379 {
 380         struct dma_cmd *ir_prg = d->ir_prg[n];
 381         struct dma_prog_region *ir_reg = &d->prg_reg[n];
 382         unsigned long buf = (unsigned long)d->dma.kvirt;
 383         int i;
 384
 385         /* the first descriptor will read only 4 bytes */
 386         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 387                 DMA_CTL_BRANCH | 4);
 388
 389         /* set the sync flag */
 390         if (flags & VIDEO1394_SYNC_FRAMES)
 391                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
 392
 393         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 394                                 (unsigned long)d->dma.kvirt));
 395         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 396                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 397
 398         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
 399         if (d->nb_cmd > 2) {
 400                 /* The second descriptor will read PAGE_SIZE-4 bytes */
 401                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 402                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
 403                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
 404                                                 (unsigned long)d->dma.kvirt));
 405                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 406                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 407
 408                 for (i = 2; i < d->nb_cmd - 1; i++) {
 409                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 410                                                         DMA_CTL_BRANCH | PAGE_SIZE);
 411                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 412                                                         (buf+(i-1)*PAGE_SIZE) -
 413                                                         (unsigned long)d->dma.kvirt));
 414
 415                         ir_prg[i].branchAddress =
 416                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 417                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 418                 }
 419
 420                 /* The last descriptor will generate an interrupt */
 421                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 422                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 423                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 424                                                 (buf+(i-1)*PAGE_SIZE) -
 425                                                 (unsigned long)d->dma.kvirt));
 426         } else {
 427                 /* Only one DMA page is used. Read d->left_size immediately and */
 428                 /* generate an interrupt as this is also the last page. */
 429                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 430                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
 431                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 432                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 433         }
 434 }
 435
 436 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
 437 {
 438         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 439         int i;
 440
 441         d->flags = flags;
 442
 443         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 444
 445         for (i=0;i<d->num_desc;i++) {
 446                 initialize_dma_ir_prg(d, i, flags);
 447                 reset_ir_status(d, i);
 448         }
 449
 450         /* reset the ctrl register */
 451         reg_write(ohci, d->ctrlClear, 0xf0000000);
 452
 453         /* Set bufferFill */
 454         reg_write(ohci, d->ctrlSet, 0x80000000);
 455
 456         /* Set isoch header */
 457         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
 458                 reg_write(ohci, d->ctrlSet, 0x40000000);
 459
 460         /* Set the context match register to match on all tags,
 461            sync for sync tag, and listen to d->channel */
 462         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
 463
 464         /* Set up isoRecvIntMask to generate interrupts */
 465         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
 466 }
 467
 468 /* find which context is listening to this channel */
 469 static struct dma_iso_ctx *
 470 find_ctx(struct list_head *list, int type, int channel)
 471 {
 472         struct dma_iso_ctx *ctx;
 473
 474         list_for_each_entry(ctx, list, link) {
 475                 if (ctx->type == type && ctx->channel == channel)
 476                         return ctx;
 477         }
 478
 479         return NULL;
 480 }
 481
 482 static void wakeup_dma_ir_ctx(unsigned long l)
 483 {
 484         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 485         int i;
 486
 487         spin_lock(&d->lock);
 488
 489         for (i = 0; i < d->num_desc; i++) {
 490                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
 491                         reset_ir_status(d, i);
 492                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 493                         do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
 494                 }
 495         }
 496
 497         spin_unlock(&d->lock);
 498
 499         if (waitqueue_active(&d->waitq))
 500                 wake_up_interruptible(&d->waitq);
 501 }
 502
 503 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
 504                                  int n)
 505 {
 506         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
 507         u32 cycleTimer;
 508         u32 timeStamp;
 509
 510         if (n == -1) {
 511           return;
 512         }
 513
 514         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 515
 516         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
 517         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
 518                 + (cycleTimer & 0xf000)) & 0xffff;
 519
 520         buf[6] = timeStamp >> 8;
 521         buf[7] = timeStamp & 0xff;
 522
 523     /* if first packet is empty packet, then put timestamp into the next full one too */
 524     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 525             buf += d->packet_size;
 526         buf[6] = timeStamp >> 8;
 527             buf[7] = timeStamp & 0xff;
 528         }
 529
 530     /* do the next buffer frame too in case of irq latency */
 531         n = d->next_buffer[n];
 532         if (n == -1) {
 533           return;
 534         }
 535         buf = d->dma.kvirt + n * d->buf_size;
 536
 537         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
 538
 539         buf[6] = timeStamp >> 8;
 540         buf[7] = timeStamp & 0xff;
 541
 542     /* if first packet is empty packet, then put timestamp into the next full one too */
 543     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 544             buf += d->packet_size;
 545         buf[6] = timeStamp >> 8;
 546             buf[7] = timeStamp & 0xff;
 547         }
 548
 549 #if 0
 550         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
 551                curr, n, cycleTimer, timeStamp);
 552 #endif
 553 }
 554
 555 static void wakeup_dma_it_ctx(unsigned long l)
 556 {
 557         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 558         struct ti_ohci *ohci = d->ohci;
 559         int i;
 560
 561         spin_lock(&d->lock);
 562
 563         for (i = 0; i < d->num_desc; i++) {
 564                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
 565                     cpu_to_le32(0xFFFF0000)) {
 566                         int next = d->next_buffer[i];
 567                         put_timestamp(ohci, d, next);
 568                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
 569                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 570                 }
 571         }
 572
 573         spin_unlock(&d->lock);
 574
 575         if (waitqueue_active(&d->waitq))
 576                 wake_up_interruptible(&d->waitq);
 577 }
 578
 579 static void reprogram_dma_it_prg(struct dma_iso_ctx  *d, int n, int buffer)
 580 {
 581         struct it_dma_prg *it_prg = d->it_prg[n];
 582         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 583         int i;
 584
 585         d->buffer_prg_assignment[n] = buffer;
 586         for (i=0;i<d->nb_cmd;i++) {
 587           it_prg[i].end.address =
 588                 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 589                         (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
 590         }
 591 }
 592
 593 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
 594 {
 595         struct it_dma_prg *it_prg = d->it_prg[n];
 596         struct dma_prog_region *it_reg = &d->prg_reg[n];
 597         unsigned long buf = (unsigned long)d->dma.kvirt;
 598         int i;
 599         d->last_used_cmd[n] = d->nb_cmd - 1;
 600         for (i=0;i<d->nb_cmd;i++) {
 601
 602                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
 603                         DMA_CTL_IMMEDIATE | 8) ;
 604                 it_prg[i].begin.address = 0;
 605
 606                 it_prg[i].begin.status = 0;
 607
 608                 it_prg[i].data[0] = cpu_to_le32(
 609                         (IEEE1394_SPEED_100 << 16)
 610                         | (/* tag */ 1 << 14)
 611                         | (d->channel << 8)
 612                         | (TCODE_ISO_DATA << 4));
 613                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
 614                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
 615                 it_prg[i].data[2] = 0;
 616                 it_prg[i].data[3] = 0;
 617
 618                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
 619                                              DMA_CTL_BRANCH);
 620                 it_prg[i].end.address =
 621                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
 622                                                 (unsigned long)d->dma.kvirt));
 623
 624                 if (i<d->nb_cmd-1) {
 625                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
 626                         it_prg[i].begin.branchAddress =
 627                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 628                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 629                         it_prg[i].end.branchAddress =
 630                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 631                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 632                 } else {
 633                         /* the last prg generates an interrupt */
 634                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 635                                 DMA_CTL_IRQ | d->left_size);
 636                         /* the last prg doesn't branch */
 637                         it_prg[i].begin.branchAddress = 0;
 638                         it_prg[i].end.branchAddress = 0;
 639                 }
 640                 it_prg[i].end.status = 0;
 641         }
 642 }
 643
 644 static void initialize_dma_it_prg_var_packet_queue(
 645         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
 646         struct ti_ohci *ohci)
 647 {
 648         struct it_dma_prg *it_prg = d->it_prg[n];
 649         struct dma_prog_region *it_reg = &d->prg_reg[n];
 650         int i;
 651
 652 #if 0
 653         if (n != -1) {
 654                 put_timestamp(ohci, d, n);
 655         }
 656 #endif
 657         d->last_used_cmd[n] = d->nb_cmd - 1;
 658
 659         for (i = 0; i < d->nb_cmd; i++) {
 660                 unsigned int size;
 661                 if (packet_sizes[i] > d->packet_size) {
 662                         size = d->packet_size;
 663                 } else {
 664                         size = packet_sizes[i];
 665                 }
 666                 it_prg[i].data[1] = cpu_to_le32(size << 16);
 667                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
 668
 669                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
 670                         it_prg[i].end.control |= cpu_to_le32(size);
 671                         it_prg[i].begin.branchAddress =
 672                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 673                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 674                         it_prg[i].end.branchAddress =
 675                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 676                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 677                 } else {
 678                         /* the last prg generates an interrupt */
 679                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 680                                 DMA_CTL_IRQ | size);
 681                         /* the last prg doesn't branch */
 682                         it_prg[i].begin.branchAddress = 0;
 683                         it_prg[i].end.branchAddress = 0;
 684                         d->last_used_cmd[n] = i;
 685                         break;
 686                 }
 687         }
 688 }
 689
 690 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
 691                                   unsigned int syt_offset, int flags)
 692 {
 693         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 694         int i;
 695
 696         d->flags = flags;
 697         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
 698
 699         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 700
 701         for (i=0;i<d->num_desc;i++)
 702                 initialize_dma_it_prg(d, i, sync_tag);
 703
 704         /* Set up isoRecvIntMask to generate interrupts */
 705         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
 706 }
 707
 708 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
 709                                               unsigned int buffer)
 710 {
 711         unsigned long flags;
 712         unsigned int ret;
 713         spin_lock_irqsave(&d->lock, flags);
 714         ret = d->buffer_status[buffer];
 715         spin_unlock_irqrestore(&d->lock, flags);
 716         return ret;
 717 }
 718
 719 static int __video1394_ioctl(struct file *file,
 720                              unsigned int cmd, unsigned long arg)
 721 {
 722         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
 723         struct ti_ohci *ohci = ctx->ohci;
 724         unsigned long flags;
 725         void __user *argp = (void __user *)arg;
 726
 727         switch(cmd)
 728         {
 729         case VIDEO1394_IOC_LISTEN_CHANNEL:
 730         case VIDEO1394_IOC_TALK_CHANNEL:
 731         {
 732                 struct video1394_mmap v;
 733                 u64 mask;
 734                 struct dma_iso_ctx *d;
 735                 int i;
 736
 737                 if (copy_from_user(&v, argp, sizeof(v)))
 738                         return -EFAULT;
 739
 740                 /* if channel < 0, find lowest available one */
 741                 if (v.channel < 0) {
 742                     mask = (u64)0x1;
 743                     for (i=0; ; i++) {
 744                         if (i == ISO_CHANNELS) {
 745                             PRINT(KERN_ERR, ohci->host->id,
 746                                   "No free channel found");
 747                             return -EAGAIN;
 748                         }
 749                         if (!(ohci->ISO_channel_usage & mask)) {
 750                             v.channel = i;
 751                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
 752                             break;
 753                         }
 754                         mask = mask << 1;
 755                     }
 756                 } else if (v.channel >= ISO_CHANNELS) {
 757                         PRINT(KERN_ERR, ohci->host->id,
 758                               "Iso channel %d out of bounds", v.channel);
 759                         return -EINVAL;
 760                 } else {
 761                         mask = (u64)0x1<<v.channel;
 762                 }
 763                 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
 764                         (u32)(mask>>32),(u32)(mask&0xffffffff),
 765                         (u32)(ohci->ISO_channel_usage>>32),
 766                         (u32)(ohci->ISO_channel_usage&0xffffffff));
 767                 if (ohci->ISO_channel_usage & mask) {
 768                         PRINT(KERN_ERR, ohci->host->id,
 769                               "Channel %d is already taken", v.channel);
 770                         return -EBUSY;
 771                 }
 772
 773                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
 774                         PRINT(KERN_ERR, ohci->host->id,
 775                               "Invalid %d length buffer requested",v.buf_size);
 776                         return -EINVAL;
 777                 }
 778
 779                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
 780                         PRINT(KERN_ERR, ohci->host->id,
 781                               "Invalid %d buffers requested",v.nb_buffers);
 782                         return -EINVAL;
 783                 }
 784
 785                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
 786                         PRINT(KERN_ERR, ohci->host->id,
 787                               "%d buffers of size %d bytes is too big",
 788                               v.nb_buffers, v.buf_size);
 789                         return -EINVAL;
 790                 }
 791
 792                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
 793                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
 794                                               v.nb_buffers + 1, v.buf_size,
 795                                               v.channel, 0);
 796
 797                         if (d == NULL) {
 798                                 PRINT(KERN_ERR, ohci->host->id,
 799                                       "Couldn't allocate ir context");
 800                                 return -EAGAIN;
 801                         }
 802                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
 803
 804                         ctx->current_ctx = d;
 805
 806                         v.buf_size = d->buf_size;
 807                         list_add_tail(&d->link, &ctx->context_list);
 808
 809                         PRINT(KERN_INFO, ohci->host->id,
 810                               "iso context %d listen on channel %d",
 811                               d->ctx, v.channel);
 812                 }
 813                 else {
 814                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
 815                                               v.nb_buffers + 1, v.buf_size,
 816                                               v.channel, v.packet_size);
 817
 818                         if (d == NULL) {
 819                                 PRINT(KERN_ERR, ohci->host->id,
 820                                       "Couldn't allocate it context");
 821                                 return -EAGAIN;
 822                         }
 823                         initialize_dma_it_ctx(d, v.sync_tag,
 824                                               v.syt_offset, v.flags);
 825
 826                         ctx->current_ctx = d;
 827
 828                         v.buf_size = d->buf_size;
 829
 830                         list_add_tail(&d->link, &ctx->context_list);
 831
 832                         PRINT(KERN_INFO, ohci->host->id,
 833                               "Iso context %d talk on channel %d", d->ctx,
 834                               v.channel);
 835                 }
 836
 837                 if (copy_to_user(argp, &v, sizeof(v))) {
 838                         /* FIXME : free allocated dma resources */
 839                         return -EFAULT;
 840                 }
 841
 842                 ohci->ISO_channel_usage |= mask;
 843
 844                 return 0;
 845         }
 846         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
 847         case VIDEO1394_IOC_UNTALK_CHANNEL:
 848         {
 849                 int channel;
 850                 u64 mask;
 851                 struct dma_iso_ctx *d;
 852
 853                 if (copy_from_user(&channel, argp, sizeof(int)))
 854                         return -EFAULT;
 855
 856                 if (channel < 0 || channel >= ISO_CHANNELS) {
 857                         PRINT(KERN_ERR, ohci->host->id,
 858                               "Iso channel %d out of bound", channel);
 859                         return -EINVAL;
 860                 }
 861                 mask = (u64)0x1<<channel;
 862                 if (!(ohci->ISO_channel_usage & mask)) {
 863                         PRINT(KERN_ERR, ohci->host->id,
 864                               "Channel %d is not being used", channel);
 865                         return -ESRCH;
 866                 }
 867
 868                 /* Mark this channel as unused */
 869                 ohci->ISO_channel_usage &= ~mask;
 870
 871                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
 872                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
 873                 else
 874                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
 875
 876                 if (d == NULL) return -ESRCH;
 877                 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
 878                       "stop talking on channel %d", d->ctx, channel);
 879                 free_dma_iso_ctx(d);
 880
 881                 return 0;
 882         }
 883         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
 884         {
 885                 struct video1394_wait v;
 886                 struct dma_iso_ctx *d;
 887                 int next_prg;
 888
 889                 if (copy_from_user(&v, argp, sizeof(v)))
 890                         return -EFAULT;
 891
 892                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 893                 if (d == NULL) return -EFAULT;
 894
 895                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
 896                         PRINT(KERN_ERR, ohci->host->id,
 897                               "Buffer %d out of range",v.buffer);
 898                         return -EINVAL;
 899                 }
 900
 901                 spin_lock_irqsave(&d->lock,flags);
 902
 903                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
 904                         PRINT(KERN_ERR, ohci->host->id,
 905                               "Buffer %d is already used",v.buffer);
 906                         spin_unlock_irqrestore(&d->lock,flags);
 907                         return -EBUSY;
 908                 }
 909
 910                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
 911
 912                 next_prg = (d->last_buffer + 1) % d->num_desc;
 913                 if (d->last_buffer>=0)
 914                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
 915                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
 916                                         & 0xfffffff0) | 0x1);
 917
 918                 d->last_buffer = next_prg;
 919                 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
 920
 921                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
 922
 923                 spin_unlock_irqrestore(&d->lock,flags);
 924
 925                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
 926                 {
 927                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
 928
 929                         /* Tell the controller where the first program is */
 930                         reg_write(ohci, d->cmdPtr,
 931                                   dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
 932
 933                         /* Run IR context */
 934                         reg_write(ohci, d->ctrlSet, 0x8000);
 935                 }
 936                 else {
 937                         /* Wake up dma context if necessary */
 938                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
 939                                 PRINT(KERN_INFO, ohci->host->id,
 940                                       "Waking up iso dma ctx=%d", d->ctx);
 941                                 reg_write(ohci, d->ctrlSet, 0x1000);
 942                         }
 943                 }
 944                 return 0;
 945
 946         }
 947         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
 948         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
 949         {
 950                 struct video1394_wait v;
 951                 struct dma_iso_ctx *d;
 952                 int i = 0;
 953
 954                 if (copy_from_user(&v, argp, sizeof(v)))
 955                         return -EFAULT;
 956
 957                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 958                 if (d == NULL) return -EFAULT;
 959
 960                 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
 961                         PRINT(KERN_ERR, ohci->host->id,
 962                               "Buffer %d out of range",v.buffer);
 963                         return -EINVAL;
 964                 }
 965
 966                 /*
 967                  * I change the way it works so that it returns
 968                  * the last received frame.
 969                  */
 970                 spin_lock_irqsave(&d->lock, flags);
 971                 switch(d->buffer_status[v.buffer]) {
 972                 case VIDEO1394_BUFFER_READY:
 973                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 974                         break;
 975                 case VIDEO1394_BUFFER_QUEUED:
 976                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
 977                             /* for polling, return error code EINTR */
 978                             spin_unlock_irqrestore(&d->lock, flags);
 979                             return -EINTR;
 980                         }
 981
 982                         spin_unlock_irqrestore(&d->lock, flags);
 983                         wait_event_interruptible(d->waitq,
 984                                         video1394_buffer_state(d, v.buffer) ==
 985                                          VIDEO1394_BUFFER_READY);
 986                         if (signal_pending(current))
 987                                 return -EINTR;
 988                         spin_lock_irqsave(&d->lock, flags);
 989                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 990                         break;
 991                 default:
 992                         PRINT(KERN_ERR, ohci->host->id,
 993                               "Buffer %d is not queued",v.buffer);
 994                         spin_unlock_irqrestore(&d->lock, flags);
 995                         return -ESRCH;
 996                 }
 997
 998                 /* set time of buffer */
 999                 v.filltime = d->buffer_time[v.buffer];
1000
1001                 /*
1002                  * Look ahead to see how many more buffers have been received
1003                  */
1004                 i=0;
1005                 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1006                        VIDEO1394_BUFFER_READY) {
1007                         v.buffer=(v.buffer+1)%(d->num_desc - 1);
1008                         i++;
1009                 }
1010                 spin_unlock_irqrestore(&d->lock, flags);
1011
1012                 v.buffer=i;
1013                 if (copy_to_user(argp, &v, sizeof(v)))
1014                         return -EFAULT;
1015
1016                 return 0;
1017         }
1018         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1019         {
1020                 struct video1394_wait v;
1021                 unsigned int *psizes = NULL;
1022                 struct dma_iso_ctx *d;
1023                 int next_prg;
1024
1025                 if (copy_from_user(&v, argp, sizeof(v)))
1026                         return -EFAULT;
1027
1028                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1029                 if (d == NULL) return -EFAULT;
1030
1031                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1032                         PRINT(KERN_ERR, ohci->host->id,
1033                               "Buffer %d out of range",v.buffer);
1034                         return -EINVAL;
1035                 }
1036
1037                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1038                         int buf_size = d->nb_cmd * sizeof(*psizes);
1039                         struct video1394_queue_variable __user *p = argp;
1040                         unsigned int __user *qv;
1041
1042                         if (get_user(qv, &p->packet_sizes))
1043                                 return -EFAULT;
1044
1045                         psizes = kmalloc(buf_size, GFP_KERNEL);
1046                         if (!psizes)
1047                                 return -ENOMEM;
1048
1049                         if (copy_from_user(psizes, qv, buf_size)) {
1050                                 kfree(psizes);
1051                                 return -EFAULT;
1052                         }
1053                 }
1054
1055                 spin_lock_irqsave(&d->lock,flags);
1056
1057                 /* last_buffer is last_prg */
1058                 next_prg = (d->last_buffer + 1) % d->num_desc;
1059                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1060                         PRINT(KERN_ERR, ohci->host->id,
1061                               "Buffer %d is already used",v.buffer);
1062                         spin_unlock_irqrestore(&d->lock,flags);
1063                         kfree(psizes);
1064                         return -EBUSY;
1065                 }
1066
1067                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1068                         initialize_dma_it_prg_var_packet_queue(
1069                                 d, next_prg, psizes, ohci);
1070                 }
1071
1072                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1073
1074                 if (d->last_buffer >= 0) {
1075                         d->it_prg[d->last_buffer]
1076                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1077                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1078                                                 0) & 0xfffffff0) | 0x3);
1079
1080                         d->it_prg[d->last_buffer]
1081                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1082                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1083                                                 0) & 0xfffffff0) | 0x3);
1084                         d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1085                 }
1086                 d->last_buffer = next_prg;
1087                 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1088                 d->next_buffer[d->last_buffer] = -1;
1089
1090                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1091
1092                 spin_unlock_irqrestore(&d->lock,flags);
1093
1094                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1095                 {
1096                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1097                                d->ctx);
1098                         put_timestamp(ohci, d, d->last_buffer);
1099
1100                         /* Tell the controller where the first program is */
1101                         reg_write(ohci, d->cmdPtr,
1102                                 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1103
1104                         /* Run IT context */
1105                         reg_write(ohci, d->ctrlSet, 0x8000);
1106                 }
1107                 else {
1108                         /* Wake up dma context if necessary */
1109                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1110                                 PRINT(KERN_INFO, ohci->host->id,
1111                                       "Waking up iso transmit dma ctx=%d",
1112                                       d->ctx);
1113                                 put_timestamp(ohci, d, d->last_buffer);
1114                                 reg_write(ohci, d->ctrlSet, 0x1000);
1115                         }
1116                 }
1117
1118                 kfree(psizes);
1119                 return 0;
1120
1121         }
1122         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1123         {
1124                 struct video1394_wait v;
1125                 struct dma_iso_ctx *d;
1126
1127                 if (copy_from_user(&v, argp, sizeof(v)))
1128                         return -EFAULT;
1129
1130                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1131                 if (d == NULL) return -EFAULT;
1132
1133                 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1134                         PRINT(KERN_ERR, ohci->host->id,
1135                               "Buffer %d out of range",v.buffer);
1136                         return -EINVAL;
1137                 }
1138
1139                 switch(d->buffer_status[v.buffer]) {
1140                 case VIDEO1394_BUFFER_READY:
1141                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1142                         return 0;
1143                 case VIDEO1394_BUFFER_QUEUED:
1144                         wait_event_interruptible(d->waitq,
1145                                         (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1146                         if (signal_pending(current))
1147                                 return -EINTR;
1148                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1149                         return 0;
1150                 default:
1151                         PRINT(KERN_ERR, ohci->host->id,
1152                               "Buffer %d is not queued",v.buffer);
1153                         return -ESRCH;
1154                 }
1155         }
1156         default:
1157                 return -ENOTTY;
1158         }
1159 }
1160
1161 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1162 {
1163         int err;
1164         lock_kernel();
1165         err = __video1394_ioctl(file, cmd, arg);
1166         unlock_kernel();
1167         return err;
1168 }
1169
1170 /*
1171  *      This maps the vmalloced and reserved buffer to user space.
1172  *
1173  *  FIXME:
1174  *  - PAGE_READONLY should suffice!?
1175  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1176  *    But e.g. pte_alloc() does not work in modules ... :-(
1177  */
1178
1179 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1180 {
1181         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1182         int res = -EINVAL;
1183
1184         lock_kernel();
1185         if (ctx->current_ctx == NULL) {
1186                 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1187         } else
1188                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1189         unlock_kernel();
1190
1191         return res;
1192 }
1193
1194 static int video1394_open(struct inode *inode, struct file *file)
1195 {
1196         int i = ieee1394_file_to_instance(file);
1197         struct ti_ohci *ohci;
1198         struct file_ctx *ctx;
1199
1200         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1201         if (ohci == NULL)
1202                 return -EIO;
1203
1204         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1205         if (!ctx)  {
1206                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1207                 return -ENOMEM;
1208         }
1209
1210         ctx->ohci = ohci;
1211         INIT_LIST_HEAD(&ctx->context_list);
1212         ctx->current_ctx = NULL;
1213         file->private_data = ctx;
1214
1215         return 0;
1216 }
1217
1218 static int video1394_release(struct inode *inode, struct file *file)
1219 {
1220         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1221         struct ti_ohci *ohci = ctx->ohci;
1222         struct list_head *lh, *next;
1223         u64 mask;
1224
1225         lock_kernel();
1226         list_for_each_safe(lh, next, &ctx->context_list) {
1227                 struct dma_iso_ctx *d;
1228                 d = list_entry(lh, struct dma_iso_ctx, link);
1229                 mask = (u64) 1 << d->channel;
1230
1231                 if (!(ohci->ISO_channel_usage & mask))
1232                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1233                               "is not being used", d->channel);
1234                 else
1235                         ohci->ISO_channel_usage &= ~mask;
1236                 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1237                       "%d stop listening on channel %d",
1238                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1239                       d->ctx, d->channel);
1240                 free_dma_iso_ctx(d);
1241         }
1242
1243         kfree(ctx);
1244         file->private_data = NULL;
1245
1246         unlock_kernel();
1247         return 0;
1248 }
1249
1250 #ifdef CONFIG_COMPAT
1251 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1252 #endif
1253
1254 static struct cdev video1394_cdev;
1255 static struct file_operations video1394_fops=
1256 {
1257         .owner =        THIS_MODULE,
1258         .unlocked_ioctl = video1394_ioctl,
1259 #ifdef CONFIG_COMPAT
1260         .compat_ioctl = video1394_compat_ioctl,
1261 #endif
1262         .mmap =         video1394_mmap,
1263         .open =         video1394_open,
1264         .release =      video1394_release
1265 };
1266
1267 /*** HOTPLUG STUFF **********************************************************/
1268 /*
1269  * Export information about protocols/devices supported by this driver.
1270  */
1271 static struct ieee1394_device_id video1394_id_table[] = {
1272         {
1273                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1274                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1275                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1276         },
1277         {
1278                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1279                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1280                 .version        = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1281         },
1282         {
1283                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1284                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1285                 .version        = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1286         },
1287         { }
1288 };
1289
1290 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1291
1292 static struct hpsb_protocol_driver video1394_driver = {
1293         .name           = "1394 Digital Camera Driver",
1294         .id_table       = video1394_id_table,
1295         .driver         = {
1296                 .name   = VIDEO1394_DRIVER_NAME,
1297                 .bus    = &ieee1394_bus_type,
1298         },
1299 };
1300
1301
1302 static void video1394_add_host (struct hpsb_host *host)
1303 {
1304         struct ti_ohci *ohci;
1305         int minor;
1306
1307         /* We only work with the OHCI-1394 driver */
1308         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1309                 return;
1310
1311         ohci = (struct ti_ohci *)host->hostdata;
1312
1313         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1314                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1315                 return;
1316         }
1317
1318         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1319         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1320
1321         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1322         class_device_create(hpsb_protocol_class, NULL, MKDEV(
1323                 IEEE1394_MAJOR, minor),
1324                 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1325         devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1326                        S_IFCHR | S_IRUSR | S_IWUSR,
1327                        "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1328 }
1329
1330
1331 static void video1394_remove_host (struct hpsb_host *host)
1332 {
1333         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1334
1335         if (ohci) {
1336                 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1337                         IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1338                 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1339         }
1340
1341         return;
1342 }
1343
1344
1345 static struct hpsb_highlevel video1394_highlevel = {
1346         .name =         VIDEO1394_DRIVER_NAME,
1347         .add_host =     video1394_add_host,
1348         .remove_host =  video1394_remove_host,
1349 };
1350
1351 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1352 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1353 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1354 MODULE_LICENSE("GPL");
1355
1356 #ifdef CONFIG_COMPAT
1357
1358 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1359         _IOW ('#', 0x12, struct video1394_wait32)
1360 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1361         _IOWR('#', 0x13, struct video1394_wait32)
1362 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1363         _IOW ('#', 0x17, struct video1394_wait32)
1364 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1365         _IOWR('#', 0x18, struct video1394_wait32)
1366
1367 struct video1394_wait32 {
1368         u32 channel;
1369         u32 buffer;
1370         struct compat_timeval filltime;
1371 };
1372
1373 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1374 {
1375         struct video1394_wait32 __user *argp = (void __user *)arg;
1376         struct video1394_wait32 wait32;
1377         struct video1394_wait wait;
1378         mm_segment_t old_fs;
1379         int ret;
1380
1381         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1382                 return -EFAULT;
1383
1384         wait.channel = wait32.channel;
1385         wait.buffer = wait32.buffer;
1386         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1387         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1388
1389         old_fs = get_fs();
1390         set_fs(KERNEL_DS);
1391         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1392                 ret = video1394_ioctl(file,
1393                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1394                                       (unsigned long) &wait);
1395         else
1396                 ret = video1394_ioctl(file,
1397                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1398                                       (unsigned long) &wait);
1399         set_fs(old_fs);
1400
1401         if (!ret) {
1402                 wait32.channel = wait.channel;
1403                 wait32.buffer = wait.buffer;
1404                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1405                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1406
1407                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1408                         ret = -EFAULT;
1409         }
1410
1411         return ret;
1412 }
1413
1414 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1415 {
1416         struct video1394_wait32 wait32;
1417         struct video1394_wait wait;
1418         mm_segment_t old_fs;
1419         int ret;
1420
1421         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1422                 return -EFAULT;
1423
1424         wait.channel = wait32.channel;
1425         wait.buffer = wait32.buffer;
1426         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1427         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1428
1429         old_fs = get_fs();
1430         set_fs(KERNEL_DS);
1431         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1432                 ret = video1394_ioctl(file,
1433                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1434                                       (unsigned long) &wait);
1435         else
1436                 ret = video1394_ioctl(file,
1437                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1438                                       (unsigned long) &wait);
1439         set_fs(old_fs);
1440
1441         return ret;
1442 }
1443
1444 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1445 {
1446         return -EFAULT;   /* ??? was there before. */
1447
1448         return video1394_ioctl(file,
1449                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1450 }
1451
1452 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1453 {
1454         switch (cmd) {
1455         case VIDEO1394_IOC_LISTEN_CHANNEL:
1456         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1457         case VIDEO1394_IOC_TALK_CHANNEL:
1458         case VIDEO1394_IOC_UNTALK_CHANNEL:
1459                 return video1394_ioctl(f, cmd, arg);
1460
1461         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1462                 return video1394_w_wait32(f, cmd, arg);
1463         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1464                 return video1394_wr_wait32(f, cmd, arg);
1465         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1466                 return video1394_queue_buf32(f, cmd, arg);
1467         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1468                 return video1394_w_wait32(f, cmd, arg);
1469         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1470                 return video1394_wr_wait32(f, cmd, arg);
1471         default:
1472                 return -ENOIOCTLCMD;
1473         }
1474 }
1475
1476 #endif /* CONFIG_COMPAT */
1477
1478 static void __exit video1394_exit_module (void)
1479 {
1480         hpsb_unregister_protocol(&video1394_driver);
1481
1482         hpsb_unregister_highlevel(&video1394_highlevel);
1483
1484         devfs_remove(VIDEO1394_DRIVER_NAME);
1485         cdev_del(&video1394_cdev);
1486
1487         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1488 }
1489
1490 static int __init video1394_init_module (void)
1491 {
1492         int ret;
1493
1494         cdev_init(&video1394_cdev, &video1394_fops);
1495         video1394_cdev.owner = THIS_MODULE;
1496         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1497         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1498         if (ret) {
1499                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1500                 return ret;
1501         }
1502
1503         devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1504
1505         hpsb_register_highlevel(&video1394_highlevel);
1506
1507         ret = hpsb_register_protocol(&video1394_driver);
1508         if (ret) {
1509                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1510                 hpsb_unregister_highlevel(&video1394_highlevel);
1511                 devfs_remove(VIDEO1394_DRIVER_NAME);
1512                 cdev_del(&video1394_cdev);
1513                 return ret;
1514         }
1515
1516         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1517         return 0;
1518 }
1519
1520
1521 module_init(video1394_init_module);
1522 module_exit(video1394_exit_module);