2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
12 #include <asm/asmmacro.h>
13 #include <asm/regdef.h>
14 #include <asm/mipsregs.h>
15 #include <asm/stackframe.h>
16 #include <asm/isadep.h>
17 #include <asm/thread_info.h>
19 #ifdef CONFIG_MIPS_MT_SMTC
20 #include <asm/mipsmtregs.h>
23 #ifndef CONFIG_PREEMPT
24 #define resume_kernel restore_all
26 #define __ret_from_irq ret_from_exception
31 #ifndef CONFIG_PREEMPT
32 FEXPORT(ret_from_exception)
33 local_irq_disable # preempt stop
37 LONG_S s0, TI_REGS($28)
38 FEXPORT(__ret_from_irq)
39 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
41 beqz t0, resume_kernel
44 local_irq_disable # make sure we dont miss an
45 # interrupt setting need_resched
46 # between sampling and return
47 LONG_L a2, TI_FLAGS($28) # current->work
48 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
55 lw t0, TI_PRE_COUNT($28)
58 LONG_L t0, TI_FLAGS($28)
59 andi t1, t0, _TIF_NEED_RESCHED
61 LONG_L t0, PT_STATUS(sp) # Interrupts off?
64 jal preempt_schedule_irq
68 FEXPORT(ret_from_fork)
69 jal schedule_tail # a0 = struct task_struct *prev
72 local_irq_disable # make sure need_resched and
73 # signals dont change between
75 LONG_L a2, TI_FLAGS($28) # current->work
76 li t0, _TIF_ALLWORK_MASK
78 bnez t0, syscall_exit_work
80 FEXPORT(restore_all) # restore full frame
81 #ifdef CONFIG_MIPS_MT_SMTC
82 /* Detect and execute deferred IPI "interrupts" */
83 LONG_L s0, TI_REGS($28)
84 LONG_S sp, TI_REGS($28)
86 LONG_S s0, TI_REGS($28)
87 #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
88 /* Re-arm any temporarily masked interrupts not explicitly "acked" */
90 ori v1, v0, TCSTATUS_IXMT
92 andi v0, TCSTATUS_IXMT
94 mfc0 t0, CP0_TCCONTEXT
102 andi t1, t1, VPECONTROL_TE
106 mfc0 v1, CP0_TCSTATUS
107 /* We set IXMT above, XOR should clear it here */
108 xori v1, v1, TCSTATUS_IXMT
110 mtc0 v1, CP0_TCSTATUS
113 mtc0 t0, CP0_TCCONTEXT
114 #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
115 #endif /* CONFIG_MIPS_MT_SMTC */
120 FEXPORT(restore_partial) # restore partial frame
121 #ifdef CONFIG_TRACE_IRQFLAGS
125 LONG_L v0, PT_STATUS(sp)
126 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
132 jal trace_hardirqs_on
134 1: jal trace_hardirqs_off
145 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
146 beqz t0, work_notifysig
150 local_irq_disable # make sure need_resched and
151 # signals dont change between
152 # sampling and return
153 LONG_L a2, TI_FLAGS($28)
154 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
155 # other than syscall tracing?
157 andi t0, a2, _TIF_NEED_RESCHED
158 bnez t0, work_resched
160 work_notifysig: # deal with pending signals and
161 # notify-resume requests
164 jal do_notify_resume # a2 already loaded
167 FEXPORT(syscall_exit_work_partial)
170 li t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
171 and t0, a2 # a2 is preloaded with TI_FLAGS
172 beqz t0, work_pending # trace bit set?
173 local_irq_enable # could let do_syscall_trace()
174 # call schedule() instead
180 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
183 * MIPS32R2 Instruction Hazard Barrier - must be called
185 * For C code use the inline version named instruction_hazard().
193 #endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */