Merge branch 'core/locking' of git://git.kernel.org/pub/scm/linux/kernel/git/tip...
[linux-2.6] / arch / x86 / kernel / irq_32.c
1 /*
2  *      Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
3  *
4  * This file contains the lowest level x86-specific interrupt
5  * entry, irq-stacks and irq statistics code. All the remaining
6  * irq logic is done by the generic kernel/irq/ code and
7  * by the x86-specific irq controller code. (e.g. i8259.c and
8  * io_apic.c.)
9  */
10
11 #include <linux/module.h>
12 #include <linux/seq_file.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/notifier.h>
16 #include <linux/cpu.h>
17 #include <linux/delay.h>
18
19 #include <asm/apic.h>
20 #include <asm/uaccess.h>
21
22 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
23 EXPORT_PER_CPU_SYMBOL(irq_stat);
24
25 DEFINE_PER_CPU(struct pt_regs *, irq_regs);
26 EXPORT_PER_CPU_SYMBOL(irq_regs);
27
28 /*
29  * 'what should we do if we get a hw irq event on an illegal vector'.
30  * each architecture has to answer this themselves.
31  */
32 void ack_bad_irq(unsigned int irq)
33 {
34         printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq);
35
36 #ifdef CONFIG_X86_LOCAL_APIC
37         /*
38          * Currently unexpected vectors happen only on SMP and APIC.
39          * We _must_ ack these because every local APIC has only N
40          * irq slots per priority level, and a 'hanging, unacked' IRQ
41          * holds up an irq slot - in excessive cases (when multiple
42          * unexpected vectors occur) that might lock up the APIC
43          * completely.
44          * But only ack when the APIC is enabled -AK
45          */
46         if (cpu_has_apic)
47                 ack_APIC_irq();
48 #endif
49 }
50
51 #ifdef CONFIG_DEBUG_STACKOVERFLOW
52 /* Debugging check for stack overflow: is there less than 1KB free? */
53 static int check_stack_overflow(void)
54 {
55         long sp;
56
57         __asm__ __volatile__("andl %%esp,%0" :
58                              "=r" (sp) : "0" (THREAD_SIZE - 1));
59
60         return sp < (sizeof(struct thread_info) + STACK_WARN);
61 }
62
63 static void print_stack_overflow(void)
64 {
65         printk(KERN_WARNING "low stack detected by irq handler\n");
66         dump_stack();
67 }
68
69 #else
70 static inline int check_stack_overflow(void) { return 0; }
71 static inline void print_stack_overflow(void) { }
72 #endif
73
74 #ifdef CONFIG_4KSTACKS
75 /*
76  * per-CPU IRQ handling contexts (thread information and stack)
77  */
78 union irq_ctx {
79         struct thread_info      tinfo;
80         u32                     stack[THREAD_SIZE/sizeof(u32)];
81 };
82
83 static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
84 static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
85
86 static char softirq_stack[NR_CPUS * THREAD_SIZE]
87                 __attribute__((__section__(".bss.page_aligned")));
88
89 static char hardirq_stack[NR_CPUS * THREAD_SIZE]
90                 __attribute__((__section__(".bss.page_aligned")));
91
92 static void call_on_stack(void *func, void *stack)
93 {
94         asm volatile("xchgl     %%ebx,%%esp     \n"
95                      "call      *%%edi          \n"
96                      "movl      %%ebx,%%esp     \n"
97                      : "=b" (stack)
98                      : "0" (stack),
99                        "D"(func)
100                      : "memory", "cc", "edx", "ecx", "eax");
101 }
102
103 static inline int
104 execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
105 {
106         union irq_ctx *curctx, *irqctx;
107         u32 *isp, arg1, arg2;
108
109         curctx = (union irq_ctx *) current_thread_info();
110         irqctx = hardirq_ctx[smp_processor_id()];
111
112         /*
113          * this is where we switch to the IRQ stack. However, if we are
114          * already using the IRQ stack (because we interrupted a hardirq
115          * handler) we can't do that and just have to keep using the
116          * current stack (which is the irq stack already after all)
117          */
118         if (unlikely(curctx == irqctx))
119                 return 0;
120
121         /* build the stack frame on the IRQ stack */
122         isp = (u32 *) ((char*)irqctx + sizeof(*irqctx));
123         irqctx->tinfo.task = curctx->tinfo.task;
124         irqctx->tinfo.previous_esp = current_stack_pointer;
125
126         /*
127          * Copy the softirq bits in preempt_count so that the
128          * softirq checks work in the hardirq context.
129          */
130         irqctx->tinfo.preempt_count =
131                 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
132                 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
133
134         if (unlikely(overflow))
135                 call_on_stack(print_stack_overflow, isp);
136
137         asm volatile("xchgl     %%ebx,%%esp     \n"
138                      "call      *%%edi          \n"
139                      "movl      %%ebx,%%esp     \n"
140                      : "=a" (arg1), "=d" (arg2), "=b" (isp)
141                      :  "0" (irq),   "1" (desc),  "2" (isp),
142                         "D" (desc->handle_irq)
143                      : "memory", "cc", "ecx");
144         return 1;
145 }
146
147 /*
148  * allocate per-cpu stacks for hardirq and for softirq processing
149  */
150 void __cpuinit irq_ctx_init(int cpu)
151 {
152         union irq_ctx *irqctx;
153
154         if (hardirq_ctx[cpu])
155                 return;
156
157         irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
158         irqctx->tinfo.task              = NULL;
159         irqctx->tinfo.exec_domain       = NULL;
160         irqctx->tinfo.cpu               = cpu;
161         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
162         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
163
164         hardirq_ctx[cpu] = irqctx;
165
166         irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
167         irqctx->tinfo.task              = NULL;
168         irqctx->tinfo.exec_domain       = NULL;
169         irqctx->tinfo.cpu               = cpu;
170         irqctx->tinfo.preempt_count     = 0;
171         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
172
173         softirq_ctx[cpu] = irqctx;
174
175         printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n",
176                cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
177 }
178
179 void irq_ctx_exit(int cpu)
180 {
181         hardirq_ctx[cpu] = NULL;
182 }
183
184 asmlinkage void do_softirq(void)
185 {
186         unsigned long flags;
187         struct thread_info *curctx;
188         union irq_ctx *irqctx;
189         u32 *isp;
190
191         if (in_interrupt())
192                 return;
193
194         local_irq_save(flags);
195
196         if (local_softirq_pending()) {
197                 curctx = current_thread_info();
198                 irqctx = softirq_ctx[smp_processor_id()];
199                 irqctx->tinfo.task = curctx->task;
200                 irqctx->tinfo.previous_esp = current_stack_pointer;
201
202                 /* build the stack frame on the softirq stack */
203                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
204
205                 call_on_stack(__do_softirq, isp);
206                 /*
207                  * Shouldnt happen, we returned above if in_interrupt():
208                  */
209                 WARN_ON_ONCE(softirq_count());
210         }
211
212         local_irq_restore(flags);
213 }
214
215 #else
216 static inline int
217 execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
218 #endif
219
220 /*
221  * do_IRQ handles all normal device IRQ's (the special
222  * SMP cross-CPU interrupts have their own specific
223  * handlers).
224  */
225 unsigned int do_IRQ(struct pt_regs *regs)
226 {
227         struct pt_regs *old_regs;
228         /* high bit used in ret_from_ code */
229         int overflow, irq = ~regs->orig_ax;
230         struct irq_desc *desc = irq_desc + irq;
231
232         if (unlikely((unsigned)irq >= NR_IRQS)) {
233                 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
234                                         __func__, irq);
235                 BUG();
236         }
237
238         old_regs = set_irq_regs(regs);
239         irq_enter();
240
241         overflow = check_stack_overflow();
242
243         if (!execute_on_irq_stack(overflow, desc, irq)) {
244                 if (unlikely(overflow))
245                         print_stack_overflow();
246                 desc->handle_irq(irq, desc);
247         }
248
249         irq_exit();
250         set_irq_regs(old_regs);
251         return 1;
252 }
253
254 /*
255  * Interrupt statistics:
256  */
257
258 atomic_t irq_err_count;
259
260 /*
261  * /proc/interrupts printing:
262  */
263
264 int show_interrupts(struct seq_file *p, void *v)
265 {
266         int i = *(loff_t *) v, j;
267         struct irqaction * action;
268         unsigned long flags;
269
270         if (i == 0) {
271                 seq_printf(p, "           ");
272                 for_each_online_cpu(j)
273                         seq_printf(p, "CPU%-8d",j);
274                 seq_putc(p, '\n');
275         }
276
277         if (i < NR_IRQS) {
278                 unsigned any_count = 0;
279
280                 spin_lock_irqsave(&irq_desc[i].lock, flags);
281 #ifndef CONFIG_SMP
282                 any_count = kstat_irqs(i);
283 #else
284                 for_each_online_cpu(j)
285                         any_count |= kstat_cpu(j).irqs[i];
286 #endif
287                 action = irq_desc[i].action;
288                 if (!action && !any_count)
289                         goto skip;
290                 seq_printf(p, "%3d: ",i);
291 #ifndef CONFIG_SMP
292                 seq_printf(p, "%10u ", kstat_irqs(i));
293 #else
294                 for_each_online_cpu(j)
295                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
296 #endif
297                 seq_printf(p, " %8s", irq_desc[i].chip->name);
298                 seq_printf(p, "-%-8s", irq_desc[i].name);
299
300                 if (action) {
301                         seq_printf(p, "  %s", action->name);
302                         while ((action = action->next) != NULL)
303                                 seq_printf(p, ", %s", action->name);
304                 }
305
306                 seq_putc(p, '\n');
307 skip:
308                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
309         } else if (i == NR_IRQS) {
310                 seq_printf(p, "NMI: ");
311                 for_each_online_cpu(j)
312                         seq_printf(p, "%10u ", nmi_count(j));
313                 seq_printf(p, "  Non-maskable interrupts\n");
314 #ifdef CONFIG_X86_LOCAL_APIC
315                 seq_printf(p, "LOC: ");
316                 for_each_online_cpu(j)
317                         seq_printf(p, "%10u ",
318                                 per_cpu(irq_stat,j).apic_timer_irqs);
319                 seq_printf(p, "  Local timer interrupts\n");
320 #endif
321 #ifdef CONFIG_SMP
322                 seq_printf(p, "RES: ");
323                 for_each_online_cpu(j)
324                         seq_printf(p, "%10u ",
325                                 per_cpu(irq_stat,j).irq_resched_count);
326                 seq_printf(p, "  Rescheduling interrupts\n");
327                 seq_printf(p, "CAL: ");
328                 for_each_online_cpu(j)
329                         seq_printf(p, "%10u ",
330                                 per_cpu(irq_stat,j).irq_call_count);
331                 seq_printf(p, "  function call interrupts\n");
332                 seq_printf(p, "TLB: ");
333                 for_each_online_cpu(j)
334                         seq_printf(p, "%10u ",
335                                 per_cpu(irq_stat,j).irq_tlb_count);
336                 seq_printf(p, "  TLB shootdowns\n");
337 #endif
338 #ifdef CONFIG_X86_MCE
339                 seq_printf(p, "TRM: ");
340                 for_each_online_cpu(j)
341                         seq_printf(p, "%10u ",
342                                 per_cpu(irq_stat,j).irq_thermal_count);
343                 seq_printf(p, "  Thermal event interrupts\n");
344 #endif
345 #ifdef CONFIG_X86_LOCAL_APIC
346                 seq_printf(p, "SPU: ");
347                 for_each_online_cpu(j)
348                         seq_printf(p, "%10u ",
349                                 per_cpu(irq_stat,j).irq_spurious_count);
350                 seq_printf(p, "  Spurious interrupts\n");
351 #endif
352                 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
353 #if defined(CONFIG_X86_IO_APIC)
354                 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
355 #endif
356         }
357         return 0;
358 }
359
360 /*
361  * /proc/stat helpers
362  */
363 u64 arch_irq_stat_cpu(unsigned int cpu)
364 {
365         u64 sum = nmi_count(cpu);
366
367 #ifdef CONFIG_X86_LOCAL_APIC
368         sum += per_cpu(irq_stat, cpu).apic_timer_irqs;
369 #endif
370 #ifdef CONFIG_SMP
371         sum += per_cpu(irq_stat, cpu).irq_resched_count;
372         sum += per_cpu(irq_stat, cpu).irq_call_count;
373         sum += per_cpu(irq_stat, cpu).irq_tlb_count;
374 #endif
375 #ifdef CONFIG_X86_MCE
376         sum += per_cpu(irq_stat, cpu).irq_thermal_count;
377 #endif
378 #ifdef CONFIG_X86_LOCAL_APIC
379         sum += per_cpu(irq_stat, cpu).irq_spurious_count;
380 #endif
381         return sum;
382 }
383
384 u64 arch_irq_stat(void)
385 {
386         u64 sum = atomic_read(&irq_err_count);
387
388 #ifdef CONFIG_X86_IO_APIC
389         sum += atomic_read(&irq_mis_count);
390 #endif
391         return sum;
392 }
393
394 #ifdef CONFIG_HOTPLUG_CPU
395 #include <mach_apic.h>
396
397 void fixup_irqs(cpumask_t map)
398 {
399         unsigned int irq;
400         static int warned;
401
402         for (irq = 0; irq < NR_IRQS; irq++) {
403                 cpumask_t mask;
404                 if (irq == 2)
405                         continue;
406
407                 cpus_and(mask, irq_desc[irq].affinity, map);
408                 if (any_online_cpu(mask) == NR_CPUS) {
409                         printk("Breaking affinity for irq %i\n", irq);
410                         mask = map;
411                 }
412                 if (irq_desc[irq].chip->set_affinity)
413                         irq_desc[irq].chip->set_affinity(irq, mask);
414                 else if (irq_desc[irq].action && !(warned++))
415                         printk("Cannot set affinity for irq %i\n", irq);
416         }
417
418 #if 0
419         barrier();
420         /* Ingo Molnar says: "after the IO-APIC masks have been redirected
421            [note the nop - the interrupt-enable boundary on x86 is two
422            instructions from sti] - to flush out pending hardirqs and
423            IPIs. After this point nothing is supposed to reach this CPU." */
424         __asm__ __volatile__("sti; nop; cli");
425         barrier();
426 #else
427         /* That doesn't seem sufficient.  Give it 1ms. */
428         local_irq_enable();
429         mdelay(1);
430         local_irq_disable();
431 #endif
432 }
433 #endif
434