2 * Low-level parallel-support for PC-style hardware integrated in the
3 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
13 * based on parport_pc.c by
14 * Grant Guenther <grant@torque.net>
15 * Phil Blundell <philb@gnu.org>
16 * Tim Waugh <tim@cyberelk.demon.co.uk>
17 * Jose Renau <renau@acm.org>
22 #undef DEBUG /* undef for production */
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/interrupt.h>
29 #include <linux/ioport.h>
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/pci.h>
33 #include <linux/sysctl.h>
37 #include <asm/uaccess.h>
38 #include <asm/superio.h>
40 #include <linux/parport.h>
42 #include <asm/parisc-device.h>
43 #include <asm/hardware.h>
44 #include "parport_gsc.h"
47 MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
48 MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
49 MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
50 MODULE_LICENSE("GPL");
54 * Clear TIMEOUT BIT in EPP MODE
56 * This is also used in SPP detection.
58 static int clear_epp_timeout(struct parport *pb)
62 if (!(parport_gsc_read_status(pb) & 0x01))
65 /* To clear timeout some chips require double read */
66 parport_gsc_read_status(pb);
67 r = parport_gsc_read_status(pb);
68 parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
69 parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
70 r = parport_gsc_read_status(pb);
78 * Most of these aren't static because they may be used by the
79 * parport_xxx_yyy macros. extern __inline__ versions of several
80 * of these are in parport_gsc.h.
83 void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
85 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
88 void parport_gsc_save_state(struct parport *p, struct parport_state *s)
90 s->u.pc.ctr = parport_readb (CONTROL (p));
93 void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
95 parport_writeb (s->u.pc.ctr, CONTROL (p));
98 struct parport_operations parport_gsc_ops =
100 .write_data = parport_gsc_write_data,
101 .read_data = parport_gsc_read_data,
103 .write_control = parport_gsc_write_control,
104 .read_control = parport_gsc_read_control,
105 .frob_control = parport_gsc_frob_control,
107 .read_status = parport_gsc_read_status,
109 .enable_irq = parport_gsc_enable_irq,
110 .disable_irq = parport_gsc_disable_irq,
112 .data_forward = parport_gsc_data_forward,
113 .data_reverse = parport_gsc_data_reverse,
115 .init_state = parport_gsc_init_state,
116 .save_state = parport_gsc_save_state,
117 .restore_state = parport_gsc_restore_state,
119 .epp_write_data = parport_ieee1284_epp_write_data,
120 .epp_read_data = parport_ieee1284_epp_read_data,
121 .epp_write_addr = parport_ieee1284_epp_write_addr,
122 .epp_read_addr = parport_ieee1284_epp_read_addr,
124 .ecp_write_data = parport_ieee1284_ecp_write_data,
125 .ecp_read_data = parport_ieee1284_ecp_read_data,
126 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
128 .compat_write_data = parport_ieee1284_write_compat,
129 .nibble_read_data = parport_ieee1284_read_nibble,
130 .byte_read_data = parport_ieee1284_read_byte,
132 .owner = THIS_MODULE,
135 /* --- Mode detection ------------------------------------- */
138 * Checks for port existence, all ports support SPP MODE
140 static int __devinit parport_SPP_supported(struct parport *pb)
145 * first clear an eventually pending EPP timeout
146 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
147 * that does not even respond to SPP cycles if an EPP
150 clear_epp_timeout(pb);
152 /* Do a simple read-write test to make sure the port exists. */
154 parport_writeb (w, CONTROL (pb));
156 /* Is there a control register that we can read from? Some
157 * ports don't allow reads, so read_control just returns a
158 * software copy. Some ports _do_ allow reads, so bypass the
159 * software copy here. In addition, some bits aren't
161 r = parport_readb (CONTROL (pb));
162 if ((r & 0xf) == w) {
164 parport_writeb (w, CONTROL (pb));
165 r = parport_readb (CONTROL (pb));
166 parport_writeb (0xc, CONTROL (pb));
168 return PARPORT_MODE_PCSPP;
171 /* Try the data register. The data lines aren't tri-stated at
172 * this stage, so we expect back what we wrote. */
174 parport_gsc_write_data (pb, w);
175 r = parport_gsc_read_data (pb);
178 parport_gsc_write_data (pb, w);
179 r = parport_gsc_read_data (pb);
181 return PARPORT_MODE_PCSPP;
187 /* Detect PS/2 support.
189 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
190 * allows us to read data from the data lines. In theory we would get back
191 * 0xff but any peripheral attached to the port may drag some or all of the
192 * lines down to zero. So if we get back anything that isn't the contents
193 * of the data register we deem PS/2 support to be present.
195 * Some SPP ports have "half PS/2" ability - you can't turn off the line
196 * drivers, but an external peripheral with sufficiently beefy drivers of
197 * its own can overpower them and assert its own levels onto the bus, from
198 * where they can then be read back as normal. Ports with this property
199 * and the right type of device attached are likely to fail the SPP test,
200 * (as they will appear to have stuck bits) and so the fact that they might
201 * be misdetected here is rather academic.
204 static int __devinit parport_PS2_supported(struct parport *pb)
208 clear_epp_timeout(pb);
210 /* try to tri-state the buffer */
211 parport_gsc_data_reverse (pb);
213 parport_gsc_write_data(pb, 0x55);
214 if (parport_gsc_read_data(pb) != 0x55) ok++;
216 parport_gsc_write_data(pb, 0xaa);
217 if (parport_gsc_read_data(pb) != 0xaa) ok++;
219 /* cancel input mode */
220 parport_gsc_data_forward (pb);
223 pb->modes |= PARPORT_MODE_TRISTATE;
225 struct parport_gsc_private *priv = pb->private_data;
226 priv->ctr_writable &= ~0x20;
233 /* --- Initialisation code -------------------------------- */
235 struct parport *__devinit parport_gsc_probe_port (unsigned long base,
236 unsigned long base_hi,
240 struct parport_gsc_private *priv;
241 struct parport_operations *ops;
243 struct parport *p = &tmp;
245 priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
247 printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
250 ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
252 printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
257 memcpy (ops, &parport_gsc_ops, sizeof (struct parport_operations));
259 priv->ctr_writable = 0xff;
261 priv->dma_handle = 0;
264 p->base_hi = base_hi;
267 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
269 p->private_data = priv;
271 if (!parport_SPP_supported (p)) {
276 parport_PS2_supported (p);
278 if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
279 PARPORT_DMA_NONE, ops))) {
285 p->base_hi = base_hi;
286 p->modes = tmp.modes;
287 p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
288 p->private_data = priv;
290 printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
292 if (p->irq == PARPORT_IRQ_AUTO) {
293 p->irq = PARPORT_IRQ_NONE;
295 if (p->irq != PARPORT_IRQ_NONE) {
296 printk(", irq %d", p->irq);
298 if (p->dma == PARPORT_DMA_AUTO) {
299 p->dma = PARPORT_DMA_NONE;
302 if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
303 is mandatory (see above) */
304 p->dma = PARPORT_DMA_NONE;
307 #define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
320 if (p->irq != PARPORT_IRQ_NONE) {
321 if (request_irq (p->irq, parport_irq_handler,
323 printk (KERN_WARNING "%s: irq %d in use, "
324 "resorting to polled operation\n",
326 p->irq = PARPORT_IRQ_NONE;
327 p->dma = PARPORT_DMA_NONE;
331 /* Done probing. Now put the port into a sensible start-up state. */
333 parport_gsc_write_data(p, 0);
334 parport_gsc_data_forward (p);
336 /* Now that we've told the sharing engine about the port, and
337 found out its characteristics, let the high-level drivers
339 parport_announce_port (p);
345 #define PARPORT_GSC_OFFSET 0x800
347 static int __devinitdata parport_count;
349 static int __devinit parport_init_chip(struct parisc_device *dev)
355 printk(KERN_WARNING "IRQ not found for parallel device at 0x%llx\n",
356 (unsigned long long)dev->hpa.start);
360 port = dev->hpa.start + PARPORT_GSC_OFFSET;
362 /* some older machines with ASP-chip don't support
363 * the enhanced parport modes.
365 if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
367 /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
368 printk("%s: initialize bidirectional-mode.\n", __func__);
369 parport_writeb ( (0x10 + 0x20), port + 4);
372 printk("%s: enhanced parport-modes not supported.\n", __func__);
375 p = parport_gsc_probe_port(port, 0, dev->irq,
376 /* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, NULL);
379 dev->dev.driver_data = p;
384 static int __devexit parport_remove_chip(struct parisc_device *dev)
386 struct parport *p = dev->dev.driver_data;
388 struct parport_gsc_private *priv = p->private_data;
389 struct parport_operations *ops = p->ops;
390 parport_remove_port(p);
391 if (p->dma != PARPORT_DMA_NONE)
393 if (p->irq != PARPORT_IRQ_NONE)
396 pci_free_consistent(priv->dev, PAGE_SIZE,
399 kfree (p->private_data);
401 kfree (ops); /* hope no-one cached it */
406 static struct parisc_device_id parport_tbl[] = {
407 { HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
411 MODULE_DEVICE_TABLE(parisc, parport_tbl);
413 static struct parisc_driver parport_driver = {
415 .id_table = parport_tbl,
416 .probe = parport_init_chip,
417 .remove = __devexit_p(parport_remove_chip),
420 int __devinit parport_gsc_init(void)
422 return register_parisc_driver(&parport_driver);
425 static void __devexit parport_gsc_exit(void)
427 unregister_parisc_driver(&parport_driver);
430 module_init(parport_gsc_init);
431 module_exit(parport_gsc_exit);