2 * linux/drivers/char/clps711x.c
4 * Driver for CLPS711x serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $
28 #include <linux/config.h>
30 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/spinlock.h>
40 #include <linux/device.h>
41 #include <linux/tty.h>
42 #include <linux/tty_flip.h>
43 #include <linux/serial_core.h>
44 #include <linux/serial.h>
46 #include <asm/hardware.h>
49 #include <asm/hardware/clps7111.h>
53 #define SERIAL_CLPS711X_MAJOR 204
54 #define SERIAL_CLPS711X_MINOR 40
55 #define SERIAL_CLPS711X_NR UART_NR
58 * We use the relevant SYSCON register as a base address for these ports.
60 #define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1)
61 #define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1)
62 #define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1)
63 #define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1)
65 #define TX_IRQ(port) ((port)->irq)
66 #define RX_IRQ(port) ((port)->irq + 1)
68 #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
70 #define tx_enabled(port) ((port)->unused[0])
73 clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop)
75 if (tx_enabled(port)) {
76 disable_irq(TX_IRQ(port));
82 clps711xuart_start_tx(struct uart_port *port, unsigned int tty_start)
84 if (!tx_enabled(port)) {
85 enable_irq(TX_IRQ(port));
90 static void clps711xuart_stop_rx(struct uart_port *port)
92 disable_irq(RX_IRQ(port));
95 static void clps711xuart_enable_ms(struct uart_port *port)
99 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id, struct pt_regs *regs)
101 struct uart_port *port = dev_id;
102 struct tty_struct *tty = port->info->tty;
103 unsigned int status, ch, flg, ignored = 0;
105 status = clps_readl(SYSFLG(port));
106 while (!(status & SYSFLG_URXFE)) {
107 ch = clps_readl(UARTDR(port));
109 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
116 * Note that the error handling code is
117 * out of the main execution path
119 if (ch & UART_ANY_ERR)
122 if (uart_handle_sysrq_char(port, ch, regs))
126 tty_insert_flip_char(tty, ch, flg);
128 status = clps_readl(SYSFLG(port));
131 tty_flip_buffer_push(tty);
135 if (ch & UARTDR_PARERR)
136 port->icount.parity++;
137 else if (ch & UARTDR_FRMERR)
138 port->icount.frame++;
139 if (ch & UARTDR_OVERR)
140 port->icount.overrun++;
142 if (ch & port->ignore_status_mask) {
147 ch &= port->read_status_mask;
149 if (ch & UARTDR_PARERR)
151 else if (ch & UARTDR_FRMERR)
154 if (ch & UARTDR_OVERR) {
156 * CHECK: does overrun affect the current character?
157 * ASSUMPTION: it does not.
159 tty_insert_flip_char(tty, ch, flg);
169 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *regs)
171 struct uart_port *port = dev_id;
172 struct circ_buf *xmit = &port->info->xmit;
176 clps_writel(port->x_char, UARTDR(port));
181 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
182 clps711xuart_stop_tx(port, 0);
186 count = port->fifosize >> 1;
188 clps_writel(xmit->buf[xmit->tail], UARTDR(port));
189 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
191 if (uart_circ_empty(xmit))
193 } while (--count > 0);
195 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
196 uart_write_wakeup(port);
198 if (uart_circ_empty(xmit))
199 clps711xuart_stop_tx(port, 0);
204 static unsigned int clps711xuart_tx_empty(struct uart_port *port)
206 unsigned int status = clps_readl(SYSFLG(port));
207 return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
210 static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
212 unsigned int port_addr;
213 unsigned int result = 0;
216 port_addr = SYSFLG(port);
217 if (port_addr == SYSFLG1) {
218 status = clps_readl(SYSFLG1);
219 if (status & SYSFLG1_DCD)
221 if (status & SYSFLG1_DSR)
223 if (status & SYSFLG1_CTS)
231 clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
235 static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
240 spin_lock_irqsave(&port->lock, flags);
241 ubrlcr = clps_readl(UBRLCR(port));
242 if (break_state == -1)
243 ubrlcr |= UBRLCR_BREAK;
245 ubrlcr &= ~UBRLCR_BREAK;
246 clps_writel(ubrlcr, UBRLCR(port));
247 spin_unlock_irqrestore(&port->lock, flags);
250 static int clps711xuart_startup(struct uart_port *port)
255 tx_enabled(port) = 1;
260 retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
261 "clps711xuart_tx", port);
265 retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
266 "clps711xuart_rx", port);
268 free_irq(TX_IRQ(port), port);
275 syscon = clps_readl(SYSCON(port));
276 syscon |= SYSCON_UARTEN;
277 clps_writel(syscon, SYSCON(port));
282 static void clps711xuart_shutdown(struct uart_port *port)
284 unsigned int ubrlcr, syscon;
289 free_irq(TX_IRQ(port), port); /* TX interrupt */
290 free_irq(RX_IRQ(port), port); /* RX interrupt */
295 syscon = clps_readl(SYSCON(port));
296 syscon &= ~SYSCON_UARTEN;
297 clps_writel(syscon, SYSCON(port));
300 * disable break condition and fifos
302 ubrlcr = clps_readl(UBRLCR(port));
303 ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
304 clps_writel(ubrlcr, UBRLCR(port));
308 clps711xuart_set_termios(struct uart_port *port, struct termios *termios,
311 unsigned int ubrlcr, baud, quot;
315 * We don't implement CREAD.
317 termios->c_cflag |= CREAD;
320 * Ask the core to calculate the divisor for us.
322 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
323 quot = uart_get_divisor(port, baud);
325 switch (termios->c_cflag & CSIZE) {
327 ubrlcr = UBRLCR_WRDLEN5;
330 ubrlcr = UBRLCR_WRDLEN6;
333 ubrlcr = UBRLCR_WRDLEN7;
336 ubrlcr = UBRLCR_WRDLEN8;
339 if (termios->c_cflag & CSTOPB)
340 ubrlcr |= UBRLCR_XSTOP;
341 if (termios->c_cflag & PARENB) {
342 ubrlcr |= UBRLCR_PRTEN;
343 if (!(termios->c_cflag & PARODD))
344 ubrlcr |= UBRLCR_EVENPRT;
346 if (port->fifosize > 1)
347 ubrlcr |= UBRLCR_FIFOEN;
349 spin_lock_irqsave(&port->lock, flags);
352 * Update the per-port timeout.
354 uart_update_timeout(port, termios->c_cflag, baud);
356 port->read_status_mask = UARTDR_OVERR;
357 if (termios->c_iflag & INPCK)
358 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
361 * Characters to ignore
363 port->ignore_status_mask = 0;
364 if (termios->c_iflag & IGNPAR)
365 port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
366 if (termios->c_iflag & IGNBRK) {
368 * If we're ignoring parity and break indicators,
369 * ignore overruns to (for real raw support).
371 if (termios->c_iflag & IGNPAR)
372 port->ignore_status_mask |= UARTDR_OVERR;
377 clps_writel(ubrlcr | quot, UBRLCR(port));
379 spin_unlock_irqrestore(&port->lock, flags);
382 static const char *clps711xuart_type(struct uart_port *port)
384 return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
388 * Configure/autoconfigure the port.
390 static void clps711xuart_config_port(struct uart_port *port, int flags)
392 if (flags & UART_CONFIG_TYPE)
393 port->type = PORT_CLPS711X;
396 static void clps711xuart_release_port(struct uart_port *port)
400 static int clps711xuart_request_port(struct uart_port *port)
405 static struct uart_ops clps711x_pops = {
406 .tx_empty = clps711xuart_tx_empty,
407 .set_mctrl = clps711xuart_set_mctrl_null,
408 .get_mctrl = clps711xuart_get_mctrl,
409 .stop_tx = clps711xuart_stop_tx,
410 .start_tx = clps711xuart_start_tx,
411 .stop_rx = clps711xuart_stop_rx,
412 .enable_ms = clps711xuart_enable_ms,
413 .break_ctl = clps711xuart_break_ctl,
414 .startup = clps711xuart_startup,
415 .shutdown = clps711xuart_shutdown,
416 .set_termios = clps711xuart_set_termios,
417 .type = clps711xuart_type,
418 .config_port = clps711xuart_config_port,
419 .release_port = clps711xuart_release_port,
420 .request_port = clps711xuart_request_port,
423 static struct uart_port clps711x_ports[UART_NR] = {
426 .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
429 .ops = &clps711x_pops,
431 .flags = ASYNC_BOOT_AUTOCONF,
435 .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */
438 .ops = &clps711x_pops,
440 .flags = ASYNC_BOOT_AUTOCONF,
444 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
446 * Print a string to the serial port trying not to disturb
447 * any possible real use of the port...
449 * The console_lock must be held when we get here.
451 * Note that this is called with interrupts already disabled
454 clps711xuart_console_write(struct console *co, const char *s,
457 struct uart_port *port = clps711x_ports + co->index;
458 unsigned int status, syscon;
462 * Ensure that the port is enabled.
464 syscon = clps_readl(SYSCON(port));
465 clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
468 * Now, do each character
470 for (i = 0; i < count; i++) {
472 status = clps_readl(SYSFLG(port));
473 } while (status & SYSFLG_UTXFF);
474 clps_writel(s[i], UARTDR(port));
477 status = clps_readl(SYSFLG(port));
478 } while (status & SYSFLG_UTXFF);
479 clps_writel('\r', UARTDR(port));
484 * Finally, wait for transmitter to become empty
485 * and restore the uart state.
488 status = clps_readl(SYSFLG(port));
489 } while (status & SYSFLG_UBUSY);
491 clps_writel(syscon, SYSCON(port));
495 clps711xuart_console_get_options(struct uart_port *port, int *baud,
496 int *parity, int *bits)
498 if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
499 unsigned int ubrlcr, quot;
501 ubrlcr = clps_readl(UBRLCR(port));
504 if (ubrlcr & UBRLCR_PRTEN) {
505 if (ubrlcr & UBRLCR_EVENPRT)
511 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
516 quot = ubrlcr & UBRLCR_BAUD_MASK;
517 *baud = port->uartclk / (16 * (quot + 1));
521 static int __init clps711xuart_console_setup(struct console *co, char *options)
523 struct uart_port *port;
530 * Check whether an invalid uart number has been specified, and
531 * if so, search for the first available port that does have
534 port = uart_get_console(clps711x_ports, UART_NR, co);
537 uart_parse_options(options, &baud, &parity, &bits, &flow);
539 clps711xuart_console_get_options(port, &baud, &parity, &bits);
541 return uart_set_options(port, co, baud, parity, bits, flow);
544 extern struct uart_driver clps711x_reg;
545 static struct console clps711x_console = {
547 .write = clps711xuart_console_write,
548 .device = uart_console_device,
549 .setup = clps711xuart_console_setup,
550 .flags = CON_PRINTBUFFER,
552 .data = &clps711x_reg,
555 static int __init clps711xuart_console_init(void)
557 register_console(&clps711x_console);
560 console_initcall(clps711xuart_console_init);
562 #define CLPS711X_CONSOLE &clps711x_console
564 #define CLPS711X_CONSOLE NULL
567 static struct uart_driver clps711x_reg = {
568 .driver_name = "ttyCL",
570 .major = SERIAL_CLPS711X_MAJOR,
571 .minor = SERIAL_CLPS711X_MINOR,
574 .cons = CLPS711X_CONSOLE,
577 static int __init clps711xuart_init(void)
581 printk(KERN_INFO "Serial: CLPS711x driver $Revision: 1.42 $\n");
583 ret = uart_register_driver(&clps711x_reg);
587 for (i = 0; i < UART_NR; i++)
588 uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
593 static void __exit clps711xuart_exit(void)
597 for (i = 0; i < UART_NR; i++)
598 uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
600 uart_unregister_driver(&clps711x_reg);
603 module_init(clps711xuart_init);
604 module_exit(clps711xuart_exit);
606 MODULE_AUTHOR("Deep Blue Solutions Ltd");
607 MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $");
608 MODULE_LICENSE("GPL");
609 MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR);