2 NXP TDA10048HN DVB OFDM demodulator driver
4 Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include "dvb_frontend.h"
32 #define TDA10048_DEFAULT_FIRMWARE "dvb-fe-tda10048-1.0.fw"
33 #define TDA10048_DEFAULT_FIRMWARE_SIZE 24878
35 /* Register name definitions */
36 #define TDA10048_IDENTITY 0x00
37 #define TDA10048_VERSION 0x01
38 #define TDA10048_DSP_CODE_CPT 0x0C
39 #define TDA10048_DSP_CODE_IN 0x0E
40 #define TDA10048_IN_CONF1 0x10
41 #define TDA10048_IN_CONF2 0x11
42 #define TDA10048_IN_CONF3 0x12
43 #define TDA10048_OUT_CONF1 0x14
44 #define TDA10048_OUT_CONF2 0x15
45 #define TDA10048_OUT_CONF3 0x16
46 #define TDA10048_AUTO 0x18
47 #define TDA10048_SYNC_STATUS 0x1A
48 #define TDA10048_CONF_C4_1 0x1E
49 #define TDA10048_CONF_C4_2 0x1F
50 #define TDA10048_CODE_IN_RAM 0x20
51 #define TDA10048_CHANNEL_INFO_1_R 0x22
52 #define TDA10048_CHANNEL_INFO_2_R 0x23
53 #define TDA10048_CHANNEL_INFO1 0x24
54 #define TDA10048_CHANNEL_INFO2 0x25
55 #define TDA10048_TIME_ERROR_R 0x26
56 #define TDA10048_TIME_ERROR 0x27
57 #define TDA10048_FREQ_ERROR_LSB_R 0x28
58 #define TDA10048_FREQ_ERROR_MSB_R 0x29
59 #define TDA10048_FREQ_ERROR_LSB 0x2A
60 #define TDA10048_FREQ_ERROR_MSB 0x2B
61 #define TDA10048_IT_SEL 0x30
62 #define TDA10048_IT_STAT 0x32
63 #define TDA10048_DSP_AD_LSB 0x3C
64 #define TDA10048_DSP_AD_MSB 0x3D
65 #define TDA10048_DSP_REF_LSB 0x3E
66 #define TDA10048_DSP_REF_MSB 0x3F
67 #define TDA10048_CONF_TRISTATE1 0x44
68 #define TDA10048_CONF_TRISTATE2 0x45
69 #define TDA10048_CONF_POLARITY 0x46
70 #define TDA10048_GPIO_SP_DS0 0x48
71 #define TDA10048_GPIO_SP_DS1 0x49
72 #define TDA10048_GPIO_SP_DS2 0x4A
73 #define TDA10048_GPIO_SP_DS3 0x4B
74 #define TDA10048_GPIO_OUT_SEL 0x4C
75 #define TDA10048_GPIO_SELECT 0x4D
76 #define TDA10048_IC_MODE 0x4E
77 #define TDA10048_CONF_XO 0x50
78 #define TDA10048_CONF_PLL1 0x51
79 #define TDA10048_CONF_PLL2 0x52
80 #define TDA10048_CONF_PLL3 0x53
81 #define TDA10048_CONF_ADC 0x54
82 #define TDA10048_CONF_ADC_2 0x55
83 #define TDA10048_CONF_C1_1 0x60
84 #define TDA10048_CONF_C1_3 0x62
85 #define TDA10048_AGC_CONF 0x70
86 #define TDA10048_AGC_THRESHOLD_LSB 0x72
87 #define TDA10048_AGC_THRESHOLD_MSB 0x73
88 #define TDA10048_AGC_RENORM 0x74
89 #define TDA10048_AGC_GAINS 0x76
90 #define TDA10048_AGC_TUN_MIN 0x78
91 #define TDA10048_AGC_TUN_MAX 0x79
92 #define TDA10048_AGC_IF_MIN 0x7A
93 #define TDA10048_AGC_IF_MAX 0x7B
94 #define TDA10048_AGC_TUN_LEVEL 0x7E
95 #define TDA10048_AGC_IF_LEVEL 0x7F
96 #define TDA10048_DIG_AGC_LEVEL 0x81
97 #define TDA10048_FREQ_PHY2_LSB 0x86
98 #define TDA10048_FREQ_PHY2_MSB 0x87
99 #define TDA10048_TIME_INVWREF_LSB 0x88
100 #define TDA10048_TIME_INVWREF_MSB 0x89
101 #define TDA10048_TIME_WREF_LSB 0x8A
102 #define TDA10048_TIME_WREF_MID1 0x8B
103 #define TDA10048_TIME_WREF_MID2 0x8C
104 #define TDA10048_TIME_WREF_MSB 0x8D
105 #define TDA10048_NP_OUT 0xA2
106 #define TDA10048_CELL_ID_LSB 0xA4
107 #define TDA10048_CELL_ID_MSB 0xA5
108 #define TDA10048_EXTTPS_ODD 0xAA
109 #define TDA10048_EXTTPS_EVEN 0xAB
110 #define TDA10048_TPS_LENGTH 0xAC
111 #define TDA10048_FREE_REG_1 0xB2
112 #define TDA10048_FREE_REG_2 0xB3
113 #define TDA10048_CONF_C3_1 0xC0
114 #define TDA10048_CYBER_CTRL 0xC2
115 #define TDA10048_CBER_NMAX_LSB 0xC4
116 #define TDA10048_CBER_NMAX_MSB 0xC5
117 #define TDA10048_CBER_LSB 0xC6
118 #define TDA10048_CBER_MSB 0xC7
119 #define TDA10048_VBER_LSB 0xC8
120 #define TDA10048_VBER_MID 0xC9
121 #define TDA10048_VBER_MSB 0xCA
122 #define TDA10048_CYBER_LUT 0xCC
123 #define TDA10048_UNCOR_CTRL 0xCD
124 #define TDA10048_UNCOR_CPT_LSB 0xCE
125 #define TDA10048_UNCOR_CPT_MSB 0xCF
126 #define TDA10048_SOFT_IT_C3 0xD6
127 #define TDA10048_CONF_TS2 0xE0
128 #define TDA10048_CONF_TS1 0xE1
130 static unsigned int debug;
132 #define dprintk(level, fmt, arg...)\
133 do { if (debug >= level)\
134 printk(KERN_DEBUG "tda10048: " fmt, ## arg);\
137 struct tda10048_state {
139 struct i2c_adapter *i2c;
141 /* configuration settings */
142 const struct tda10048_config *config;
143 struct dvb_frontend frontend;
148 static struct init_tab {
152 { TDA10048_CONF_PLL1, 0x08 },
153 { TDA10048_CONF_ADC_2, 0x00 },
154 { TDA10048_CONF_C4_1, 0x00 },
155 { TDA10048_CONF_PLL1, 0x0f },
156 { TDA10048_CONF_PLL2, 0x0a },
157 { TDA10048_CONF_PLL3, 0x43 },
158 { TDA10048_FREQ_PHY2_LSB, 0x02 },
159 { TDA10048_FREQ_PHY2_MSB, 0x0a },
160 { TDA10048_TIME_WREF_LSB, 0xbd },
161 { TDA10048_TIME_WREF_MID1, 0xe4 },
162 { TDA10048_TIME_WREF_MID2, 0xa8 },
163 { TDA10048_TIME_WREF_MSB, 0x02 },
164 { TDA10048_TIME_INVWREF_LSB, 0x04 },
165 { TDA10048_TIME_INVWREF_MSB, 0x06 },
166 { TDA10048_CONF_C4_1, 0x00 },
167 { TDA10048_CONF_C1_1, 0xa8 },
168 { TDA10048_AGC_CONF, 0x16 },
169 { TDA10048_CONF_C1_3, 0x0b },
170 { TDA10048_AGC_TUN_MIN, 0x00 },
171 { TDA10048_AGC_TUN_MAX, 0xff },
172 { TDA10048_AGC_IF_MIN, 0x00 },
173 { TDA10048_AGC_IF_MAX, 0xff },
174 { TDA10048_AGC_THRESHOLD_MSB, 0x00 },
175 { TDA10048_AGC_THRESHOLD_LSB, 0x70 },
176 { TDA10048_CYBER_CTRL, 0x38 },
177 { TDA10048_AGC_GAINS, 0x12 },
178 { TDA10048_CONF_XO, 0x00 },
179 { TDA10048_CONF_TS1, 0x07 },
180 { TDA10048_IC_MODE, 0x00 },
181 { TDA10048_CONF_TS2, 0xc0 },
182 { TDA10048_CONF_TRISTATE1, 0x21 },
183 { TDA10048_CONF_TRISTATE2, 0x00 },
184 { TDA10048_CONF_POLARITY, 0x00 },
185 { TDA10048_CONF_C4_2, 0x04 },
186 { TDA10048_CONF_ADC, 0x60 },
187 { TDA10048_CONF_ADC_2, 0x10 },
188 { TDA10048_CONF_ADC, 0x60 },
189 { TDA10048_CONF_ADC_2, 0x00 },
190 { TDA10048_CONF_C1_1, 0xa8 },
191 { TDA10048_UNCOR_CTRL, 0x00 },
192 { TDA10048_CONF_C4_2, 0x04 },
195 static int tda10048_writereg(struct tda10048_state *state, u8 reg, u8 data)
198 u8 buf[] = { reg, data };
199 struct i2c_msg msg = {
200 .addr = state->config->demod_address,
201 .flags = 0, .buf = buf, .len = 2 };
203 dprintk(2, "%s(reg = 0x%02x, data = 0x%02x)\n", __func__, reg, data);
205 ret = i2c_transfer(state->i2c, &msg, 1);
208 printk("%s: writereg error (ret == %i)\n", __func__, ret);
210 return (ret != 1) ? -1 : 0;
213 static u8 tda10048_readreg(struct tda10048_state *state, u8 reg)
218 struct i2c_msg msg[] = {
219 { .addr = state->config->demod_address,
220 .flags = 0, .buf = b0, .len = 1 },
221 { .addr = state->config->demod_address,
222 .flags = I2C_M_RD, .buf = b1, .len = 1 } };
224 dprintk(2, "%s(reg = 0x%02x)\n", __func__, reg);
226 ret = i2c_transfer(state->i2c, msg, 2);
229 printk(KERN_ERR "%s: readreg error (ret == %i)\n",
235 static int tda10048_writeregbulk(struct tda10048_state *state, u8 reg,
236 const u8 *data, u16 len)
238 int ret = -EREMOTEIO;
242 dprintk(2, "%s(%d, ?, len = %d)\n", __func__, reg, len);
244 buf = kmalloc(len + 1, GFP_KERNEL);
251 memcpy(buf + 1, data, len);
253 msg.addr = state->config->demod_address;
258 dprintk(2, "%s(): write len = %d\n",
261 ret = i2c_transfer(state->i2c, &msg, 1);
263 printk(KERN_ERR "%s(): writereg error err %i\n",
274 static int tda10048_firmware_upload(struct dvb_frontend *fe)
276 struct tda10048_state *state = fe->demodulator_priv;
277 const struct firmware *fw;
281 u8 wlen = state->config->fwbulkwritelen;
283 if ((wlen != TDA10048_BULKWRITE_200) && (wlen != TDA10048_BULKWRITE_50))
284 wlen = TDA10048_BULKWRITE_200;
286 /* request the firmware, this will block and timeout */
287 printk(KERN_INFO "%s: waiting for firmware upload (%s)...\n",
289 TDA10048_DEFAULT_FIRMWARE);
291 ret = request_firmware(&fw, TDA10048_DEFAULT_FIRMWARE,
294 printk(KERN_ERR "%s: Upload failed. (file not found?)\n",
298 printk(KERN_INFO "%s: firmware read %Zu bytes.\n",
304 if (fw->size != TDA10048_DEFAULT_FIRMWARE_SIZE) {
305 printk(KERN_ERR "%s: firmware incorrect size\n", __func__);
308 printk(KERN_INFO "%s: firmware uploading\n", __func__);
311 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
312 tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
314 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
315 tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
318 /* Put the demod into host download mode */
319 tda10048_writereg(state, TDA10048_CONF_C4_1,
320 tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xf9);
323 tda10048_writereg(state, TDA10048_CONF_C4_1,
324 tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x08);
326 /* Prepare for download */
327 tda10048_writereg(state, TDA10048_DSP_CODE_CPT, 0);
329 /* Download the firmware payload */
330 while (pos < fw->size) {
332 if ((fw->size - pos) > wlen)
335 cnt = fw->size - pos;
337 tda10048_writeregbulk(state, TDA10048_DSP_CODE_IN,
338 &fw->data[pos], cnt);
344 /* Wait up to 250ms for the DSP to boot */
345 for (cnt = 0; cnt < 250 ; cnt += 10) {
349 if (tda10048_readreg(state, TDA10048_SYNC_STATUS)
357 release_firmware(fw);
360 printk(KERN_INFO "%s: firmware uploaded\n", __func__);
363 printk(KERN_ERR "%s: firmware upload failed\n", __func__);
368 static int tda10048_set_inversion(struct dvb_frontend *fe, int inversion)
370 struct tda10048_state *state = fe->demodulator_priv;
372 dprintk(1, "%s(%d)\n", __func__, inversion);
374 if (inversion == TDA10048_INVERSION_ON)
375 tda10048_writereg(state, TDA10048_CONF_C1_1,
376 tda10048_readreg(state, TDA10048_CONF_C1_1) | 0x20);
378 tda10048_writereg(state, TDA10048_CONF_C1_1,
379 tda10048_readreg(state, TDA10048_CONF_C1_1) & 0xdf);
384 /* Retrieve the demod settings */
385 static int tda10048_get_tps(struct tda10048_state *state,
386 struct dvb_ofdm_parameters *p)
390 /* Make sure the TPS regs are valid */
391 if (!(tda10048_readreg(state, TDA10048_AUTO) & 0x01))
394 val = tda10048_readreg(state, TDA10048_OUT_CONF2);
395 switch ((val & 0x60) >> 5) {
397 p->constellation = QPSK;
400 p->constellation = QAM_16;
403 p->constellation = QAM_64;
406 switch ((val & 0x18) >> 3) {
408 p->hierarchy_information = HIERARCHY_NONE;
411 p->hierarchy_information = HIERARCHY_1;
414 p->hierarchy_information = HIERARCHY_2;
417 p->hierarchy_information = HIERARCHY_4;
420 switch (val & 0x07) {
422 p->code_rate_HP = FEC_1_2;
425 p->code_rate_HP = FEC_2_3;
428 p->code_rate_HP = FEC_3_4;
431 p->code_rate_HP = FEC_5_6;
434 p->code_rate_HP = FEC_7_8;
438 val = tda10048_readreg(state, TDA10048_OUT_CONF3);
439 switch (val & 0x07) {
441 p->code_rate_LP = FEC_1_2;
444 p->code_rate_LP = FEC_2_3;
447 p->code_rate_LP = FEC_3_4;
450 p->code_rate_LP = FEC_5_6;
453 p->code_rate_LP = FEC_7_8;
457 val = tda10048_readreg(state, TDA10048_OUT_CONF1);
458 switch ((val & 0x0c) >> 2) {
460 p->guard_interval = GUARD_INTERVAL_1_32;
463 p->guard_interval = GUARD_INTERVAL_1_16;
466 p->guard_interval = GUARD_INTERVAL_1_8;
469 p->guard_interval = GUARD_INTERVAL_1_4;
472 switch (val & 0x02) {
474 p->transmission_mode = TRANSMISSION_MODE_2K;
477 p->transmission_mode = TRANSMISSION_MODE_8K;
484 static int tda10048_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
486 struct tda10048_state *state = fe->demodulator_priv;
487 dprintk(1, "%s(%d)\n", __func__, enable);
490 return tda10048_writereg(state, TDA10048_CONF_C4_1,
491 tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x02);
493 return tda10048_writereg(state, TDA10048_CONF_C4_1,
494 tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xfd);
497 static int tda10048_output_mode(struct dvb_frontend *fe, int serial)
499 struct tda10048_state *state = fe->demodulator_priv;
500 dprintk(1, "%s(%d)\n", __func__, serial);
502 /* Ensure pins are out of tri-state */
503 tda10048_writereg(state, TDA10048_CONF_TRISTATE1, 0x21);
504 tda10048_writereg(state, TDA10048_CONF_TRISTATE2, 0x00);
507 tda10048_writereg(state, TDA10048_IC_MODE, 0x80 | 0x20);
508 tda10048_writereg(state, TDA10048_CONF_TS2, 0xc0);
510 tda10048_writereg(state, TDA10048_IC_MODE, 0x00);
511 tda10048_writereg(state, TDA10048_CONF_TS2, 0x01);
517 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
518 /* TODO: Support manual tuning with specific params */
519 static int tda10048_set_frontend(struct dvb_frontend *fe,
520 struct dvb_frontend_parameters *p)
522 struct tda10048_state *state = fe->demodulator_priv;
524 dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
526 if (fe->ops.tuner_ops.set_params) {
528 if (fe->ops.i2c_gate_ctrl)
529 fe->ops.i2c_gate_ctrl(fe, 1);
531 fe->ops.tuner_ops.set_params(fe, p);
533 if (fe->ops.i2c_gate_ctrl)
534 fe->ops.i2c_gate_ctrl(fe, 0);
537 /* Enable demod TPS auto detection and begin acquisition */
538 tda10048_writereg(state, TDA10048_AUTO, 0x57);
543 /* Establish sane defaults and load firmware. */
544 static int tda10048_init(struct dvb_frontend *fe)
546 struct tda10048_state *state = fe->demodulator_priv;
549 dprintk(1, "%s()\n", __func__);
551 /* Apply register defaults */
552 for (i = 0; i < ARRAY_SIZE(init_tab); i++)
553 tda10048_writereg(state, init_tab[i].reg, init_tab[i].data);
555 if (state->fwloaded == 0)
556 ret = tda10048_firmware_upload(fe);
558 /* Set either serial or parallel */
559 tda10048_output_mode(fe, state->config->output_mode);
562 tda10048_set_inversion(fe, state->config->inversion);
564 /* Ensure we leave the gate closed */
565 tda10048_i2c_gate_ctrl(fe, 0);
570 static int tda10048_read_status(struct dvb_frontend *fe, fe_status_t *status)
572 struct tda10048_state *state = fe->demodulator_priv;
577 reg = tda10048_readreg(state, TDA10048_SYNC_STATUS);
579 dprintk(1, "%s() status =0x%02x\n", __func__, reg);
582 *status |= FE_HAS_CARRIER;
585 *status |= FE_HAS_SIGNAL;
588 *status |= FE_HAS_LOCK;
589 *status |= FE_HAS_VITERBI;
590 *status |= FE_HAS_SYNC;
596 static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber)
598 struct tda10048_state *state = fe->demodulator_priv;
600 dprintk(1, "%s()\n", __func__);
602 /* TODO: A reset may be required here */
603 *ber = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 |
604 tda10048_readreg(state, TDA10048_CBER_LSB);
609 static int tda10048_read_signal_strength(struct dvb_frontend *fe,
610 u16 *signal_strength)
612 struct tda10048_state *state = fe->demodulator_priv;
615 dprintk(1, "%s()\n", __func__);
617 *signal_strength = 65535;
619 v = tda10048_readreg(state, TDA10048_NP_OUT);
621 *signal_strength -= (v << 8) | v;
626 /* SNR lookup table */
627 static struct snr_tab {
756 static int tda10048_read_snr(struct dvb_frontend *fe, u16 *snr)
758 struct tda10048_state *state = fe->demodulator_priv;
760 int i, ret = -EINVAL;
762 dprintk(1, "%s()\n", __func__);
764 v = tda10048_readreg(state, TDA10048_NP_OUT);
765 for (i = 0; i < ARRAY_SIZE(snr_tab); i++) {
766 if (v <= snr_tab[i].val) {
767 *snr = snr_tab[i].data;
776 static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
778 struct tda10048_state *state = fe->demodulator_priv;
780 dprintk(1, "%s()\n", __func__);
782 *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
783 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
788 static int tda10048_get_frontend(struct dvb_frontend *fe,
789 struct dvb_frontend_parameters *p)
791 struct tda10048_state *state = fe->demodulator_priv;
793 dprintk(1, "%s()\n", __func__);
795 p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1)
796 & 0x20 ? INVERSION_ON : INVERSION_OFF;
798 return tda10048_get_tps(state, &p->u.ofdm);
801 static int tda10048_get_tune_settings(struct dvb_frontend *fe,
802 struct dvb_frontend_tune_settings *tune)
804 tune->min_delay_ms = 1000;
808 static void tda10048_release(struct dvb_frontend *fe)
810 struct tda10048_state *state = fe->demodulator_priv;
811 dprintk(1, "%s()\n", __func__);
815 static struct dvb_frontend_ops tda10048_ops;
817 struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
818 struct i2c_adapter *i2c)
820 struct tda10048_state *state = NULL;
822 dprintk(1, "%s()\n", __func__);
824 /* allocate memory for the internal state */
825 state = kmalloc(sizeof(struct tda10048_state), GFP_KERNEL);
829 /* setup the state */
830 state->config = config;
834 /* check if the demod is present */
835 if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
838 /* create dvb_frontend */
839 memcpy(&state->frontend.ops, &tda10048_ops,
840 sizeof(struct dvb_frontend_ops));
841 state->frontend.demodulator_priv = state;
843 /* Leave the gate closed */
844 tda10048_i2c_gate_ctrl(&state->frontend, 0);
846 return &state->frontend;
852 EXPORT_SYMBOL(tda10048_attach);
854 static struct dvb_frontend_ops tda10048_ops = {
857 .name = "NXP TDA10048HN DVB-T",
859 .frequency_min = 177000000,
860 .frequency_max = 858000000,
861 .frequency_stepsize = 166666,
862 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
863 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
864 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
865 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
866 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
869 .release = tda10048_release,
870 .init = tda10048_init,
871 .i2c_gate_ctrl = tda10048_i2c_gate_ctrl,
872 .set_frontend = tda10048_set_frontend,
873 .get_frontend = tda10048_get_frontend,
874 .get_tune_settings = tda10048_get_tune_settings,
875 .read_status = tda10048_read_status,
876 .read_ber = tda10048_read_ber,
877 .read_signal_strength = tda10048_read_signal_strength,
878 .read_snr = tda10048_read_snr,
879 .read_ucblocks = tda10048_read_ucblocks,
882 module_param(debug, int, 0644);
883 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
885 MODULE_DESCRIPTION("NXP TDA10048HN DVB-T Demodulator driver");
886 MODULE_AUTHOR("Steven Toth");
887 MODULE_LICENSE("GPL");