Merge branch 'for-linus' of git://oss.sgi.com:8090/xfs/xfs-2.6
[linux-2.6] / arch / arm / mach-at91 / pm.c
1 /*
2  * arch/arm/mach-at91/pm.c
3  * AT91 Power Management
4  *
5  * Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12
13 #include <linux/suspend.h>
14 #include <linux/sched.h>
15 #include <linux/proc_fs.h>
16 #include <linux/interrupt.h>
17 #include <linux/sysfs.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20
21 #include <asm/io.h>
22 #include <asm/irq.h>
23 #include <asm/atomic.h>
24 #include <asm/mach/time.h>
25 #include <asm/mach/irq.h>
26 #include <asm/mach-types.h>
27
28 #include <asm/arch/at91_pmc.h>
29 #include <asm/arch/at91rm9200_mc.h>
30 #include <asm/arch/gpio.h>
31 #include <asm/arch/cpu.h>
32
33 #include "generic.h"
34
35
36 static int at91_pm_valid_state(suspend_state_t state)
37 {
38         switch (state) {
39                 case PM_SUSPEND_ON:
40                 case PM_SUSPEND_STANDBY:
41                 case PM_SUSPEND_MEM:
42                         return 1;
43
44                 default:
45                         return 0;
46         }
47 }
48
49
50 static suspend_state_t target_state;
51
52 /*
53  * Called after processes are frozen, but before we shutdown devices.
54  */
55 static int at91_pm_set_target(suspend_state_t state)
56 {
57         target_state = state;
58         return 0;
59 }
60
61 /*
62  * Verify that all the clocks are correct before entering
63  * slow-clock mode.
64  */
65 static int at91_pm_verify_clocks(void)
66 {
67         unsigned long scsr;
68         int i;
69
70         scsr = at91_sys_read(AT91_PMC_SCSR);
71
72         /* USB must not be using PLLB */
73         if (cpu_is_at91rm9200()) {
74                 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
75                         pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
76                         return 0;
77                 }
78         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) {
79                 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
80                         pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
81                         return 0;
82                 }
83         }
84
85 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
86         /* PCK0..PCK3 must be disabled, or configured to use clk32k */
87         for (i = 0; i < 4; i++) {
88                 u32 css;
89
90                 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
91                         continue;
92
93                 css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
94                 if (css != AT91_PMC_CSS_SLOW) {
95                         pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
96                         return 0;
97                 }
98         }
99 #endif
100
101         return 1;
102 }
103
104 /*
105  * Call this from platform driver suspend() to see how deeply to suspend.
106  * For example, some controllers (like OHCI) need one of the PLL clocks
107  * in order to act as a wakeup source, and those are not available when
108  * going into slow clock mode.
109  *
110  * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
111  * the very same problem (but not using at91 main_clk), and it'd be better
112  * to add one generic API rather than lots of platform-specific ones.
113  */
114 int at91_suspend_entering_slow_clock(void)
115 {
116         return (target_state == PM_SUSPEND_MEM);
117 }
118 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
119
120
121 static void (*slow_clock)(void);
122
123
124 static int at91_pm_enter(suspend_state_t state)
125 {
126         at91_gpio_suspend();
127         at91_irq_suspend();
128
129         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
130                         /* remember all the always-wake irqs */
131                         (at91_sys_read(AT91_PMC_PCSR)
132                                         | (1 << AT91_ID_FIQ)
133                                         | (1 << AT91_ID_SYS)
134                                         | (at91_extern_irq))
135                                 & at91_sys_read(AT91_AIC_IMR),
136                         state);
137
138         switch (state) {
139                 /*
140                  * Suspend-to-RAM is like STANDBY plus slow clock mode, so
141                  * drivers must suspend more deeply:  only the master clock
142                  * controller may be using the main oscillator.
143                  */
144                 case PM_SUSPEND_MEM:
145                         /*
146                          * Ensure that clocks are in a valid state.
147                          */
148                         if (!at91_pm_verify_clocks())
149                                 goto error;
150
151                         /*
152                          * Enter slow clock mode by switching over to clk32k and
153                          * turning off the main oscillator; reverse on wakeup.
154                          */
155                         if (slow_clock) {
156                                 slow_clock();
157                                 break;
158                         } else {
159                                 /* DEVELOPMENT ONLY */
160                                 pr_info("AT91: PM - no slow clock mode yet ...\n");
161                                 /* FALLTHROUGH leaving master clock alone */
162                         }
163
164                 /*
165                  * STANDBY mode has *all* drivers suspended; ignores irqs not
166                  * marked as 'wakeup' event sources; and reduces DRAM power.
167                  * But otherwise it's identical to PM_SUSPEND_ON:  cpu idle, and
168                  * nothing fancy done with main or cpu clocks.
169                  */
170                 case PM_SUSPEND_STANDBY:
171                         /*
172                          * NOTE: the Wait-for-Interrupt instruction needs to be
173                          * in icache so the SDRAM stays in self-refresh mode until
174                          * the wakeup IRQ occurs.
175                          */
176                         asm("b 1f; .align 5; 1:");
177                         asm("mcr p15, 0, r0, c7, c10, 4");      /* drain write buffer */
178                         at91_sys_write(AT91_SDRAMC_SRR, 1);     /* self-refresh mode */
179                         /* fall though to next state */
180
181                 case PM_SUSPEND_ON:
182                         asm("mcr p15, 0, r0, c7, c0, 4");       /* wait for interrupt */
183                         break;
184
185                 default:
186                         pr_debug("AT91: PM - bogus suspend state %d\n", state);
187                         goto error;
188         }
189
190         pr_debug("AT91: PM - wakeup %08x\n",
191                         at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
192
193 error:
194         target_state = PM_SUSPEND_ON;
195         at91_irq_resume();
196         at91_gpio_resume();
197         return 0;
198 }
199
200
201 static struct platform_suspend_ops at91_pm_ops ={
202         .valid          = at91_pm_valid_state,
203         .set_target     = at91_pm_set_target,
204         .enter          = at91_pm_enter,
205 };
206
207 static int __init at91_pm_init(void)
208 {
209         printk("AT91: Power Management\n");
210
211 #ifdef CONFIG_AT91_PM_SLOW_CLOCK
212         /* REVISIT allocations of SRAM should be dynamically managed.
213          * FIQ handlers and other components will want SRAM/TCM too...
214          */
215         slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
216         memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
217 #endif
218
219         /* Disable SDRAM low-power mode.  Cannot be used with self-refresh. */
220         at91_sys_write(AT91_SDRAMC_LPR, 0);
221
222         suspend_set_ops(&at91_pm_ops);
223
224         return 0;
225 }
226 arch_initcall(at91_pm_init);