2 * File: arch/blackfin/kernel/bfin_gpio.c
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
7 * Description: GPIO Abstraction Layer
10 * Copyright 2007 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
33 * GPIO_0 PF0 PF0 PF0 PA0...PJ13
43 * GPIO_10 PF10 PF10 PF10
44 * GPIO_11 PF11 PF11 PF11
45 * GPIO_12 PF12 PF12 PF12
46 * GPIO_13 PF13 PF13 PF13
47 * GPIO_14 PF14 PF14 PF14
48 * GPIO_15 PF15 PF15 PF15
83 #include <linux/delay.h>
84 #include <linux/module.h>
85 #include <linux/err.h>
86 #include <asm/blackfin.h>
88 #include <asm/portmux.h>
89 #include <linux/irq.h>
91 #if ANOMALY_05000311 || ANOMALY_05000323
94 AWA_data_clear = SYSCR,
98 AWA_maska_clear = UART_SCR,
99 AWA_maska_set = UART_SCR,
100 AWA_maska_toggle = UART_SCR,
101 AWA_maskb = UART_GCTL,
102 AWA_maskb_clear = UART_GCTL,
103 AWA_maskb_set = UART_GCTL,
104 AWA_maskb_toggle = UART_GCTL,
105 AWA_dir = SPORT1_STAT,
106 AWA_polar = SPORT1_STAT,
107 AWA_edge = SPORT1_STAT,
108 AWA_both = SPORT1_STAT,
110 AWA_inen = TIMER_ENABLE,
111 #elif ANOMALY_05000323
112 AWA_inen = DMA1_1_CONFIG,
115 /* Anomaly Workaround */
116 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
118 #define AWA_DUMMY_READ(...) do { } while (0)
122 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
123 (struct gpio_port_t *) FIO_FLAG_D,
127 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
128 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
129 (struct gpio_port_t *) PORTFIO,
130 (struct gpio_port_t *) PORTGIO,
131 (struct gpio_port_t *) PORTHIO,
134 static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
135 (unsigned short *) PORTF_FER,
136 (unsigned short *) PORTG_FER,
137 (unsigned short *) PORTH_FER,
143 static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
144 (unsigned short *) PORTF_MUX,
145 (unsigned short *) PORTG_MUX,
146 (unsigned short *) PORTH_MUX,
150 u8 pmux_offset[][16] =
151 {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
152 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
153 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
158 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
159 (struct gpio_port_t *) FIO0_FLAG_D,
160 (struct gpio_port_t *) FIO1_FLAG_D,
161 (struct gpio_port_t *) FIO2_FLAG_D,
166 static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
167 (struct gpio_port_t *)PORTA_FER,
168 (struct gpio_port_t *)PORTB_FER,
169 (struct gpio_port_t *)PORTC_FER,
170 (struct gpio_port_t *)PORTD_FER,
171 (struct gpio_port_t *)PORTE_FER,
172 (struct gpio_port_t *)PORTF_FER,
173 (struct gpio_port_t *)PORTG_FER,
174 (struct gpio_port_t *)PORTH_FER,
175 (struct gpio_port_t *)PORTI_FER,
176 (struct gpio_port_t *)PORTJ_FER,
180 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
181 static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
183 #define MAX_RESOURCES 256
184 #define RESOURCE_LABEL_SIZE 16
187 char name[RESOURCE_LABEL_SIZE];
192 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
193 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
194 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
197 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
201 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
205 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
209 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
212 #endif /* CONFIG_PM */
214 #if defined(BF548_FAMILY)
215 inline int check_gpio(unsigned short gpio)
217 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
218 || gpio == GPIO_PH14 || gpio == GPIO_PH15
219 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
220 || gpio > MAX_BLACKFIN_GPIOS)
225 inline int check_gpio(unsigned short gpio)
227 if (gpio >= MAX_BLACKFIN_GPIOS)
233 static void set_label(unsigned short ident, const char *label)
236 if (label && str_ident) {
237 strncpy(str_ident[ident].name, label,
238 RESOURCE_LABEL_SIZE);
239 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
243 static char *get_label(unsigned short ident)
248 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
251 static int cmp_label(unsigned short ident, const char *label)
253 if (label && str_ident)
254 return strncmp(str_ident[ident].name,
255 label, strlen(label));
260 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
261 static void port_setup(unsigned short gpio, unsigned short usage)
263 if (!check_gpio(gpio)) {
264 if (usage == GPIO_USAGE)
265 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
267 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
271 #elif defined(BF548_FAMILY)
272 static void port_setup(unsigned short gpio, unsigned short usage)
274 if (usage == GPIO_USAGE)
275 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
277 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
281 # define port_setup(...) do { } while (0)
287 unsigned short offset;
289 {.res = P_PPI0_D13, .offset = 11},
290 {.res = P_PPI0_D14, .offset = 11},
291 {.res = P_PPI0_D15, .offset = 11},
292 {.res = P_SPORT1_TFS, .offset = 11},
293 {.res = P_SPORT1_TSCLK, .offset = 11},
294 {.res = P_SPORT1_DTPRI, .offset = 11},
295 {.res = P_PPI0_D10, .offset = 10},
296 {.res = P_PPI0_D11, .offset = 10},
297 {.res = P_PPI0_D12, .offset = 10},
298 {.res = P_SPORT1_RSCLK, .offset = 10},
299 {.res = P_SPORT1_RFS, .offset = 10},
300 {.res = P_SPORT1_DRPRI, .offset = 10},
301 {.res = P_PPI0_D8, .offset = 9},
302 {.res = P_PPI0_D9, .offset = 9},
303 {.res = P_SPORT1_DRSEC, .offset = 9},
304 {.res = P_SPORT1_DTSEC, .offset = 9},
305 {.res = P_TMR2, .offset = 8},
306 {.res = P_PPI0_FS3, .offset = 8},
307 {.res = P_TMR3, .offset = 7},
308 {.res = P_SPI0_SSEL4, .offset = 7},
309 {.res = P_TMR4, .offset = 6},
310 {.res = P_SPI0_SSEL5, .offset = 6},
311 {.res = P_TMR5, .offset = 5},
312 {.res = P_SPI0_SSEL6, .offset = 5},
313 {.res = P_UART1_RX, .offset = 4},
314 {.res = P_UART1_TX, .offset = 4},
315 {.res = P_TMR6, .offset = 4},
316 {.res = P_TMR7, .offset = 4},
317 {.res = P_UART0_RX, .offset = 3},
318 {.res = P_UART0_TX, .offset = 3},
319 {.res = P_DMAR0, .offset = 3},
320 {.res = P_DMAR1, .offset = 3},
321 {.res = P_SPORT0_DTSEC, .offset = 1},
322 {.res = P_SPORT0_DRSEC, .offset = 1},
323 {.res = P_CAN0_RX, .offset = 1},
324 {.res = P_CAN0_TX, .offset = 1},
325 {.res = P_SPI0_SSEL7, .offset = 1},
326 {.res = P_SPORT0_TFS, .offset = 0},
327 {.res = P_SPORT0_DTPRI, .offset = 0},
328 {.res = P_SPI0_SSEL2, .offset = 0},
329 {.res = P_SPI0_SSEL3, .offset = 0},
332 static void portmux_setup(unsigned short per, unsigned short function)
334 u16 y, offset, muxreg;
336 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
337 if (port_mux_lut[y].res == per) {
339 /* SET PORTMUX REG */
341 offset = port_mux_lut[y].offset;
342 muxreg = bfin_read_PORT_MUX();
345 muxreg &= ~(1 << offset);
350 muxreg |= (function << offset);
351 bfin_write_PORT_MUX(muxreg);
355 #elif defined(BF548_FAMILY)
356 inline void portmux_setup(unsigned short portno, unsigned short function)
360 pmux = gpio_array[gpio_bank(portno)]->port_mux;
362 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
363 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
365 gpio_array[gpio_bank(portno)]->port_mux = pmux;
368 inline u16 get_portmux(unsigned short portno)
372 pmux = gpio_array[gpio_bank(portno)]->port_mux;
374 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
376 #elif defined(BF527_FAMILY)
377 inline void portmux_setup(unsigned short portno, unsigned short function)
379 u16 pmux, ident = P_IDENT(portno);
380 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
382 pmux = *port_mux[gpio_bank(ident)];
383 pmux &= ~(3 << offset);
384 pmux |= (function & 3) << offset;
385 *port_mux[gpio_bank(ident)] = pmux;
389 # define portmux_setup(...) do { } while (0)
393 static void default_gpio(unsigned short gpio)
395 unsigned short bank, bitmask;
398 bank = gpio_bank(gpio);
399 bitmask = gpio_bit(gpio);
401 local_irq_save(flags);
403 gpio_bankb[bank]->maska_clear = bitmask;
404 gpio_bankb[bank]->maskb_clear = bitmask;
406 gpio_bankb[bank]->inen &= ~bitmask;
407 gpio_bankb[bank]->dir &= ~bitmask;
408 gpio_bankb[bank]->polar &= ~bitmask;
409 gpio_bankb[bank]->both &= ~bitmask;
410 gpio_bankb[bank]->edge &= ~bitmask;
411 AWA_DUMMY_READ(edge);
412 local_irq_restore(flags);
416 # define default_gpio(...) do { } while (0)
419 static int __init bfin_gpio_init(void)
421 str_ident = kcalloc(MAX_RESOURCES,
422 sizeof(struct str_ident), GFP_KERNEL);
423 if (str_ident == NULL)
426 memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
428 printk(KERN_INFO "Blackfin GPIO Controller\n");
433 arch_initcall(bfin_gpio_init);
437 /***********************************************************
439 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
442 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
445 * DESCRIPTION: These functions abstract direct register access
446 * to Blackfin processor General Purpose
449 * CAUTION: These functions do not belong to the GPIO Driver API
450 *************************************************************
451 * MODIFICATION HISTORY :
452 **************************************************************/
454 /* Set a specific bit */
456 #define SET_GPIO(name) \
457 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
459 unsigned long flags; \
460 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
461 local_irq_save(flags); \
463 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
465 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
466 AWA_DUMMY_READ(name); \
467 local_irq_restore(flags); \
469 EXPORT_SYMBOL(set_gpio_ ## name);
478 #if ANOMALY_05000311 || ANOMALY_05000323
479 #define SET_GPIO_SC(name) \
480 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
482 unsigned long flags; \
483 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
484 local_irq_save(flags); \
486 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
488 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
489 AWA_DUMMY_READ(name); \
490 local_irq_restore(flags); \
492 EXPORT_SYMBOL(set_gpio_ ## name);
494 #define SET_GPIO_SC(name) \
495 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
497 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
499 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
501 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
503 EXPORT_SYMBOL(set_gpio_ ## name);
510 #if ANOMALY_05000311 || ANOMALY_05000323
511 void set_gpio_toggle(unsigned short gpio)
514 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
515 local_irq_save(flags);
516 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
517 AWA_DUMMY_READ(toggle);
518 local_irq_restore(flags);
521 void set_gpio_toggle(unsigned short gpio)
523 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
524 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
527 EXPORT_SYMBOL(set_gpio_toggle);
530 /*Set current PORT date (16-bit word)*/
532 #if ANOMALY_05000311 || ANOMALY_05000323
533 #define SET_GPIO_P(name) \
534 void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
536 unsigned long flags; \
537 local_irq_save(flags); \
538 gpio_bankb[gpio_bank(gpio)]->name = arg; \
539 AWA_DUMMY_READ(name); \
540 local_irq_restore(flags); \
542 EXPORT_SYMBOL(set_gpiop_ ## name);
544 #define SET_GPIO_P(name) \
545 void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
547 gpio_bankb[gpio_bank(gpio)]->name = arg; \
549 EXPORT_SYMBOL(set_gpiop_ ## name);
562 /* Get a specific bit */
563 #if ANOMALY_05000311 || ANOMALY_05000323
564 #define GET_GPIO(name) \
565 unsigned short get_gpio_ ## name(unsigned short gpio) \
567 unsigned long flags; \
568 unsigned short ret; \
569 local_irq_save(flags); \
570 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
571 AWA_DUMMY_READ(name); \
572 local_irq_restore(flags); \
575 EXPORT_SYMBOL(get_gpio_ ## name);
577 #define GET_GPIO(name) \
578 unsigned short get_gpio_ ## name(unsigned short gpio) \
580 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
582 EXPORT_SYMBOL(get_gpio_ ## name);
594 /*Get current PORT date (16-bit word)*/
596 #if ANOMALY_05000311 || ANOMALY_05000323
597 #define GET_GPIO_P(name) \
598 unsigned short get_gpiop_ ## name(unsigned short gpio) \
600 unsigned long flags; \
601 unsigned short ret; \
602 local_irq_save(flags); \
603 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
604 AWA_DUMMY_READ(name); \
605 local_irq_restore(flags); \
608 EXPORT_SYMBOL(get_gpiop_ ## name);
610 #define GET_GPIO_P(name) \
611 unsigned short get_gpiop_ ## name(unsigned short gpio) \
613 return (gpio_bankb[gpio_bank(gpio)]->name);\
615 EXPORT_SYMBOL(get_gpiop_ ## name);
629 /***********************************************************
631 * FUNCTIONS: Blackfin PM Setup API
634 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
642 * DESCRIPTION: Blackfin PM Driver API
645 *************************************************************
646 * MODIFICATION HISTORY :
647 **************************************************************/
648 int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
652 if ((check_gpio(gpio) < 0) || !type)
655 local_irq_save(flags);
657 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
658 wakeup_flags_map[gpio] = type;
659 local_irq_restore(flags);
663 EXPORT_SYMBOL(gpio_pm_wakeup_request);
665 void gpio_pm_wakeup_free(unsigned short gpio)
669 if (check_gpio(gpio) < 0)
672 local_irq_save(flags);
674 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
676 local_irq_restore(flags);
678 EXPORT_SYMBOL(gpio_pm_wakeup_free);
680 static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
682 port_setup(gpio, GPIO_USAGE);
683 set_gpio_dir(gpio, 0);
684 set_gpio_inen(gpio, 1);
686 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
687 set_gpio_edge(gpio, 1);
689 set_gpio_edge(gpio, 0);
691 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
692 set_gpio_both(gpio, 1);
694 set_gpio_both(gpio, 0);
696 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
697 set_gpio_polar(gpio, 1);
699 set_gpio_polar(gpio, 0);
706 u32 gpio_pm_setup(void)
709 u16 bank, mask, i, gpio;
711 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
712 mask = wakeup_map[gpio_bank(i)];
715 gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
716 gpio_bankb[bank]->maskb = 0;
720 gpio_bank_saved[bank].fer = *port_fer[bank];
722 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
723 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
724 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
725 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
726 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
727 gpio_bank_saved[bank].reserved =
728 reserved_gpio_map[bank];
734 reserved_gpio_map[gpio_bank(gpio)] |=
736 bfin_gpio_wakeup_type(gpio,
737 wakeup_flags_map[gpio]);
738 set_gpio_data(gpio, 0); /*Clear*/
745 (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
746 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
750 AWA_DUMMY_READ(maskb_set);
755 return IWR_ENABLE_ALL;
758 void gpio_pm_restore(void)
762 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
763 mask = wakeup_map[gpio_bank(i)];
768 *port_fer[bank] = gpio_bank_saved[bank].fer;
770 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
771 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
772 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
773 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
774 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
776 reserved_gpio_map[bank] =
777 gpio_bank_saved[bank].reserved;
781 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
783 AWA_DUMMY_READ(maskb);
787 #endif /* BF548_FAMILY */
789 /***********************************************************
791 * FUNCTIONS: Blackfin Peripheral Resource Allocation
795 * per Peripheral Identifier
798 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
801 *************************************************************
802 * MODIFICATION HISTORY :
803 **************************************************************/
806 int peripheral_request(unsigned short per, const char *label)
809 unsigned short ident = P_IDENT(per);
812 * Don't cares are pins with only one dedicated function
815 if (per & P_DONTCARE)
818 if (!(per & P_DEFINED))
821 if (check_gpio(ident) < 0)
824 local_irq_save(flags);
826 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
828 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
829 __FUNCTION__, ident, get_label(ident));
831 local_irq_restore(flags);
835 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
837 u16 funct = get_portmux(ident);
840 * Pin functions like AMC address strobes my
841 * be requested and used by several drivers
844 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
847 * Allow that the identical pin function can
848 * be requested from the same driver twice
851 if (cmp_label(ident, label) == 0)
855 "%s: Peripheral %d function %d is already reserved by %s !\n",
856 __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
858 local_irq_restore(flags);
864 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
866 portmux_setup(ident, P_FUNCT2MUX(per));
867 port_setup(ident, PERIPHERAL_USAGE);
869 local_irq_restore(flags);
870 set_label(ident, label);
874 EXPORT_SYMBOL(peripheral_request);
877 int peripheral_request(unsigned short per, const char *label)
880 unsigned short ident = P_IDENT(per);
883 * Don't cares are pins with only one dedicated function
886 if (per & P_DONTCARE)
889 if (!(per & P_DEFINED))
892 local_irq_save(flags);
894 if (!check_gpio(ident)) {
896 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
898 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
899 __FUNCTION__, ident, get_label(ident));
901 local_irq_restore(flags);
907 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
910 * Pin functions like AMC address strobes my
911 * be requested and used by several drivers
914 if (!(per & P_MAYSHARE)) {
917 * Allow that the identical pin function can
918 * be requested from the same driver twice
921 if (cmp_label(ident, label) == 0)
925 "%s: Peripheral %d function %d is already"
926 " reserved by %s !\n",
927 __FUNCTION__, ident, P_FUNCT2MUX(per),
930 local_irq_restore(flags);
937 portmux_setup(per, P_FUNCT2MUX(per));
939 port_setup(ident, PERIPHERAL_USAGE);
941 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
942 local_irq_restore(flags);
943 set_label(ident, label);
947 EXPORT_SYMBOL(peripheral_request);
950 int peripheral_request_list(unsigned short per[], const char *label)
955 for (cnt = 0; per[cnt] != 0; cnt++) {
957 ret = peripheral_request(per[cnt], label);
960 for ( ; cnt > 0; cnt--) {
961 peripheral_free(per[cnt - 1]);
969 EXPORT_SYMBOL(peripheral_request_list);
971 void peripheral_free(unsigned short per)
974 unsigned short ident = P_IDENT(per);
976 if (per & P_DONTCARE)
979 if (!(per & P_DEFINED))
982 if (check_gpio(ident) < 0)
985 local_irq_save(flags);
987 if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
988 & gpio_bit(ident)))) {
989 local_irq_restore(flags);
993 if (!(per & P_MAYSHARE)) {
994 port_setup(ident, GPIO_USAGE);
997 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
999 set_label(ident, "free");
1001 local_irq_restore(flags);
1003 EXPORT_SYMBOL(peripheral_free);
1005 void peripheral_free_list(unsigned short per[])
1009 for (cnt = 0; per[cnt] != 0; cnt++) {
1010 peripheral_free(per[cnt]);
1014 EXPORT_SYMBOL(peripheral_free_list);
1016 /***********************************************************
1018 * FUNCTIONS: Blackfin GPIO Driver
1021 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
1024 * DESCRIPTION: Blackfin GPIO Driver API
1027 *************************************************************
1028 * MODIFICATION HISTORY :
1029 **************************************************************/
1031 int gpio_request(unsigned short gpio, const char *label)
1033 unsigned long flags;
1035 if (check_gpio(gpio) < 0)
1038 local_irq_save(flags);
1041 * Allow that the identical GPIO can
1042 * be requested from the same driver twice
1043 * Do nothing and return -
1046 if (cmp_label(gpio, label) == 0) {
1047 local_irq_restore(flags);
1051 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1052 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1053 gpio, get_label(gpio));
1055 local_irq_restore(flags);
1058 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1060 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1061 gpio, get_label(gpio));
1063 local_irq_restore(flags);
1067 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1069 local_irq_restore(flags);
1071 port_setup(gpio, GPIO_USAGE);
1072 set_label(gpio, label);
1076 EXPORT_SYMBOL(gpio_request);
1078 void gpio_free(unsigned short gpio)
1080 unsigned long flags;
1082 if (check_gpio(gpio) < 0)
1085 local_irq_save(flags);
1087 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1088 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
1090 local_irq_restore(flags);
1096 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1098 set_label(gpio, "free");
1100 local_irq_restore(flags);
1102 EXPORT_SYMBOL(gpio_free);
1105 void gpio_direction_input(unsigned short gpio)
1107 unsigned long flags;
1109 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1111 local_irq_save(flags);
1112 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1113 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1114 local_irq_restore(flags);
1116 EXPORT_SYMBOL(gpio_direction_input);
1118 void gpio_direction_output(unsigned short gpio)
1120 unsigned long flags;
1122 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1124 local_irq_save(flags);
1125 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1126 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1127 local_irq_restore(flags);
1129 EXPORT_SYMBOL(gpio_direction_output);
1131 void gpio_set_value(unsigned short gpio, unsigned short arg)
1134 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1136 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1139 EXPORT_SYMBOL(gpio_set_value);
1141 unsigned short gpio_get_value(unsigned short gpio)
1143 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1145 EXPORT_SYMBOL(gpio_get_value);
1149 void gpio_direction_input(unsigned short gpio)
1151 unsigned long flags;
1153 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1155 local_irq_save(flags);
1156 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1157 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1158 AWA_DUMMY_READ(inen);
1159 local_irq_restore(flags);
1161 EXPORT_SYMBOL(gpio_direction_input);
1163 void gpio_direction_output(unsigned short gpio)
1165 unsigned long flags;
1167 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1169 local_irq_save(flags);
1170 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1171 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1172 AWA_DUMMY_READ(dir);
1173 local_irq_restore(flags);
1175 EXPORT_SYMBOL(gpio_direction_output);
1177 /* If we are booting from SPI and our board lacks a strong enough pull up,
1178 * the core can reset and execute the bootrom faster than the resistor can
1179 * pull the signal logically high. To work around this (common) error in
1180 * board design, we explicitly set the pin back to GPIO mode, force /CS
1181 * high, and wait for the electrons to do their thing.
1183 * This function only makes sense to be called from reset code, but it
1184 * lives here as we need to force all the GPIO states w/out going through
1185 * BUG() checks and such.
1187 void bfin_gpio_reset_spi0_ssel1(void)
1189 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1191 port_setup(gpio, GPIO_USAGE);
1192 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1196 #endif /*BF548_FAMILY */