git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-at91/at91sam9261_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9261_devices.c
   3  *
   4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
   5  *  Copyright (C) 2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  */
  13 #include <asm/mach/arch.h>
  14 #include <asm/mach/map.h>
  15
  16 #include <linux/dma-mapping.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c-gpio.h>
  19
  20 #include <linux/fb.h>
  21 #include <video/atmel_lcdc.h>
  22
  23 #include <asm/arch/board.h>
  24 #include <asm/arch/gpio.h>
  25 #include <asm/arch/at91sam9261.h>
  26 #include <asm/arch/at91sam9261_matrix.h>
  27 #include <asm/arch/at91sam9_smc.h>
  28
  29 #include "generic.h"
  30
  31
  32 /* --------------------------------------------------------------------
  33  *  USB Host
  34  * -------------------------------------------------------------------- */
  35
  36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  38 static struct at91_usbh_data usbh_data;
  39
  40 static struct resource usbh_resources[] = {
  41         [0] = {
  42                 .start  = AT91SAM9261_UHP_BASE,
  43                 .end    = AT91SAM9261_UHP_BASE + SZ_1M - 1,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         [1] = {
  47                 .start  = AT91SAM9261_ID_UHP,
  48                 .end    = AT91SAM9261_ID_UHP,
  49                 .flags  = IORESOURCE_IRQ,
  50         },
  51 };
  52
  53 static struct platform_device at91sam9261_usbh_device = {
  54         .name           = "at91_ohci",
  55         .id             = -1,
  56         .dev            = {
  57                                 .dma_mask               = &ohci_dmamask,
  58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  59                                 .platform_data          = &usbh_data,
  60         },
  61         .resource       = usbh_resources,
  62         .num_resources  = ARRAY_SIZE(usbh_resources),
  63 };
  64
  65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  66 {
  67         if (!data)
  68                 return;
  69
  70         usbh_data = *data;
  71         platform_device_register(&at91sam9261_usbh_device);
  72 }
  73 #else
  74 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  75 #endif
  76
  77
  78 /* --------------------------------------------------------------------
  79  *  USB Device (Gadget)
  80  * -------------------------------------------------------------------- */
  81
  82 #ifdef CONFIG_USB_GADGET_AT91
  83 static struct at91_udc_data udc_data;
  84
  85 static struct resource udc_resources[] = {
  86         [0] = {
  87                 .start  = AT91SAM9261_BASE_UDP,
  88                 .end    = AT91SAM9261_BASE_UDP + SZ_16K - 1,
  89                 .flags  = IORESOURCE_MEM,
  90         },
  91         [1] = {
  92                 .start  = AT91SAM9261_ID_UDP,
  93                 .end    = AT91SAM9261_ID_UDP,
  94                 .flags  = IORESOURCE_IRQ,
  95         },
  96 };
  97
  98 static struct platform_device at91sam9261_udc_device = {
  99         .name           = "at91_udc",
 100         .id             = -1,
 101         .dev            = {
 102                                 .platform_data          = &udc_data,
 103         },
 104         .resource       = udc_resources,
 105         .num_resources  = ARRAY_SIZE(udc_resources),
 106 };
 107
 108 void __init at91_add_device_udc(struct at91_udc_data *data)
 109 {
 110         if (!data)
 111                 return;
 112
 113         if (data->vbus_pin) {
 114                 at91_set_gpio_input(data->vbus_pin, 0);
 115                 at91_set_deglitch(data->vbus_pin, 1);
 116         }
 117
 118         /* Pullup pin is handled internally by USB device peripheral */
 119
 120         udc_data = *data;
 121         platform_device_register(&at91sam9261_udc_device);
 122 }
 123 #else
 124 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 125 #endif
 126
 127 /* --------------------------------------------------------------------
 128  *  MMC / SD
 129  * -------------------------------------------------------------------- */
 130
 131 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 132 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 133 static struct at91_mmc_data mmc_data;
 134
 135 static struct resource mmc_resources[] = {
 136         [0] = {
 137                 .start  = AT91SAM9261_BASE_MCI,
 138                 .end    = AT91SAM9261_BASE_MCI + SZ_16K - 1,
 139                 .flags  = IORESOURCE_MEM,
 140         },
 141         [1] = {
 142                 .start  = AT91SAM9261_ID_MCI,
 143                 .end    = AT91SAM9261_ID_MCI,
 144                 .flags  = IORESOURCE_IRQ,
 145         },
 146 };
 147
 148 static struct platform_device at91sam9261_mmc_device = {
 149         .name           = "at91_mci",
 150         .id             = -1,
 151         .dev            = {
 152                                 .dma_mask               = &mmc_dmamask,
 153                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 154                                 .platform_data          = &mmc_data,
 155         },
 156         .resource       = mmc_resources,
 157         .num_resources  = ARRAY_SIZE(mmc_resources),
 158 };
 159
 160 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 161 {
 162         if (!data)
 163                 return;
 164
 165         /* input/irq */
 166         if (data->det_pin) {
 167                 at91_set_gpio_input(data->det_pin, 1);
 168                 at91_set_deglitch(data->det_pin, 1);
 169         }
 170         if (data->wp_pin)
 171                 at91_set_gpio_input(data->wp_pin, 1);
 172         if (data->vcc_pin)
 173                 at91_set_gpio_output(data->vcc_pin, 0);
 174
 175         /* CLK */
 176         at91_set_B_periph(AT91_PIN_PA2, 0);
 177
 178         /* CMD */
 179         at91_set_B_periph(AT91_PIN_PA1, 1);
 180
 181         /* DAT0, maybe DAT1..DAT3 */
 182         at91_set_B_periph(AT91_PIN_PA0, 1);
 183         if (data->wire4) {
 184                 at91_set_B_periph(AT91_PIN_PA4, 1);
 185                 at91_set_B_periph(AT91_PIN_PA5, 1);
 186                 at91_set_B_periph(AT91_PIN_PA6, 1);
 187         }
 188
 189         mmc_data = *data;
 190         platform_device_register(&at91sam9261_mmc_device);
 191 }
 192 #else
 193 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 194 #endif
 195
 196
 197 /* --------------------------------------------------------------------
 198  *  NAND / SmartMedia
 199  * -------------------------------------------------------------------- */
 200
 201 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 202 static struct at91_nand_data nand_data;
 203
 204 #define NAND_BASE       AT91_CHIPSELECT_3
 205
 206 static struct resource nand_resources[] = {
 207         {
 208                 .start  = NAND_BASE,
 209                 .end    = NAND_BASE + SZ_256M - 1,
 210                 .flags  = IORESOURCE_MEM,
 211         }
 212 };
 213
 214 static struct platform_device at91_nand_device = {
 215         .name           = "at91_nand",
 216         .id             = -1,
 217         .dev            = {
 218                                 .platform_data  = &nand_data,
 219         },
 220         .resource       = nand_resources,
 221         .num_resources  = ARRAY_SIZE(nand_resources),
 222 };
 223
 224 void __init at91_add_device_nand(struct at91_nand_data *data)
 225 {
 226         unsigned long csa, mode;
 227
 228         if (!data)
 229                 return;
 230
 231         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 232         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 233
 234         /* set the bus interface characteristics */
 235         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
 236                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
 237
 238         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
 239                         | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
 240
 241         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
 242
 243         if (data->bus_width_16)
 244                 mode = AT91_SMC_DBW_16;
 245         else
 246                 mode = AT91_SMC_DBW_8;
 247         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
 248
 249         /* enable pin */
 250         if (data->enable_pin)
 251                 at91_set_gpio_output(data->enable_pin, 1);
 252
 253         /* ready/busy pin */
 254         if (data->rdy_pin)
 255                 at91_set_gpio_input(data->rdy_pin, 1);
 256
 257         /* card detect pin */
 258         if (data->det_pin)
 259                 at91_set_gpio_input(data->det_pin, 1);
 260
 261         at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
 262         at91_set_A_periph(AT91_PIN_PC1, 0);             /* NANDWE */
 263
 264         nand_data = *data;
 265         platform_device_register(&at91_nand_device);
 266 }
 267
 268 #else
 269 void __init at91_add_device_nand(struct at91_nand_data *data) {}
 270 #endif
 271
 272
 273 /* --------------------------------------------------------------------
 274  *  TWI (i2c)
 275  * -------------------------------------------------------------------- */
 276
 277 /*
 278  * Prefer the GPIO code since the TWI controller isn't robust
 279  * (gets overruns and underruns under load) and can only issue
 280  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 281  */
 282 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 283
 284 static struct i2c_gpio_platform_data pdata = {
 285         .sda_pin                = AT91_PIN_PA7,
 286         .sda_is_open_drain      = 1,
 287         .scl_pin                = AT91_PIN_PA8,
 288         .scl_is_open_drain      = 1,
 289         .udelay                 = 2,            /* ~100 kHz */
 290 };
 291
 292 static struct platform_device at91sam9261_twi_device = {
 293         .name                   = "i2c-gpio",
 294         .id                     = -1,
 295         .dev.platform_data      = &pdata,
 296 };
 297
 298 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 299 {
 300         at91_set_GPIO_periph(AT91_PIN_PA7, 1);          /* TWD (SDA) */
 301         at91_set_multi_drive(AT91_PIN_PA7, 1);
 302
 303         at91_set_GPIO_periph(AT91_PIN_PA8, 1);          /* TWCK (SCL) */
 304         at91_set_multi_drive(AT91_PIN_PA8, 1);
 305
 306         i2c_register_board_info(0, devices, nr_devices);
 307         platform_device_register(&at91sam9261_twi_device);
 308 }
 309
 310 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 311
 312 static struct resource twi_resources[] = {
 313         [0] = {
 314                 .start  = AT91SAM9261_BASE_TWI,
 315                 .end    = AT91SAM9261_BASE_TWI + SZ_16K - 1,
 316                 .flags  = IORESOURCE_MEM,
 317         },
 318         [1] = {
 319                 .start  = AT91SAM9261_ID_TWI,
 320                 .end    = AT91SAM9261_ID_TWI,
 321                 .flags  = IORESOURCE_IRQ,
 322         },
 323 };
 324
 325 static struct platform_device at91sam9261_twi_device = {
 326         .name           = "at91_i2c",
 327         .id             = -1,
 328         .resource       = twi_resources,
 329         .num_resources  = ARRAY_SIZE(twi_resources),
 330 };
 331
 332 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 333 {
 334         /* pins used for TWI interface */
 335         at91_set_A_periph(AT91_PIN_PA7, 0);             /* TWD */
 336         at91_set_multi_drive(AT91_PIN_PA7, 1);
 337
 338         at91_set_A_periph(AT91_PIN_PA8, 0);             /* TWCK */
 339         at91_set_multi_drive(AT91_PIN_PA8, 1);
 340
 341         i2c_register_board_info(0, devices, nr_devices);
 342         platform_device_register(&at91sam9261_twi_device);
 343 }
 344 #else
 345 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 346 #endif
 347
 348
 349 /* --------------------------------------------------------------------
 350  *  SPI
 351  * -------------------------------------------------------------------- */
 352
 353 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 354 static u64 spi_dmamask = DMA_BIT_MASK(32);
 355
 356 static struct resource spi0_resources[] = {
 357         [0] = {
 358                 .start  = AT91SAM9261_BASE_SPI0,
 359                 .end    = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
 360                 .flags  = IORESOURCE_MEM,
 361         },
 362         [1] = {
 363                 .start  = AT91SAM9261_ID_SPI0,
 364                 .end    = AT91SAM9261_ID_SPI0,
 365                 .flags  = IORESOURCE_IRQ,
 366         },
 367 };
 368
 369 static struct platform_device at91sam9261_spi0_device = {
 370         .name           = "atmel_spi",
 371         .id             = 0,
 372         .dev            = {
 373                                 .dma_mask               = &spi_dmamask,
 374                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 375         },
 376         .resource       = spi0_resources,
 377         .num_resources  = ARRAY_SIZE(spi0_resources),
 378 };
 379
 380 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 381
 382 static struct resource spi1_resources[] = {
 383         [0] = {
 384                 .start  = AT91SAM9261_BASE_SPI1,
 385                 .end    = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
 386                 .flags  = IORESOURCE_MEM,
 387         },
 388         [1] = {
 389                 .start  = AT91SAM9261_ID_SPI1,
 390                 .end    = AT91SAM9261_ID_SPI1,
 391                 .flags  = IORESOURCE_IRQ,
 392         },
 393 };
 394
 395 static struct platform_device at91sam9261_spi1_device = {
 396         .name           = "atmel_spi",
 397         .id             = 1,
 398         .dev            = {
 399                                 .dma_mask               = &spi_dmamask,
 400                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 401         },
 402         .resource       = spi1_resources,
 403         .num_resources  = ARRAY_SIZE(spi1_resources),
 404 };
 405
 406 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
 407
 408 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 409 {
 410         int i;
 411         unsigned long cs_pin;
 412         short enable_spi0 = 0;
 413         short enable_spi1 = 0;
 414
 415         /* Choose SPI chip-selects */
 416         for (i = 0; i < nr_devices; i++) {
 417                 if (devices[i].controller_data)
 418                         cs_pin = (unsigned long) devices[i].controller_data;
 419                 else if (devices[i].bus_num == 0)
 420                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 421                 else
 422                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 423
 424                 if (devices[i].bus_num == 0)
 425                         enable_spi0 = 1;
 426                 else
 427                         enable_spi1 = 1;
 428
 429                 /* enable chip-select pin */
 430                 at91_set_gpio_output(cs_pin, 1);
 431
 432                 /* pass chip-select pin to driver */
 433                 devices[i].controller_data = (void *) cs_pin;
 434         }
 435
 436         spi_register_board_info(devices, nr_devices);
 437
 438         /* Configure SPI bus(es) */
 439         if (enable_spi0) {
 440                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 441                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 442                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 443
 444                 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
 445                 platform_device_register(&at91sam9261_spi0_device);
 446         }
 447         if (enable_spi1) {
 448                 at91_set_A_periph(AT91_PIN_PB30, 0);    /* SPI1_MISO */
 449                 at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
 450                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
 451
 452                 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
 453                 platform_device_register(&at91sam9261_spi1_device);
 454         }
 455 }
 456 #else
 457 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 458 #endif
 459
 460
 461 /* --------------------------------------------------------------------
 462  *  LCD Controller
 463  * -------------------------------------------------------------------- */
 464
 465 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 466 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 467 static struct atmel_lcdfb_info lcdc_data;
 468
 469 static struct resource lcdc_resources[] = {
 470         [0] = {
 471                 .start  = AT91SAM9261_LCDC_BASE,
 472                 .end    = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
 473                 .flags  = IORESOURCE_MEM,
 474         },
 475         [1] = {
 476                 .start  = AT91SAM9261_ID_LCDC,
 477                 .end    = AT91SAM9261_ID_LCDC,
 478                 .flags  = IORESOURCE_IRQ,
 479         },
 480 #if defined(CONFIG_FB_INTSRAM)
 481         [2] = {
 482                 .start  = AT91SAM9261_SRAM_BASE,
 483                 .end    = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
 484                 .flags  = IORESOURCE_MEM,
 485         },
 486 #endif
 487 };
 488
 489 static struct platform_device at91_lcdc_device = {
 490         .name           = "atmel_lcdfb",
 491         .id             = 0,
 492         .dev            = {
 493                                 .dma_mask               = &lcdc_dmamask,
 494                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 495                                 .platform_data          = &lcdc_data,
 496         },
 497         .resource       = lcdc_resources,
 498         .num_resources  = ARRAY_SIZE(lcdc_resources),
 499 };
 500
 501 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 502 {
 503         if (!data) {
 504                 return;
 505         }
 506
 507 #if defined(CONFIG_FB_ATMEL_STN)
 508         at91_set_A_periph(AT91_PIN_PB0, 0);     /* LCDVSYNC */
 509         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
 510         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
 511         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
 512         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
 513         at91_set_A_periph(AT91_PIN_PB5, 0);     /* LCDD0 */
 514         at91_set_A_periph(AT91_PIN_PB6, 0);     /* LCDD1 */
 515         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
 516         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
 517 #else
 518         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
 519         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
 520         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
 521         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
 522         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
 523         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
 524         at91_set_A_periph(AT91_PIN_PB9, 0);     /* LCDD4 */
 525         at91_set_A_periph(AT91_PIN_PB10, 0);    /* LCDD5 */
 526         at91_set_A_periph(AT91_PIN_PB11, 0);    /* LCDD6 */
 527         at91_set_A_periph(AT91_PIN_PB12, 0);    /* LCDD7 */
 528         at91_set_A_periph(AT91_PIN_PB15, 0);    /* LCDD10 */
 529         at91_set_A_periph(AT91_PIN_PB16, 0);    /* LCDD11 */
 530         at91_set_A_periph(AT91_PIN_PB17, 0);    /* LCDD12 */
 531         at91_set_A_periph(AT91_PIN_PB18, 0);    /* LCDD13 */
 532         at91_set_A_periph(AT91_PIN_PB19, 0);    /* LCDD14 */
 533         at91_set_A_periph(AT91_PIN_PB20, 0);    /* LCDD15 */
 534         at91_set_B_periph(AT91_PIN_PB23, 0);    /* LCDD18 */
 535         at91_set_B_periph(AT91_PIN_PB24, 0);    /* LCDD19 */
 536         at91_set_B_periph(AT91_PIN_PB25, 0);    /* LCDD20 */
 537         at91_set_B_periph(AT91_PIN_PB26, 0);    /* LCDD21 */
 538         at91_set_B_periph(AT91_PIN_PB27, 0);    /* LCDD22 */
 539         at91_set_B_periph(AT91_PIN_PB28, 0);    /* LCDD23 */
 540 #endif
 541
 542         lcdc_data = *data;
 543         platform_device_register(&at91_lcdc_device);
 544 }
 545 #else
 546 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 547 #endif
 548
 549
 550 /* --------------------------------------------------------------------
 551  *  Timer/Counter block
 552  * -------------------------------------------------------------------- */
 553
 554 #ifdef CONFIG_ATMEL_TCLIB
 555
 556 static struct resource tcb_resources[] = {
 557         [0] = {
 558                 .start  = AT91SAM9261_BASE_TCB0,
 559                 .end    = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
 560                 .flags  = IORESOURCE_MEM,
 561         },
 562         [1] = {
 563                 .start  = AT91SAM9261_ID_TC0,
 564                 .end    = AT91SAM9261_ID_TC0,
 565                 .flags  = IORESOURCE_IRQ,
 566         },
 567         [2] = {
 568                 .start  = AT91SAM9261_ID_TC1,
 569                 .end    = AT91SAM9261_ID_TC1,
 570                 .flags  = IORESOURCE_IRQ,
 571         },
 572         [3] = {
 573                 .start  = AT91SAM9261_ID_TC2,
 574                 .end    = AT91SAM9261_ID_TC2,
 575                 .flags  = IORESOURCE_IRQ,
 576         },
 577 };
 578
 579 static struct platform_device at91sam9261_tcb_device = {
 580         .name           = "atmel_tcb",
 581         .id             = 0,
 582         .resource       = tcb_resources,
 583         .num_resources  = ARRAY_SIZE(tcb_resources),
 584 };
 585
 586 static void __init at91_add_device_tc(void)
 587 {
 588         /* this chip has a separate clock and irq for each TC channel */
 589         at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
 590         at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
 591         at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
 592         platform_device_register(&at91sam9261_tcb_device);
 593 }
 594 #else
 595 static void __init at91_add_device_tc(void) { }
 596 #endif
 597
 598
 599 /* --------------------------------------------------------------------
 600  *  RTT
 601  * -------------------------------------------------------------------- */
 602
 603 static struct resource rtt_resources[] = {
 604         {
 605                 .start  = AT91_BASE_SYS + AT91_RTT,
 606                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
 607                 .flags  = IORESOURCE_MEM,
 608         }
 609 };
 610
 611 static struct platform_device at91sam9261_rtt_device = {
 612         .name           = "at91_rtt",
 613         .id             = 0,
 614         .resource       = rtt_resources,
 615         .num_resources  = ARRAY_SIZE(rtt_resources),
 616 };
 617
 618 static void __init at91_add_device_rtt(void)
 619 {
 620         platform_device_register(&at91sam9261_rtt_device);
 621 }
 622
 623
 624 /* --------------------------------------------------------------------
 625  *  Watchdog
 626  * -------------------------------------------------------------------- */
 627
 628 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
 629 static struct platform_device at91sam9261_wdt_device = {
 630         .name           = "at91_wdt",
 631         .id             = -1,
 632         .num_resources  = 0,
 633 };
 634
 635 static void __init at91_add_device_watchdog(void)
 636 {
 637         platform_device_register(&at91sam9261_wdt_device);
 638 }
 639 #else
 640 static void __init at91_add_device_watchdog(void) {}
 641 #endif
 642
 643
 644 /* --------------------------------------------------------------------
 645  *  SSC -- Synchronous Serial Controller
 646  * -------------------------------------------------------------------- */
 647
 648 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 649 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 650
 651 static struct resource ssc0_resources[] = {
 652         [0] = {
 653                 .start  = AT91SAM9261_BASE_SSC0,
 654                 .end    = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
 655                 .flags  = IORESOURCE_MEM,
 656         },
 657         [1] = {
 658                 .start  = AT91SAM9261_ID_SSC0,
 659                 .end    = AT91SAM9261_ID_SSC0,
 660                 .flags  = IORESOURCE_IRQ,
 661         },
 662 };
 663
 664 static struct platform_device at91sam9261_ssc0_device = {
 665         .name   = "ssc",
 666         .id     = 0,
 667         .dev    = {
 668                 .dma_mask               = &ssc0_dmamask,
 669                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 670         },
 671         .resource       = ssc0_resources,
 672         .num_resources  = ARRAY_SIZE(ssc0_resources),
 673 };
 674
 675 static inline void configure_ssc0_pins(unsigned pins)
 676 {
 677         if (pins & ATMEL_SSC_TF)
 678                 at91_set_A_periph(AT91_PIN_PB21, 1);
 679         if (pins & ATMEL_SSC_TK)
 680                 at91_set_A_periph(AT91_PIN_PB22, 1);
 681         if (pins & ATMEL_SSC_TD)
 682                 at91_set_A_periph(AT91_PIN_PB23, 1);
 683         if (pins & ATMEL_SSC_RD)
 684                 at91_set_A_periph(AT91_PIN_PB24, 1);
 685         if (pins & ATMEL_SSC_RK)
 686                 at91_set_A_periph(AT91_PIN_PB25, 1);
 687         if (pins & ATMEL_SSC_RF)
 688                 at91_set_A_periph(AT91_PIN_PB26, 1);
 689 }
 690
 691 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 692
 693 static struct resource ssc1_resources[] = {
 694         [0] = {
 695                 .start  = AT91SAM9261_BASE_SSC1,
 696                 .end    = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
 697                 .flags  = IORESOURCE_MEM,
 698         },
 699         [1] = {
 700                 .start  = AT91SAM9261_ID_SSC1,
 701                 .end    = AT91SAM9261_ID_SSC1,
 702                 .flags  = IORESOURCE_IRQ,
 703         },
 704 };
 705
 706 static struct platform_device at91sam9261_ssc1_device = {
 707         .name   = "ssc",
 708         .id     = 1,
 709         .dev    = {
 710                 .dma_mask               = &ssc1_dmamask,
 711                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 712         },
 713         .resource       = ssc1_resources,
 714         .num_resources  = ARRAY_SIZE(ssc1_resources),
 715 };
 716
 717 static inline void configure_ssc1_pins(unsigned pins)
 718 {
 719         if (pins & ATMEL_SSC_TF)
 720                 at91_set_B_periph(AT91_PIN_PA17, 1);
 721         if (pins & ATMEL_SSC_TK)
 722                 at91_set_B_periph(AT91_PIN_PA18, 1);
 723         if (pins & ATMEL_SSC_TD)
 724                 at91_set_B_periph(AT91_PIN_PA19, 1);
 725         if (pins & ATMEL_SSC_RD)
 726                 at91_set_B_periph(AT91_PIN_PA20, 1);
 727         if (pins & ATMEL_SSC_RK)
 728                 at91_set_B_periph(AT91_PIN_PA21, 1);
 729         if (pins & ATMEL_SSC_RF)
 730                 at91_set_B_periph(AT91_PIN_PA22, 1);
 731 }
 732
 733 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
 734
 735 static struct resource ssc2_resources[] = {
 736         [0] = {
 737                 .start  = AT91SAM9261_BASE_SSC2,
 738                 .end    = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
 739                 .flags  = IORESOURCE_MEM,
 740         },
 741         [1] = {
 742                 .start  = AT91SAM9261_ID_SSC2,
 743                 .end    = AT91SAM9261_ID_SSC2,
 744                 .flags  = IORESOURCE_IRQ,
 745         },
 746 };
 747
 748 static struct platform_device at91sam9261_ssc2_device = {
 749         .name   = "ssc",
 750         .id     = 2,
 751         .dev    = {
 752                 .dma_mask               = &ssc2_dmamask,
 753                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 754         },
 755         .resource       = ssc2_resources,
 756         .num_resources  = ARRAY_SIZE(ssc2_resources),
 757 };
 758
 759 static inline void configure_ssc2_pins(unsigned pins)
 760 {
 761         if (pins & ATMEL_SSC_TF)
 762                 at91_set_B_periph(AT91_PIN_PC25, 1);
 763         if (pins & ATMEL_SSC_TK)
 764                 at91_set_B_periph(AT91_PIN_PC26, 1);
 765         if (pins & ATMEL_SSC_TD)
 766                 at91_set_B_periph(AT91_PIN_PC27, 1);
 767         if (pins & ATMEL_SSC_RD)
 768                 at91_set_B_periph(AT91_PIN_PC28, 1);
 769         if (pins & ATMEL_SSC_RK)
 770                 at91_set_B_periph(AT91_PIN_PC29, 1);
 771         if (pins & ATMEL_SSC_RF)
 772                 at91_set_B_periph(AT91_PIN_PC30, 1);
 773 }
 774
 775 /*
 776  * SSC controllers are accessed through library code, instead of any
 777  * kind of all-singing/all-dancing driver.  For example one could be
 778  * used by a particular I2S audio codec's driver, while another one
 779  * on the same system might be used by a custom data capture driver.
 780  */
 781 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 782 {
 783         struct platform_device *pdev;
 784
 785         /*
 786          * NOTE: caller is responsible for passing information matching
 787          * "pins" to whatever will be using each particular controller.
 788          */
 789         switch (id) {
 790         case AT91SAM9261_ID_SSC0:
 791                 pdev = &at91sam9261_ssc0_device;
 792                 configure_ssc0_pins(pins);
 793                 at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
 794                 break;
 795         case AT91SAM9261_ID_SSC1:
 796                 pdev = &at91sam9261_ssc1_device;
 797                 configure_ssc1_pins(pins);
 798                 at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
 799                 break;
 800         case AT91SAM9261_ID_SSC2:
 801                 pdev = &at91sam9261_ssc2_device;
 802                 configure_ssc2_pins(pins);
 803                 at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");
 804                 break;
 805         default:
 806                 return;
 807         }
 808
 809         platform_device_register(pdev);
 810 }
 811
 812 #else
 813 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 814 #endif
 815
 816
 817 /* --------------------------------------------------------------------
 818  *  UART
 819  * -------------------------------------------------------------------- */
 820
 821 #if defined(CONFIG_SERIAL_ATMEL)
 822 static struct resource dbgu_resources[] = {
 823         [0] = {
 824                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 825                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 826                 .flags  = IORESOURCE_MEM,
 827         },
 828         [1] = {
 829                 .start  = AT91_ID_SYS,
 830                 .end    = AT91_ID_SYS,
 831                 .flags  = IORESOURCE_IRQ,
 832         },
 833 };
 834
 835 static struct atmel_uart_data dbgu_data = {
 836         .use_dma_tx     = 0,
 837         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 838         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 839 };
 840
 841 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 842
 843 static struct platform_device at91sam9261_dbgu_device = {
 844         .name           = "atmel_usart",
 845         .id             = 0,
 846         .dev            = {
 847                                 .dma_mask               = &dbgu_dmamask,
 848                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 849                                 .platform_data          = &dbgu_data,
 850         },
 851         .resource       = dbgu_resources,
 852         .num_resources  = ARRAY_SIZE(dbgu_resources),
 853 };
 854
 855 static inline void configure_dbgu_pins(void)
 856 {
 857         at91_set_A_periph(AT91_PIN_PA9, 0);             /* DRXD */
 858         at91_set_A_periph(AT91_PIN_PA10, 1);            /* DTXD */
 859 }
 860
 861 static struct resource uart0_resources[] = {
 862         [0] = {
 863                 .start  = AT91SAM9261_BASE_US0,
 864                 .end    = AT91SAM9261_BASE_US0 + SZ_16K - 1,
 865                 .flags  = IORESOURCE_MEM,
 866         },
 867         [1] = {
 868                 .start  = AT91SAM9261_ID_US0,
 869                 .end    = AT91SAM9261_ID_US0,
 870                 .flags  = IORESOURCE_IRQ,
 871         },
 872 };
 873
 874 static struct atmel_uart_data uart0_data = {
 875         .use_dma_tx     = 1,
 876         .use_dma_rx     = 1,
 877 };
 878
 879 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 880
 881 static struct platform_device at91sam9261_uart0_device = {
 882         .name           = "atmel_usart",
 883         .id             = 1,
 884         .dev            = {
 885                                 .dma_mask               = &uart0_dmamask,
 886                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 887                                 .platform_data          = &uart0_data,
 888         },
 889         .resource       = uart0_resources,
 890         .num_resources  = ARRAY_SIZE(uart0_resources),
 891 };
 892
 893 static inline void configure_usart0_pins(unsigned pins)
 894 {
 895         at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
 896         at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
 897
 898         if (pins & ATMEL_UART_RTS)
 899                 at91_set_A_periph(AT91_PIN_PC10, 0);    /* RTS0 */
 900         if (pins & ATMEL_UART_CTS)
 901                 at91_set_A_periph(AT91_PIN_PC11, 0);    /* CTS0 */
 902 }
 903
 904 static struct resource uart1_resources[] = {
 905         [0] = {
 906                 .start  = AT91SAM9261_BASE_US1,
 907                 .end    = AT91SAM9261_BASE_US1 + SZ_16K - 1,
 908                 .flags  = IORESOURCE_MEM,
 909         },
 910         [1] = {
 911                 .start  = AT91SAM9261_ID_US1,
 912                 .end    = AT91SAM9261_ID_US1,
 913                 .flags  = IORESOURCE_IRQ,
 914         },
 915 };
 916
 917 static struct atmel_uart_data uart1_data = {
 918         .use_dma_tx     = 1,
 919         .use_dma_rx     = 1,
 920 };
 921
 922 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 923
 924 static struct platform_device at91sam9261_uart1_device = {
 925         .name           = "atmel_usart",
 926         .id             = 2,
 927         .dev            = {
 928                                 .dma_mask               = &uart1_dmamask,
 929                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 930                                 .platform_data          = &uart1_data,
 931         },
 932         .resource       = uart1_resources,
 933         .num_resources  = ARRAY_SIZE(uart1_resources),
 934 };
 935
 936 static inline void configure_usart1_pins(unsigned pins)
 937 {
 938         at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
 939         at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
 940
 941         if (pins & ATMEL_UART_RTS)
 942                 at91_set_B_periph(AT91_PIN_PA12, 0);    /* RTS1 */
 943         if (pins & ATMEL_UART_CTS)
 944                 at91_set_B_periph(AT91_PIN_PA13, 0);    /* CTS1 */
 945 }
 946
 947 static struct resource uart2_resources[] = {
 948         [0] = {
 949                 .start  = AT91SAM9261_BASE_US2,
 950                 .end    = AT91SAM9261_BASE_US2 + SZ_16K - 1,
 951                 .flags  = IORESOURCE_MEM,
 952         },
 953         [1] = {
 954                 .start  = AT91SAM9261_ID_US2,
 955                 .end    = AT91SAM9261_ID_US2,
 956                 .flags  = IORESOURCE_IRQ,
 957         },
 958 };
 959
 960 static struct atmel_uart_data uart2_data = {
 961         .use_dma_tx     = 1,
 962         .use_dma_rx     = 1,
 963 };
 964
 965 static u64 uart2_dmamask = DMA_BIT_MASK(32);
 966
 967 static struct platform_device at91sam9261_uart2_device = {
 968         .name           = "atmel_usart",
 969         .id             = 3,
 970         .dev            = {
 971                                 .dma_mask               = &uart2_dmamask,
 972                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 973                                 .platform_data          = &uart2_data,
 974         },
 975         .resource       = uart2_resources,
 976         .num_resources  = ARRAY_SIZE(uart2_resources),
 977 };
 978
 979 static inline void configure_usart2_pins(unsigned pins)
 980 {
 981         at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
 982         at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
 983
 984         if (pins & ATMEL_UART_RTS)
 985                 at91_set_B_periph(AT91_PIN_PA15, 0);    /* RTS2*/
 986         if (pins & ATMEL_UART_CTS)
 987                 at91_set_B_periph(AT91_PIN_PA16, 0);    /* CTS2 */
 988 }
 989
 990 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
 991 struct platform_device *atmel_default_console_device;   /* the serial console device */
 992
 993 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 994 {
 995         struct platform_device *pdev;
 996
 997         switch (id) {
 998                 case 0:         /* DBGU */
 999                         pdev = &at91sam9261_dbgu_device;
1000                         configure_dbgu_pins();
1001                         at91_clock_associate("mck", &pdev->dev, "usart");
1002                         break;
1003                 case AT91SAM9261_ID_US0:
1004                         pdev = &at91sam9261_uart0_device;
1005                         configure_usart0_pins(pins);
1006                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1007                         break;
1008                 case AT91SAM9261_ID_US1:
1009                         pdev = &at91sam9261_uart1_device;
1010                         configure_usart1_pins(pins);
1011                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1012                         break;
1013                 case AT91SAM9261_ID_US2:
1014                         pdev = &at91sam9261_uart2_device;
1015                         configure_usart2_pins(pins);
1016                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1017                         break;
1018                 default:
1019                         return;
1020         }
1021         pdev->id = portnr;              /* update to mapped ID */
1022
1023         if (portnr < ATMEL_MAX_UART)
1024                 at91_uarts[portnr] = pdev;
1025 }
1026
1027 void __init at91_set_serial_console(unsigned portnr)
1028 {
1029         if (portnr < ATMEL_MAX_UART)
1030                 atmel_default_console_device = at91_uarts[portnr];
1031 }
1032
1033 void __init at91_add_device_serial(void)
1034 {
1035         int i;
1036
1037         for (i = 0; i < ATMEL_MAX_UART; i++) {
1038                 if (at91_uarts[i])
1039                         platform_device_register(at91_uarts[i]);
1040         }
1041
1042         if (!atmel_default_console_device)
1043                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1044 }
1045 #else
1046 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1047 void __init at91_set_serial_console(unsigned portnr) {}
1048 void __init at91_add_device_serial(void) {}
1049 #endif
1050
1051
1052 /* -------------------------------------------------------------------- */
1053
1054 /*
1055  * These devices are always present and don't need any board-specific
1056  * setup.
1057  */
1058 static int __init at91_add_standard_devices(void)
1059 {
1060         at91_add_device_rtt();
1061         at91_add_device_watchdog();
1062         at91_add_device_tc();
1063         return 0;
1064 }
1065
1066 arch_initcall(at91_add_standard_devices);