3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
44 #include <asm/unaligned.h>
46 #include "b43legacy.h"
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio;
65 module_param_named(pio, modparam_pio, int, 0444);
66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio 0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio 1
73 static int modparam_bad_frames_preempt;
74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
78 static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
79 module_param_named(short_retry, modparam_short_retry, int, 0444);
80 MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
82 static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
83 module_param_named(long_retry, modparam_long_retry, int, 0444);
84 MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
86 static int modparam_noleds;
87 module_param_named(noleds, modparam_noleds, int, 0444);
88 MODULE_PARM_DESC(noleds, "Turn off all LED activity");
90 static char modparam_fwpostfix[16];
91 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
92 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
94 static int modparam_mon_keep_bad;
95 module_param_named(mon_keep_bad, modparam_mon_keep_bad, int, 0444);
96 MODULE_PARM_DESC(mon_keep_bad, "Keep bad frames in monitor mode");
98 static int modparam_mon_keep_badplcp;
99 module_param_named(mon_keep_badplcp, modparam_mon_keep_bad, int, 0444);
100 MODULE_PARM_DESC(mon_keep_badplcp, "Keep frames with bad PLCP in monitor mode");
102 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
103 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
104 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
105 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
108 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
111 /* Channel and ratetables are shared for all devices.
112 * They can't be const, because ieee80211 puts some precalculated
113 * data in there. This data is the same for all devices, so we don't
114 * get concurrency issues */
115 #define RATETAB_ENT(_rateid, _flags) \
117 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
122 static struct ieee80211_rate __b43legacy_ratetable[] = {
123 RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
124 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
125 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
126 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
127 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
128 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
129 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
130 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
131 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
132 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
133 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
134 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
136 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
137 #define b43legacy_a_ratetable_size 8
138 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
139 #define b43legacy_b_ratetable_size 4
140 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
141 #define b43legacy_g_ratetable_size 12
143 #define CHANTAB_ENT(_chanid, _freq) \
148 .flag = IEEE80211_CHAN_W_SCAN | \
149 IEEE80211_CHAN_W_ACTIVE_SCAN | \
150 IEEE80211_CHAN_W_IBSS, \
151 .power_level = 0x0A, \
152 .antenna_max = 0xFF, \
154 static struct ieee80211_channel b43legacy_bg_chantable[] = {
155 CHANTAB_ENT(1, 2412),
156 CHANTAB_ENT(2, 2417),
157 CHANTAB_ENT(3, 2422),
158 CHANTAB_ENT(4, 2427),
159 CHANTAB_ENT(5, 2432),
160 CHANTAB_ENT(6, 2437),
161 CHANTAB_ENT(7, 2442),
162 CHANTAB_ENT(8, 2447),
163 CHANTAB_ENT(9, 2452),
164 CHANTAB_ENT(10, 2457),
165 CHANTAB_ENT(11, 2462),
166 CHANTAB_ENT(12, 2467),
167 CHANTAB_ENT(13, 2472),
168 CHANTAB_ENT(14, 2484),
170 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
172 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
173 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
174 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
175 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
178 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
180 if (!wl || !wl->current_dev)
182 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
184 /* We are up and running.
185 * Ratelimit the messages to avoid DoS over the net. */
186 return net_ratelimit();
189 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
193 if (!b43legacy_ratelimit(wl))
196 printk(KERN_INFO "b43legacy-%s: ",
197 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
202 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
206 if (!b43legacy_ratelimit(wl))
209 printk(KERN_ERR "b43legacy-%s ERROR: ",
210 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
215 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
219 if (!b43legacy_ratelimit(wl))
222 printk(KERN_WARNING "b43legacy-%s warning: ",
223 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
229 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
234 printk(KERN_DEBUG "b43legacy-%s debug: ",
235 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
241 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
246 B43legacy_WARN_ON(offset % 4 != 0);
248 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
249 if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
252 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
254 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
258 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
259 u16 routing, u16 offset)
263 /* "offset" is the WORD offset. */
268 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
271 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
272 u16 routing, u16 offset)
276 if (routing == B43legacy_SHM_SHARED) {
277 B43legacy_WARN_ON((offset & 0x0001) != 0);
278 if (offset & 0x0003) {
279 /* Unaligned access */
280 b43legacy_shm_control_word(dev, routing, offset >> 2);
281 ret = b43legacy_read16(dev,
282 B43legacy_MMIO_SHM_DATA_UNALIGNED);
284 b43legacy_shm_control_word(dev, routing,
286 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
292 b43legacy_shm_control_word(dev, routing, offset);
293 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
298 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
299 u16 routing, u16 offset)
303 if (routing == B43legacy_SHM_SHARED) {
304 B43legacy_WARN_ON((offset & 0x0001) != 0);
305 if (offset & 0x0003) {
306 /* Unaligned access */
307 b43legacy_shm_control_word(dev, routing, offset >> 2);
308 ret = b43legacy_read16(dev,
309 B43legacy_MMIO_SHM_DATA_UNALIGNED);
315 b43legacy_shm_control_word(dev, routing, offset);
316 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
321 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
322 u16 routing, u16 offset,
325 if (routing == B43legacy_SHM_SHARED) {
326 B43legacy_WARN_ON((offset & 0x0001) != 0);
327 if (offset & 0x0003) {
328 /* Unaligned access */
329 b43legacy_shm_control_word(dev, routing, offset >> 2);
331 b43legacy_write16(dev,
332 B43legacy_MMIO_SHM_DATA_UNALIGNED,
333 (value >> 16) & 0xffff);
335 b43legacy_shm_control_word(dev, routing,
338 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
344 b43legacy_shm_control_word(dev, routing, offset);
346 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
349 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
352 if (routing == B43legacy_SHM_SHARED) {
353 B43legacy_WARN_ON((offset & 0x0001) != 0);
354 if (offset & 0x0003) {
355 /* Unaligned access */
356 b43legacy_shm_control_word(dev, routing, offset >> 2);
358 b43legacy_write16(dev,
359 B43legacy_MMIO_SHM_DATA_UNALIGNED,
365 b43legacy_shm_control_word(dev, routing, offset);
367 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
371 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
375 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
376 B43legacy_SHM_SH_HOSTFHI);
378 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
379 B43legacy_SHM_SH_HOSTFLO);
384 /* Write HostFlags */
385 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
387 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
388 B43legacy_SHM_SH_HOSTFLO,
389 (value & 0x0000FFFF));
390 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
391 B43legacy_SHM_SH_HOSTFHI,
392 ((value & 0xFFFF0000) >> 16));
395 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
397 /* We need to be careful. As we read the TSF from multiple
398 * registers, we should take care of register overflows.
399 * In theory, the whole tsf read process should be atomic.
400 * We try to be atomic here, by restaring the read process,
401 * if any of the high registers changed (overflew).
403 if (dev->dev->id.revision >= 3) {
409 high = b43legacy_read32(dev,
410 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
411 low = b43legacy_read32(dev,
412 B43legacy_MMIO_REV3PLUS_TSF_LOW);
413 high2 = b43legacy_read32(dev,
414 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
415 } while (unlikely(high != high2));
431 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
432 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
433 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
434 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
436 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
437 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
438 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
439 } while (v3 != test3 || v2 != test2 || v1 != test1);
453 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
457 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
458 status |= B43legacy_SBF_TIME_UPDATE;
459 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
463 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
467 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
468 status &= ~B43legacy_SBF_TIME_UPDATE;
469 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
472 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
474 /* Be careful with the in-progress timer.
475 * First zero out the low register, so we have a full
476 * register-overflow duration to complete the operation.
478 if (dev->dev->id.revision >= 3) {
479 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
480 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
482 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
484 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
487 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
490 u16 v0 = (tsf & 0x000000000000FFFFULL);
491 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
492 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
493 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
495 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
497 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
499 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
501 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
503 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
507 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
509 b43legacy_time_lock(dev);
510 b43legacy_tsf_write_locked(dev, tsf);
511 b43legacy_time_unlock(dev);
515 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
516 u16 offset, const u8 *mac)
518 static const u8 zero_addr[ETH_ALEN] = { 0 };
525 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
529 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
532 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
535 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
538 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
540 static const u8 zero_addr[ETH_ALEN] = { 0 };
541 const u8 *mac = dev->wl->mac_addr;
542 const u8 *bssid = dev->wl->bssid;
543 u8 mac_bssid[ETH_ALEN * 2];
552 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
554 memcpy(mac_bssid, mac, ETH_ALEN);
555 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
557 /* Write our MAC address and BSSID to template ram */
558 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
559 tmp = (u32)(mac_bssid[i + 0]);
560 tmp |= (u32)(mac_bssid[i + 1]) << 8;
561 tmp |= (u32)(mac_bssid[i + 2]) << 16;
562 tmp |= (u32)(mac_bssid[i + 3]) << 24;
563 b43legacy_ram_write(dev, 0x20 + i, tmp);
564 b43legacy_ram_write(dev, 0x78 + i, tmp);
565 b43legacy_ram_write(dev, 0x478 + i, tmp);
569 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev,
572 dev->wl->mac_addr = mac_addr;
573 b43legacy_write_mac_bssid_templates(dev);
574 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, mac_addr);
577 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
580 /* slot_time is in usec. */
581 if (dev->phy.type != B43legacy_PHYTYPE_G)
583 b43legacy_write16(dev, 0x684, 510 + slot_time);
584 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
588 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
590 b43legacy_set_slot_time(dev, 9);
594 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
596 b43legacy_set_slot_time(dev, 20);
600 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
601 * Returns the _previously_ enabled IRQ mask.
603 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
608 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
609 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
615 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
616 * Returns the _previously_ enabled IRQ mask.
618 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
623 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
624 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
629 /* Synchronize IRQ top- and bottom-half.
630 * IRQs must be masked before calling this.
631 * This must not be called with the irq_lock held.
633 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
635 synchronize_irq(dev->dev->irq);
636 tasklet_kill(&dev->isr_tasklet);
639 /* DummyTransmission function, as documented on
640 * http://bcm-specs.sipsolutions.net/DummyTransmission
642 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
644 struct b43legacy_phy *phy = &dev->phy;
646 unsigned int max_loop;
657 case B43legacy_PHYTYPE_B:
658 case B43legacy_PHYTYPE_G:
660 buffer[0] = 0x000B846E;
667 for (i = 0; i < 5; i++)
668 b43legacy_ram_write(dev, i * 4, buffer[i]);
670 /* dummy read follows */
671 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
673 b43legacy_write16(dev, 0x0568, 0x0000);
674 b43legacy_write16(dev, 0x07C0, 0x0000);
675 b43legacy_write16(dev, 0x050C, 0x0000);
676 b43legacy_write16(dev, 0x0508, 0x0000);
677 b43legacy_write16(dev, 0x050A, 0x0000);
678 b43legacy_write16(dev, 0x054C, 0x0000);
679 b43legacy_write16(dev, 0x056A, 0x0014);
680 b43legacy_write16(dev, 0x0568, 0x0826);
681 b43legacy_write16(dev, 0x0500, 0x0000);
682 b43legacy_write16(dev, 0x0502, 0x0030);
684 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
685 b43legacy_radio_write16(dev, 0x0051, 0x0017);
686 for (i = 0x00; i < max_loop; i++) {
687 value = b43legacy_read16(dev, 0x050E);
692 for (i = 0x00; i < 0x0A; i++) {
693 value = b43legacy_read16(dev, 0x050E);
698 for (i = 0x00; i < 0x0A; i++) {
699 value = b43legacy_read16(dev, 0x0690);
700 if (!(value & 0x0100))
704 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
705 b43legacy_radio_write16(dev, 0x0051, 0x0037);
708 /* Turn the Analog ON/OFF */
709 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
711 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
714 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
719 flags |= B43legacy_TMSLOW_PHYCLKEN;
720 flags |= B43legacy_TMSLOW_PHYRESET;
721 ssb_device_enable(dev->dev, flags);
722 msleep(2); /* Wait for the PLL to turn on. */
724 /* Now take the PHY out of Reset again */
725 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
726 tmslow |= SSB_TMSLOW_FGC;
727 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
728 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
729 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
731 tmslow &= ~SSB_TMSLOW_FGC;
732 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
733 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
737 b43legacy_switch_analog(dev, 1);
739 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
740 macctl &= ~B43legacy_MACCTL_GMODE;
741 if (flags & B43legacy_TMSLOW_GMODE) {
742 macctl |= B43legacy_MACCTL_GMODE;
746 macctl |= B43legacy_MACCTL_IHR_ENABLED;
747 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
750 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
755 struct b43legacy_txstatus stat;
758 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
759 if (!(v0 & 0x00000001))
761 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
763 stat.cookie = (v0 >> 16);
764 stat.seq = (v1 & 0x0000FFFF);
765 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
766 tmp = (v0 & 0x0000FFFF);
767 stat.frame_count = ((tmp & 0xF000) >> 12);
768 stat.rts_count = ((tmp & 0x0F00) >> 8);
769 stat.supp_reason = ((tmp & 0x001C) >> 2);
770 stat.pm_indicated = !!(tmp & 0x0080);
771 stat.intermediate = !!(tmp & 0x0040);
772 stat.for_ampdu = !!(tmp & 0x0020);
773 stat.acked = !!(tmp & 0x0002);
775 b43legacy_handle_txstatus(dev, &stat);
779 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
783 if (dev->dev->id.revision < 5)
785 /* Read all entries from the microcode TXstatus FIFO
786 * and throw them away.
789 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
790 if (!(dummy & 0x00000001))
792 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
796 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
800 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
802 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
807 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
809 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
810 (jssi & 0x0000FFFF));
811 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
812 (jssi & 0xFFFF0000) >> 16);
815 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
817 b43legacy_jssi_write(dev, 0x7F7F7F7F);
818 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
819 b43legacy_read32(dev,
820 B43legacy_MMIO_STATUS2_BITFIELD)
822 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
826 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
828 /* Top half of Link Quality calculation. */
830 if (dev->noisecalc.calculation_running)
832 dev->noisecalc.channel_at_start = dev->phy.channel;
833 dev->noisecalc.calculation_running = 1;
834 dev->noisecalc.nr_samples = 0;
836 b43legacy_generate_noise_sample(dev);
839 static void handle_irq_noise(struct b43legacy_wldev *dev)
841 struct b43legacy_phy *phy = &dev->phy;
848 /* Bottom half of Link Quality calculation. */
850 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
851 if (dev->noisecalc.channel_at_start != phy->channel)
852 goto drop_calculation;
853 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
854 if (noise[0] == 0x7F || noise[1] == 0x7F ||
855 noise[2] == 0x7F || noise[3] == 0x7F)
858 /* Get the noise samples. */
859 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
860 i = dev->noisecalc.nr_samples;
861 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
862 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
863 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
864 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
865 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
866 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
867 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
868 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
869 dev->noisecalc.nr_samples++;
870 if (dev->noisecalc.nr_samples == 8) {
871 /* Calculate the Link Quality by the noise samples. */
873 for (i = 0; i < 8; i++) {
874 for (j = 0; j < 4; j++)
875 average += dev->noisecalc.samples[i][j];
881 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
883 tmp = (tmp / 128) & 0x1F;
893 dev->stats.link_noise = average;
895 dev->noisecalc.calculation_running = 0;
899 b43legacy_generate_noise_sample(dev);
902 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
904 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
907 if (1/*FIXME: the last PSpoll frame was sent successfully */)
908 b43legacy_power_saving_ctl_bits(dev, -1, -1);
910 dev->reg124_set_0x4 = 0;
911 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
912 dev->reg124_set_0x4 = 1;
915 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
917 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
919 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
920 b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
924 static void handle_irq_pmq(struct b43legacy_wldev *dev)
931 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
932 if (!(tmp & 0x00000008))
935 /* 16bit write is odd, but correct. */
936 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
939 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
940 const u8 *data, u16 size,
942 u16 shm_size_offset, u8 rate)
946 struct b43legacy_plcp_hdr4 plcp;
949 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
950 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
951 ram_offset += sizeof(u32);
952 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
953 * So leave the first two bytes of the next write blank.
955 tmp = (u32)(data[0]) << 16;
956 tmp |= (u32)(data[1]) << 24;
957 b43legacy_ram_write(dev, ram_offset, tmp);
958 ram_offset += sizeof(u32);
959 for (i = 2; i < size; i += sizeof(u32)) {
960 tmp = (u32)(data[i + 0]);
962 tmp |= (u32)(data[i + 1]) << 8;
964 tmp |= (u32)(data[i + 2]) << 16;
966 tmp |= (u32)(data[i + 3]) << 24;
967 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
969 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
970 size + sizeof(struct b43legacy_plcp_hdr6));
973 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
975 u16 shm_size_offset, u8 rate)
980 B43legacy_WARN_ON(!dev->cached_beacon);
981 len = min((size_t)dev->cached_beacon->len,
982 0x200 - sizeof(struct b43legacy_plcp_hdr6));
983 data = (const u8 *)(dev->cached_beacon->data);
984 b43legacy_write_template_common(dev, data,
986 shm_size_offset, rate);
989 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
990 u16 shm_offset, u16 size,
993 struct b43legacy_plcp_hdr4 plcp;
998 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
999 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1002 B43legacy_RATE_TO_100KBPS(rate));
1003 /* Write PLCP in two parts and timing for packet transfer */
1004 tmp = le32_to_cpu(plcp.data);
1005 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1007 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1009 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1013 /* Instead of using custom probe response template, this function
1014 * just patches custom beacon template by:
1015 * 1) Changing packet type
1016 * 2) Patching duration field
1019 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1020 u16 *dest_size, u8 rate)
1029 struct ieee80211_hdr *hdr;
1031 B43legacy_WARN_ON(!dev->cached_beacon);
1032 src_size = dev->cached_beacon->len;
1033 src_data = (const u8 *)dev->cached_beacon->data;
1035 if (unlikely(src_size < 0x24)) {
1036 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1037 "invalid beacon\n");
1041 dest_data = kmalloc(src_size, GFP_ATOMIC);
1042 if (unlikely(!dest_data))
1045 /* 0x24 is offset of first variable-len Information-Element
1048 memcpy(dest_data, src_data, 0x24);
1051 for (; src_pos < src_size - 2; src_pos += elem_size) {
1052 elem_size = src_data[src_pos + 1] + 2;
1053 if (src_data[src_pos] != 0x05) { /* TIM */
1054 memcpy(dest_data + dest_pos, src_data + src_pos,
1056 dest_pos += elem_size;
1059 *dest_size = dest_pos;
1060 hdr = (struct ieee80211_hdr *)dest_data;
1062 /* Set the frame control. */
1063 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1064 IEEE80211_STYPE_PROBE_RESP);
1065 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1068 B43legacy_RATE_TO_100KBPS(rate));
1069 hdr->duration_id = dur;
1074 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1076 u16 shm_size_offset, u8 rate)
1078 u8 *probe_resp_data;
1081 B43legacy_WARN_ON(!dev->cached_beacon);
1082 size = dev->cached_beacon->len;
1083 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1084 if (unlikely(!probe_resp_data))
1087 /* Looks like PLCP headers plus packet timings are stored for
1088 * all possible basic rates
1090 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1091 B43legacy_CCK_RATE_1MB);
1092 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1093 B43legacy_CCK_RATE_2MB);
1094 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1095 B43legacy_CCK_RATE_5MB);
1096 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1097 B43legacy_CCK_RATE_11MB);
1099 size = min((size_t)size,
1100 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1101 b43legacy_write_template_common(dev, probe_resp_data,
1103 shm_size_offset, rate);
1104 kfree(probe_resp_data);
1107 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1108 struct sk_buff *beacon)
1110 if (dev->cached_beacon)
1111 kfree_skb(dev->cached_beacon);
1112 dev->cached_beacon = beacon;
1117 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1121 B43legacy_WARN_ON(!dev->cached_beacon);
1123 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1124 B43legacy_CCK_RATE_1MB);
1125 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1126 B43legacy_CCK_RATE_1MB);
1127 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1128 B43legacy_CCK_RATE_11MB);
1130 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1132 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1135 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1136 struct sk_buff *beacon)
1140 err = b43legacy_refresh_cached_beacon(dev, beacon);
1143 b43legacy_update_templates(dev);
1146 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1147 const u8 *ssid, u8 ssid_len)
1153 len = min((u16)ssid_len, (u16)0x100);
1154 for (i = 0; i < len; i += sizeof(u32)) {
1155 tmp = (u32)(ssid[i + 0]);
1157 tmp |= (u32)(ssid[i + 1]) << 8;
1159 tmp |= (u32)(ssid[i + 2]) << 16;
1161 tmp |= (u32)(ssid[i + 3]) << 24;
1162 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1165 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1169 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1172 b43legacy_time_lock(dev);
1173 if (dev->dev->id.revision >= 3)
1174 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1176 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1177 b43legacy_write16(dev, 0x610, beacon_int);
1179 b43legacy_time_unlock(dev);
1182 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1186 if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1189 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1190 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1192 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1193 /* ACK beacon IRQ. */
1194 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1195 B43legacy_IRQ_BEACON);
1196 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1197 if (dev->cached_beacon)
1198 kfree_skb(dev->cached_beacon);
1199 dev->cached_beacon = NULL;
1202 if (!(status & 0x1)) {
1203 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1204 B43legacy_CCK_RATE_1MB);
1206 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1209 if (!(status & 0x2)) {
1210 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1211 B43legacy_CCK_RATE_1MB);
1213 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1218 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1222 /* Interrupt handler bottom-half */
1223 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1226 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1227 u32 merged_dma_reason = 0;
1230 unsigned long flags;
1232 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1234 B43legacy_WARN_ON(b43legacy_status(dev) <
1235 B43legacy_STAT_INITIALIZED);
1237 reason = dev->irq_reason;
1238 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1239 dma_reason[i] = dev->dma_reason[i];
1240 merged_dma_reason |= dma_reason[i];
1243 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1244 b43legacyerr(dev->wl, "MAC transmission error\n");
1246 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
1247 b43legacyerr(dev->wl, "PHY transmission error\n");
1249 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1250 B43legacy_DMAIRQ_NONFATALMASK))) {
1251 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1252 b43legacyerr(dev->wl, "Fatal DMA error: "
1253 "0x%08X, 0x%08X, 0x%08X, "
1254 "0x%08X, 0x%08X, 0x%08X\n",
1255 dma_reason[0], dma_reason[1],
1256 dma_reason[2], dma_reason[3],
1257 dma_reason[4], dma_reason[5]);
1258 b43legacy_controller_restart(dev, "DMA error");
1260 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1263 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1264 b43legacyerr(dev->wl, "DMA error: "
1265 "0x%08X, 0x%08X, 0x%08X, "
1266 "0x%08X, 0x%08X, 0x%08X\n",
1267 dma_reason[0], dma_reason[1],
1268 dma_reason[2], dma_reason[3],
1269 dma_reason[4], dma_reason[5]);
1272 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1273 handle_irq_ucode_debug(dev);
1274 if (reason & B43legacy_IRQ_TBTT_INDI)
1275 handle_irq_tbtt_indication(dev);
1276 if (reason & B43legacy_IRQ_ATIM_END)
1277 handle_irq_atim_end(dev);
1278 if (reason & B43legacy_IRQ_BEACON)
1279 handle_irq_beacon(dev);
1280 if (reason & B43legacy_IRQ_PMQ)
1281 handle_irq_pmq(dev);
1282 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1284 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1285 handle_irq_noise(dev);
1287 /* Check the DMA reason registers for received data. */
1288 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1289 if (b43legacy_using_pio(dev))
1290 b43legacy_pio_rx(dev->pio.queue0);
1292 b43legacy_dma_rx(dev->dma.rx_ring0);
1293 /* We intentionally don't set "activity" to 1, here. */
1295 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1296 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1297 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1298 if (b43legacy_using_pio(dev))
1299 b43legacy_pio_rx(dev->pio.queue3);
1301 b43legacy_dma_rx(dev->dma.rx_ring3);
1304 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1305 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1307 if (reason & B43legacy_IRQ_TX_OK) {
1308 handle_irq_transmit_status(dev);
1310 /* TODO: In AP mode, this also causes sending of powersave
1314 if (!modparam_noleds)
1315 b43legacy_leds_update(dev, activity);
1316 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1318 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1321 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1322 u16 base, int queueidx)
1326 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1327 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1328 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1330 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1333 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1335 if (b43legacy_using_pio(dev) &&
1336 (dev->dev->id.revision < 3) &&
1337 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1338 /* Apply a PIO specific workaround to the dma_reasons */
1339 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1340 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1341 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1342 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1345 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1347 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1348 dev->dma_reason[0]);
1349 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1350 dev->dma_reason[1]);
1351 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1352 dev->dma_reason[2]);
1353 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1354 dev->dma_reason[3]);
1355 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1356 dev->dma_reason[4]);
1357 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1358 dev->dma_reason[5]);
1361 /* Interrupt handler top-half */
1362 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1364 irqreturn_t ret = IRQ_NONE;
1365 struct b43legacy_wldev *dev = dev_id;
1371 spin_lock(&dev->wl->irq_lock);
1373 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1375 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1376 if (reason == 0xffffffff) /* shared IRQ */
1379 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1383 dev->dma_reason[0] = b43legacy_read32(dev,
1384 B43legacy_MMIO_DMA0_REASON)
1386 dev->dma_reason[1] = b43legacy_read32(dev,
1387 B43legacy_MMIO_DMA1_REASON)
1389 dev->dma_reason[2] = b43legacy_read32(dev,
1390 B43legacy_MMIO_DMA2_REASON)
1392 dev->dma_reason[3] = b43legacy_read32(dev,
1393 B43legacy_MMIO_DMA3_REASON)
1395 dev->dma_reason[4] = b43legacy_read32(dev,
1396 B43legacy_MMIO_DMA4_REASON)
1398 dev->dma_reason[5] = b43legacy_read32(dev,
1399 B43legacy_MMIO_DMA5_REASON)
1402 b43legacy_interrupt_ack(dev, reason);
1403 /* disable all IRQs. They are enabled again in the bottom half. */
1404 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1406 /* save the reason code and call our bottom half. */
1407 dev->irq_reason = reason;
1408 tasklet_schedule(&dev->isr_tasklet);
1411 spin_unlock(&dev->wl->irq_lock);
1416 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1418 release_firmware(dev->fw.ucode);
1419 dev->fw.ucode = NULL;
1420 release_firmware(dev->fw.pcm);
1422 release_firmware(dev->fw.initvals);
1423 dev->fw.initvals = NULL;
1424 release_firmware(dev->fw.initvals_band);
1425 dev->fw.initvals_band = NULL;
1428 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1430 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1431 "Drivers/bcm43xx#devicefirmware "
1432 "and download the correct firmware (version 3).\n");
1435 static int do_request_fw(struct b43legacy_wldev *dev,
1437 const struct firmware **fw)
1439 char path[sizeof(modparam_fwpostfix) + 32];
1440 struct b43legacy_fw_header *hdr;
1447 snprintf(path, ARRAY_SIZE(path),
1448 "b43legacy%s/%s.fw",
1449 modparam_fwpostfix, name);
1450 err = request_firmware(fw, path, dev->dev->dev);
1452 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1453 "or load failed.\n", path);
1456 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1458 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1459 switch (hdr->type) {
1460 case B43legacy_FW_TYPE_UCODE:
1461 case B43legacy_FW_TYPE_PCM:
1462 size = be32_to_cpu(hdr->size);
1463 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1466 case B43legacy_FW_TYPE_IV:
1477 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1481 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1483 struct b43legacy_firmware *fw = &dev->fw;
1484 const u8 rev = dev->dev->id.revision;
1485 const char *filename;
1489 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1492 filename = "ucode2";
1494 filename = "ucode4";
1496 filename = "ucode5";
1497 err = do_request_fw(dev, filename, &fw->ucode);
1506 err = do_request_fw(dev, filename, &fw->pcm);
1510 if (!fw->initvals) {
1511 switch (dev->phy.type) {
1512 case B43legacy_PHYTYPE_G:
1513 if ((rev >= 5) && (rev <= 10))
1514 filename = "b0g0initvals5";
1515 else if (rev == 2 || rev == 4)
1516 filename = "b0g0initvals2";
1518 goto err_no_initvals;
1521 goto err_no_initvals;
1523 err = do_request_fw(dev, filename, &fw->initvals);
1527 if (!fw->initvals_band) {
1528 switch (dev->phy.type) {
1529 case B43legacy_PHYTYPE_G:
1530 if ((rev >= 5) && (rev <= 10))
1531 filename = "b0g0bsinitvals5";
1534 else if (rev == 2 || rev == 4)
1537 goto err_no_initvals;
1540 goto err_no_initvals;
1542 err = do_request_fw(dev, filename, &fw->initvals_band);
1550 b43legacy_print_fw_helptext(dev->wl);
1555 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1556 "core rev %u\n", dev->phy.type, rev);
1560 b43legacy_release_firmware(dev);
1564 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1566 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1577 /* Upload Microcode. */
1578 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1579 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1580 b43legacy_shm_control_word(dev,
1581 B43legacy_SHM_UCODE |
1582 B43legacy_SHM_AUTOINC_W,
1584 for (i = 0; i < len; i++) {
1585 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1586 be32_to_cpu(data[i]));
1591 /* Upload PCM data. */
1592 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1593 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1594 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1595 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1596 /* No need for autoinc bit in SHM_HW */
1597 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1598 for (i = 0; i < len; i++) {
1599 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1600 be32_to_cpu(data[i]));
1605 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1607 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1609 /* Wait for the microcode to load and respond */
1612 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1613 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1616 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1617 b43legacyerr(dev->wl, "Microcode not responding\n");
1618 b43legacy_print_fw_helptext(dev->wl);
1624 /* dummy read follows */
1625 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1627 /* Get and check the revisions. */
1628 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1629 B43legacy_SHM_SH_UCODEREV);
1630 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1631 B43legacy_SHM_SH_UCODEPATCH);
1632 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1633 B43legacy_SHM_SH_UCODEDATE);
1634 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1635 B43legacy_SHM_SH_UCODETIME);
1637 if (fwrev > 0x128) {
1638 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1639 " Only firmware from binary drivers version 3.x"
1640 " is supported. You must change your firmware"
1642 b43legacy_print_fw_helptext(dev->wl);
1643 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1647 b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1648 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1649 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1650 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1652 dev->fw.rev = fwrev;
1653 dev->fw.patch = fwpatch;
1659 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1660 const struct b43legacy_iv *ivals,
1664 const struct b43legacy_iv *iv;
1669 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1671 for (i = 0; i < count; i++) {
1672 if (array_size < sizeof(iv->offset_size))
1674 array_size -= sizeof(iv->offset_size);
1675 offset = be16_to_cpu(iv->offset_size);
1676 bit32 = !!(offset & B43legacy_IV_32BIT);
1677 offset &= B43legacy_IV_OFFSET_MASK;
1678 if (offset >= 0x1000)
1683 if (array_size < sizeof(iv->data.d32))
1685 array_size -= sizeof(iv->data.d32);
1687 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1688 b43legacy_write32(dev, offset, value);
1690 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1696 if (array_size < sizeof(iv->data.d16))
1698 array_size -= sizeof(iv->data.d16);
1700 value = be16_to_cpu(iv->data.d16);
1701 b43legacy_write16(dev, offset, value);
1703 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1714 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1715 b43legacy_print_fw_helptext(dev->wl);
1720 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1722 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1723 const struct b43legacy_fw_header *hdr;
1724 struct b43legacy_firmware *fw = &dev->fw;
1725 const struct b43legacy_iv *ivals;
1729 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1730 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1731 count = be32_to_cpu(hdr->size);
1732 err = b43legacy_write_initvals(dev, ivals, count,
1733 fw->initvals->size - hdr_len);
1736 if (fw->initvals_band) {
1737 hdr = (const struct b43legacy_fw_header *)
1738 (fw->initvals_band->data);
1739 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1741 count = be32_to_cpu(hdr->size);
1742 err = b43legacy_write_initvals(dev, ivals, count,
1743 fw->initvals_band->size - hdr_len);
1752 /* Initialize the GPIOs
1753 * http://bcm-specs.sipsolutions.net/GPIO
1755 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1757 struct ssb_bus *bus = dev->dev->bus;
1758 struct ssb_device *gpiodev, *pcidev = NULL;
1762 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1763 b43legacy_read32(dev,
1764 B43legacy_MMIO_STATUS_BITFIELD)
1767 b43legacy_leds_switch_all(dev, 0);
1768 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1769 b43legacy_read16(dev,
1770 B43legacy_MMIO_GPIO_MASK)
1775 if (dev->dev->bus->chip_id == 0x4301) {
1779 if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
1780 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1781 b43legacy_read16(dev,
1782 B43legacy_MMIO_GPIO_MASK)
1787 if (dev->dev->id.revision >= 2)
1788 mask |= 0x0010; /* FIXME: This is redundant. */
1790 #ifdef CONFIG_SSB_DRIVER_PCICORE
1791 pcidev = bus->pcicore.dev;
1793 gpiodev = bus->chipco.dev ? : pcidev;
1796 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1797 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1803 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1804 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1806 struct ssb_bus *bus = dev->dev->bus;
1807 struct ssb_device *gpiodev, *pcidev = NULL;
1809 #ifdef CONFIG_SSB_DRIVER_PCICORE
1810 pcidev = bus->pcicore.dev;
1812 gpiodev = bus->chipco.dev ? : pcidev;
1815 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1818 /* http://bcm-specs.sipsolutions.net/EnableMac */
1819 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1821 dev->mac_suspended--;
1822 B43legacy_WARN_ON(dev->mac_suspended < 0);
1823 if (dev->mac_suspended == 0) {
1824 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1825 b43legacy_read32(dev,
1826 B43legacy_MMIO_STATUS_BITFIELD)
1827 | B43legacy_SBF_MAC_ENABLED);
1828 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1829 B43legacy_IRQ_MAC_SUSPENDED);
1830 /* the next two are dummy reads */
1831 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1832 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1833 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1837 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1838 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1843 B43legacy_WARN_ON(dev->mac_suspended < 0);
1844 if (dev->mac_suspended == 0) {
1845 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1846 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1847 b43legacy_read32(dev,
1848 B43legacy_MMIO_STATUS_BITFIELD)
1849 & ~B43legacy_SBF_MAC_ENABLED);
1850 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1851 for (i = 10000; i; i--) {
1852 tmp = b43legacy_read32(dev,
1853 B43legacy_MMIO_GEN_IRQ_REASON);
1854 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1858 b43legacyerr(dev->wl, "MAC suspend failed\n");
1861 dev->mac_suspended++;
1864 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1866 struct b43legacy_wl *wl = dev->wl;
1870 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1871 /* Reset status to STA infrastructure mode. */
1872 ctl &= ~B43legacy_MACCTL_AP;
1873 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1874 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1875 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1876 ctl &= ~B43legacy_MACCTL_PROMISC;
1877 ctl |= B43legacy_MACCTL_INFRA;
1879 if (wl->operating) {
1880 switch (wl->if_type) {
1881 case IEEE80211_IF_TYPE_AP:
1882 ctl |= B43legacy_MACCTL_AP;
1884 case IEEE80211_IF_TYPE_IBSS:
1885 ctl &= ~B43legacy_MACCTL_INFRA;
1887 case IEEE80211_IF_TYPE_STA:
1888 case IEEE80211_IF_TYPE_MNTR:
1889 case IEEE80211_IF_TYPE_WDS:
1892 b43legacyerr(wl, "Improper value of %d for"
1893 " wl->if_type\n", wl->if_type);
1897 ctl |= B43legacy_MACCTL_KEEP_CTL;
1898 if (modparam_mon_keep_bad)
1899 ctl |= B43legacy_MACCTL_KEEP_BAD;
1900 if (modparam_mon_keep_badplcp)
1901 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1904 ctl |= B43legacy_MACCTL_PROMISC;
1905 /* Workaround: On old hardware the HW-MAC-address-filter
1906 * doesn't work properly, so always run promisc in filter
1907 * it in software. */
1908 if (dev->dev->id.revision <= 4)
1909 ctl |= B43legacy_MACCTL_PROMISC;
1911 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1914 if ((ctl & B43legacy_MACCTL_INFRA) &&
1915 !(ctl & B43legacy_MACCTL_AP)) {
1916 if (dev->dev->bus->chip_id == 0x4306 &&
1917 dev->dev->bus->chip_rev == 3)
1922 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1925 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1933 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1936 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1938 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1939 b43legacy_shm_read16(dev,
1940 B43legacy_SHM_SHARED, offset));
1943 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1945 switch (dev->phy.type) {
1946 case B43legacy_PHYTYPE_G:
1947 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1948 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1949 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1950 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1951 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1952 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1953 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1955 case B43legacy_PHYTYPE_B:
1956 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1957 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1958 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1959 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1962 B43legacy_BUG_ON(1);
1966 /* Set the TX-Antenna for management frames sent by firmware. */
1967 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1974 case B43legacy_ANTENNA0:
1975 ant |= B43legacy_TX4_PHY_ANT0;
1977 case B43legacy_ANTENNA1:
1978 ant |= B43legacy_TX4_PHY_ANT1;
1980 case B43legacy_ANTENNA_AUTO:
1981 ant |= B43legacy_TX4_PHY_ANTLAST;
1984 B43legacy_BUG_ON(1);
1987 /* FIXME We also need to set the other flags of the PHY control
1988 * field somewhere. */
1991 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1992 B43legacy_SHM_SH_BEACPHYCTL);
1993 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1994 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1995 B43legacy_SHM_SH_BEACPHYCTL, tmp);
1997 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1998 B43legacy_SHM_SH_ACKCTSPHYCTL);
1999 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2000 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2001 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2002 /* For Probe Resposes */
2003 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2004 B43legacy_SHM_SH_PRPHYCTL);
2005 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2006 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2007 B43legacy_SHM_SH_PRPHYCTL, tmp);
2010 /* This is the opposite of b43legacy_chip_init() */
2011 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2013 b43legacy_radio_turn_off(dev);
2014 if (!modparam_noleds)
2015 b43legacy_leds_exit(dev);
2016 b43legacy_gpio_cleanup(dev);
2017 /* firmware is released later */
2020 /* Initialize the chip
2021 * http://bcm-specs.sipsolutions.net/ChipInit
2023 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2025 struct b43legacy_phy *phy = &dev->phy;
2031 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
2032 B43legacy_SBF_CORE_READY
2033 | B43legacy_SBF_400);
2035 err = b43legacy_request_firmware(dev);
2038 err = b43legacy_upload_microcode(dev);
2040 goto out; /* firmware is released later */
2042 err = b43legacy_gpio_init(dev);
2044 goto out; /* firmware is released later */
2045 err = b43legacy_upload_initvals(dev);
2047 goto err_gpio_cleanup;
2048 b43legacy_radio_turn_on(dev);
2049 dev->radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
2050 b43legacyinfo(dev->wl, "Radio %s by hardware\n",
2051 (dev->radio_hw_enable == 0) ? "disabled" : "enabled");
2053 b43legacy_write16(dev, 0x03E6, 0x0000);
2054 err = b43legacy_phy_init(dev);
2058 /* Select initial Interference Mitigation. */
2059 tmp = phy->interfmode;
2060 phy->interfmode = B43legacy_INTERFMODE_NONE;
2061 b43legacy_radio_set_interference_mitigation(dev, tmp);
2063 b43legacy_phy_set_antenna_diversity(dev);
2064 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2066 if (phy->type == B43legacy_PHYTYPE_B) {
2067 value16 = b43legacy_read16(dev, 0x005E);
2069 b43legacy_write16(dev, 0x005E, value16);
2071 b43legacy_write32(dev, 0x0100, 0x01000000);
2072 if (dev->dev->id.revision < 5)
2073 b43legacy_write32(dev, 0x010C, 0x01000000);
2075 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2076 value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2077 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2078 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2079 value32 |= B43legacy_SBF_MODE_NOTADHOC;
2080 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2082 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2083 value32 |= 0x100000;
2084 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2086 if (b43legacy_using_pio(dev)) {
2087 b43legacy_write32(dev, 0x0210, 0x00000100);
2088 b43legacy_write32(dev, 0x0230, 0x00000100);
2089 b43legacy_write32(dev, 0x0250, 0x00000100);
2090 b43legacy_write32(dev, 0x0270, 0x00000100);
2091 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2095 /* Probe Response Timeout value */
2096 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2097 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2099 /* Initially set the wireless operation mode. */
2100 b43legacy_adjust_opmode(dev);
2102 if (dev->dev->id.revision < 3) {
2103 b43legacy_write16(dev, 0x060E, 0x0000);
2104 b43legacy_write16(dev, 0x0610, 0x8000);
2105 b43legacy_write16(dev, 0x0604, 0x0000);
2106 b43legacy_write16(dev, 0x0606, 0x0200);
2108 b43legacy_write32(dev, 0x0188, 0x80000000);
2109 b43legacy_write32(dev, 0x018C, 0x02000000);
2111 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2112 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2113 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2114 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2115 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2116 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2117 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2119 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2120 value32 |= 0x00100000;
2121 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2123 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2124 dev->dev->bus->chipco.fast_pwrup_delay);
2126 B43legacy_WARN_ON(err != 0);
2127 b43legacydbg(dev->wl, "Chip initialized\n");
2132 b43legacy_radio_turn_off(dev);
2134 b43legacy_gpio_cleanup(dev);
2138 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2140 struct b43legacy_phy *phy = &dev->phy;
2142 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2145 b43legacy_mac_suspend(dev);
2146 b43legacy_phy_lo_g_measure(dev);
2147 b43legacy_mac_enable(dev);
2150 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2152 b43legacy_phy_lo_mark_all_unused(dev);
2153 if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
2154 b43legacy_mac_suspend(dev);
2155 b43legacy_calc_nrssi_slope(dev);
2156 b43legacy_mac_enable(dev);
2160 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2162 /* Update device statistics. */
2163 b43legacy_calculate_link_quality(dev);
2166 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2168 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2171 static void b43legacy_periodic_every1sec(struct b43legacy_wldev *dev)
2173 int radio_hw_enable;
2175 /* check if radio hardware enabled status changed */
2176 radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
2177 if (unlikely(dev->radio_hw_enable != radio_hw_enable)) {
2178 dev->radio_hw_enable = radio_hw_enable;
2179 b43legacyinfo(dev->wl, "Radio hardware status changed to %s\n",
2180 (radio_hw_enable == 0) ? "disabled" : "enabled");
2181 b43legacy_leds_update(dev, 0);
2185 static void do_periodic_work(struct b43legacy_wldev *dev)
2189 state = dev->periodic_state;
2190 if (state % 120 == 0)
2191 b43legacy_periodic_every120sec(dev);
2192 if (state % 60 == 0)
2193 b43legacy_periodic_every60sec(dev);
2194 if (state % 30 == 0)
2195 b43legacy_periodic_every30sec(dev);
2196 if (state % 15 == 0)
2197 b43legacy_periodic_every15sec(dev);
2198 b43legacy_periodic_every1sec(dev);
2201 /* Estimate a "Badness" value based on the periodic work
2202 * state-machine state. "Badness" is worse (bigger), if the
2203 * periodic work will take longer.
2205 static int estimate_periodic_work_badness(unsigned int state)
2209 if (state % 120 == 0) /* every 120 sec */
2211 if (state % 60 == 0) /* every 60 sec */
2213 if (state % 30 == 0) /* every 30 sec */
2215 if (state % 15 == 0) /* every 15 sec */
2218 #define BADNESS_LIMIT 4
2222 static void b43legacy_periodic_work_handler(struct work_struct *work)
2224 struct b43legacy_wldev *dev =
2225 container_of(work, struct b43legacy_wldev,
2226 periodic_work.work);
2227 unsigned long flags;
2228 unsigned long delay;
2232 mutex_lock(&dev->wl->mutex);
2234 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2236 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2239 badness = estimate_periodic_work_badness(dev->periodic_state);
2240 if (badness > BADNESS_LIMIT) {
2241 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2242 /* Suspend TX as we don't want to transmit packets while
2243 * we recalibrate the hardware. */
2244 b43legacy_tx_suspend(dev);
2245 savedirqs = b43legacy_interrupt_disable(dev,
2247 /* Periodic work will take a long time, so we want it to
2248 * be preemtible and release the spinlock. */
2249 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2250 b43legacy_synchronize_irq(dev);
2252 do_periodic_work(dev);
2254 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2255 b43legacy_interrupt_enable(dev, savedirqs);
2256 b43legacy_tx_resume(dev);
2258 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2260 /* Take the global driver lock. This will lock any operation. */
2261 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2263 do_periodic_work(dev);
2266 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2268 dev->periodic_state++;
2270 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2271 delay = msecs_to_jiffies(50);
2273 delay = round_jiffies(HZ);
2274 queue_delayed_work(dev->wl->hw->workqueue,
2275 &dev->periodic_work, delay);
2277 mutex_unlock(&dev->wl->mutex);
2280 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2282 struct delayed_work *work = &dev->periodic_work;
2284 dev->periodic_state = 0;
2285 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2286 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2289 /* Validate access to the chip (SHM) */
2290 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2295 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2296 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2297 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2300 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2301 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2304 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2306 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2307 if ((value | B43legacy_MACCTL_GMODE) !=
2308 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2311 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2317 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2321 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2323 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2324 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2325 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2327 /* KTP is a word address, but we address SHM bytewise.
2328 * So multiply by two.
2331 if (dev->dev->id.revision >= 5)
2332 /* Number of RCMTA address slots */
2333 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2334 dev->max_nr_keys - 8);
2337 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2339 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2340 unsigned long flags;
2342 /* Don't take wl->mutex here, as it could deadlock with
2343 * hwrng internal locking. It's not needed to take
2344 * wl->mutex here, anyway. */
2346 spin_lock_irqsave(&wl->irq_lock, flags);
2347 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2348 spin_unlock_irqrestore(&wl->irq_lock, flags);
2350 return (sizeof(u16));
2353 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2355 if (wl->rng_initialized)
2356 hwrng_unregister(&wl->rng);
2359 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2363 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2364 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2365 wl->rng.name = wl->rng_name;
2366 wl->rng.data_read = b43legacy_rng_read;
2367 wl->rng.priv = (unsigned long)wl;
2368 wl->rng_initialized = 1;
2369 err = hwrng_register(&wl->rng);
2371 wl->rng_initialized = 0;
2372 b43legacyerr(wl, "Failed to register the random "
2373 "number generator (%d)\n", err);
2379 static int b43legacy_tx(struct ieee80211_hw *hw,
2380 struct sk_buff *skb,
2381 struct ieee80211_tx_control *ctl)
2383 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2384 struct b43legacy_wldev *dev = wl->current_dev;
2386 unsigned long flags;
2390 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2392 /* DMA-TX is done without a global lock. */
2393 if (b43legacy_using_pio(dev)) {
2394 spin_lock_irqsave(&wl->irq_lock, flags);
2395 err = b43legacy_pio_tx(dev, skb, ctl);
2396 spin_unlock_irqrestore(&wl->irq_lock, flags);
2398 err = b43legacy_dma_tx(dev, skb, ctl);
2401 return NETDEV_TX_BUSY;
2402 return NETDEV_TX_OK;
2405 static int b43legacy_conf_tx(struct ieee80211_hw *hw,
2407 const struct ieee80211_tx_queue_params *params)
2412 static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
2413 struct ieee80211_tx_queue_stats *stats)
2415 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2416 struct b43legacy_wldev *dev = wl->current_dev;
2417 unsigned long flags;
2422 spin_lock_irqsave(&wl->irq_lock, flags);
2423 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2424 if (b43legacy_using_pio(dev))
2425 b43legacy_pio_get_tx_stats(dev, stats);
2427 b43legacy_dma_get_tx_stats(dev, stats);
2430 spin_unlock_irqrestore(&wl->irq_lock, flags);
2435 static int b43legacy_get_stats(struct ieee80211_hw *hw,
2436 struct ieee80211_low_level_stats *stats)
2438 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2439 unsigned long flags;
2441 spin_lock_irqsave(&wl->irq_lock, flags);
2442 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2443 spin_unlock_irqrestore(&wl->irq_lock, flags);
2448 static const char *phymode_to_string(unsigned int phymode)
2451 case B43legacy_PHYMODE_B:
2453 case B43legacy_PHYMODE_G:
2456 B43legacy_BUG_ON(1);
2461 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2462 unsigned int phymode,
2463 struct b43legacy_wldev **dev,
2466 struct b43legacy_wldev *d;
2468 list_for_each_entry(d, &wl->devlist, list) {
2469 if (d->phy.possible_phymodes & phymode) {
2470 /* Ok, this device supports the PHY-mode.
2471 * Set the gmode bit. */
2482 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2484 struct ssb_device *sdev = dev->dev;
2487 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2488 tmslow &= ~B43legacy_TMSLOW_GMODE;
2489 tmslow |= B43legacy_TMSLOW_PHYRESET;
2490 tmslow |= SSB_TMSLOW_FGC;
2491 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2494 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2495 tmslow &= ~SSB_TMSLOW_FGC;
2496 tmslow |= B43legacy_TMSLOW_PHYRESET;
2497 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2501 /* Expects wl->mutex locked */
2502 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2503 unsigned int new_mode)
2505 struct b43legacy_wldev *up_dev;
2506 struct b43legacy_wldev *down_dev;
2511 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2513 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2514 phymode_to_string(new_mode));
2517 if ((up_dev == wl->current_dev) &&
2518 (!!wl->current_dev->phy.gmode == !!gmode))
2519 /* This device is already running. */
2521 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2522 phymode_to_string(new_mode));
2523 down_dev = wl->current_dev;
2525 prev_status = b43legacy_status(down_dev);
2526 /* Shutdown the currently running core. */
2527 if (prev_status >= B43legacy_STAT_STARTED)
2528 b43legacy_wireless_core_stop(down_dev);
2529 if (prev_status >= B43legacy_STAT_INITIALIZED)
2530 b43legacy_wireless_core_exit(down_dev);
2532 if (down_dev != up_dev)
2533 /* We switch to a different core, so we put PHY into
2534 * RESET on the old core. */
2535 b43legacy_put_phy_into_reset(down_dev);
2537 /* Now start the new core. */
2538 up_dev->phy.gmode = gmode;
2539 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2540 err = b43legacy_wireless_core_init(up_dev);
2542 b43legacyerr(wl, "Fatal: Could not initialize device"
2543 " for newly selected %s-PHY mode\n",
2544 phymode_to_string(new_mode));
2548 if (prev_status >= B43legacy_STAT_STARTED) {
2549 err = b43legacy_wireless_core_start(up_dev);
2551 b43legacyerr(wl, "Fatal: Coult not start device for "
2552 "newly selected %s-PHY mode\n",
2553 phymode_to_string(new_mode));
2554 b43legacy_wireless_core_exit(up_dev);
2558 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2560 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2562 wl->current_dev = up_dev;
2566 /* Whoops, failed to init the new core. No core is operating now. */
2567 wl->current_dev = NULL;
2571 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2574 case 0: /* default/diversity */
2575 return B43legacy_ANTENNA_DEFAULT;
2576 case 1: /* Antenna 0 */
2577 return B43legacy_ANTENNA0;
2578 case 2: /* Antenna 1 */
2579 return B43legacy_ANTENNA1;
2581 return B43legacy_ANTENNA_DEFAULT;
2585 static int b43legacy_dev_config(struct ieee80211_hw *hw,
2586 struct ieee80211_conf *conf)
2588 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2589 struct b43legacy_wldev *dev;
2590 struct b43legacy_phy *phy;
2591 unsigned long flags;
2592 unsigned int new_phymode = 0xFFFF;
2598 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2599 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2601 mutex_lock(&wl->mutex);
2603 /* Switch the PHY mode (if necessary). */
2604 switch (conf->phymode) {
2605 case MODE_IEEE80211B:
2606 new_phymode = B43legacy_PHYMODE_B;
2608 case MODE_IEEE80211G:
2609 new_phymode = B43legacy_PHYMODE_G;
2612 B43legacy_WARN_ON(1);
2614 err = b43legacy_switch_phymode(wl, new_phymode);
2616 goto out_unlock_mutex;
2617 dev = wl->current_dev;
2620 /* Disable IRQs while reconfiguring the device.
2621 * This makes it possible to drop the spinlock throughout
2622 * the reconfiguration process. */
2623 spin_lock_irqsave(&wl->irq_lock, flags);
2624 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2625 spin_unlock_irqrestore(&wl->irq_lock, flags);
2626 goto out_unlock_mutex;
2628 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2629 spin_unlock_irqrestore(&wl->irq_lock, flags);
2630 b43legacy_synchronize_irq(dev);
2632 /* Switch to the requested channel.
2633 * The firmware takes care of races with the TX handler. */
2634 if (conf->channel_val != phy->channel)
2635 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2637 /* Enable/Disable ShortSlot timing. */
2638 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2639 != dev->short_slot) {
2640 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2641 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2642 b43legacy_short_slot_timing_enable(dev);
2644 b43legacy_short_slot_timing_disable(dev);
2647 /* Adjust the desired TX power level. */
2648 if (conf->power_level != 0) {
2649 if (conf->power_level != phy->power_level) {
2650 phy->power_level = conf->power_level;
2651 b43legacy_phy_xmitpower(dev);
2655 /* Antennas for RX and management frame TX. */
2656 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2658 /* Update templates for AP mode. */
2659 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2660 b43legacy_set_beacon_int(dev, conf->beacon_int);
2663 if (!!conf->radio_enabled != phy->radio_on) {
2664 if (conf->radio_enabled) {
2665 b43legacy_radio_turn_on(dev);
2666 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2667 if (!dev->radio_hw_enable)
2668 b43legacyinfo(dev->wl, "The hardware RF-kill"
2669 " button still turns the radio"
2670 " physically off. Press the"
2671 " button to turn it on.\n");
2673 b43legacy_radio_turn_off(dev);
2674 b43legacyinfo(dev->wl, "Radio turned off by"
2679 spin_lock_irqsave(&wl->irq_lock, flags);
2680 b43legacy_interrupt_enable(dev, savedirqs);
2682 spin_unlock_irqrestore(&wl->irq_lock, flags);
2684 mutex_unlock(&wl->mutex);
2689 static int b43legacy_dev_set_key(struct ieee80211_hw *hw,
2691 const u8 *local_addr, const u8 *addr,
2692 struct ieee80211_key_conf *key)
2694 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2695 struct b43legacy_wldev *dev = wl->current_dev;
2696 unsigned long flags;
2697 int err = -EOPNOTSUPP;
2698 DECLARE_MAC_BUF(mac);
2702 mutex_lock(&wl->mutex);
2703 spin_lock_irqsave(&wl->irq_lock, flags);
2705 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
2708 spin_unlock_irqrestore(&wl->irq_lock, flags);
2709 mutex_unlock(&wl->mutex);
2710 b43legacydbg(wl, "Using software based encryption for "
2711 "mac: %s\n", print_mac(mac, addr));
2715 static void b43legacy_set_multicast_list(struct ieee80211_hw *hw,
2716 unsigned short netflags,
2719 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2720 struct b43legacy_wldev *dev = wl->current_dev;
2721 unsigned long flags;
2725 spin_lock_irqsave(&wl->irq_lock, flags);
2726 if (wl->promisc != !!(netflags & IFF_PROMISC)) {
2727 wl->promisc = !!(netflags & IFF_PROMISC);
2728 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2729 b43legacy_adjust_opmode(dev);
2731 spin_unlock_irqrestore(&wl->irq_lock, flags);
2734 static int b43legacy_config_interface(struct ieee80211_hw *hw,
2736 struct ieee80211_if_conf *conf)
2738 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2739 struct b43legacy_wldev *dev = wl->current_dev;
2740 unsigned long flags;
2744 mutex_lock(&wl->mutex);
2745 spin_lock_irqsave(&wl->irq_lock, flags);
2746 if (conf->type != IEEE80211_IF_TYPE_MNTR) {
2747 B43legacy_WARN_ON(wl->if_id != if_id);
2748 wl->bssid = conf->bssid;
2749 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2750 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2751 B43legacy_WARN_ON(conf->type !=
2752 IEEE80211_IF_TYPE_AP);
2753 b43legacy_set_ssid(dev, conf->ssid,
2756 b43legacy_refresh_templates(dev,
2759 b43legacy_write_mac_bssid_templates(dev);
2762 spin_unlock_irqrestore(&wl->irq_lock, flags);
2763 mutex_unlock(&wl->mutex);
2768 /* Locking: wl->mutex */
2769 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2771 struct b43legacy_wl *wl = dev->wl;
2772 unsigned long flags;
2774 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2776 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2778 mutex_unlock(&wl->mutex);
2779 /* Must unlock as it would otherwise deadlock. No races here.
2780 * Cancel the possibly running self-rearming periodic work. */
2781 cancel_delayed_work_sync(&dev->periodic_work);
2782 mutex_lock(&wl->mutex);
2784 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2786 /* Disable and sync interrupts. */
2787 spin_lock_irqsave(&wl->irq_lock, flags);
2788 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2790 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2791 spin_unlock_irqrestore(&wl->irq_lock, flags);
2792 b43legacy_synchronize_irq(dev);
2794 b43legacy_mac_suspend(dev);
2795 free_irq(dev->dev->irq, dev);
2796 b43legacydbg(wl, "Wireless interface stopped\n");
2799 /* Locking: wl->mutex */
2800 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2804 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2806 drain_txstatus_queue(dev);
2807 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2808 IRQF_SHARED, KBUILD_MODNAME, dev);
2810 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2814 /* We are ready to run. */
2815 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2817 /* Start data flow (TX/RX) */
2818 b43legacy_mac_enable(dev);
2819 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2820 ieee80211_start_queues(dev->wl->hw);
2822 /* Start maintenance work */
2823 b43legacy_periodic_tasks_setup(dev);
2825 b43legacydbg(dev->wl, "Wireless interface started\n");
2830 /* Get PHY and RADIO versioning numbers */
2831 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2833 struct b43legacy_phy *phy = &dev->phy;
2841 int unsupported = 0;
2843 /* Get PHY versioning */
2844 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2845 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2846 >> B43legacy_PHYVER_ANALOG_SHIFT;
2847 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2848 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2850 case B43legacy_PHYTYPE_B:
2851 if (phy_rev != 2 && phy_rev != 4
2852 && phy_rev != 6 && phy_rev != 7)
2855 case B43legacy_PHYTYPE_G:
2863 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2864 "(Analog %u, Type %u, Revision %u)\n",
2865 analog_type, phy_type, phy_rev);
2868 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2869 analog_type, phy_type, phy_rev);
2872 /* Get RADIO versioning */
2873 if (dev->dev->bus->chip_id == 0x4317) {
2874 if (dev->dev->bus->chip_rev == 0)
2876 else if (dev->dev->bus->chip_rev == 1)
2881 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2882 B43legacy_RADIOCTL_ID);
2883 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2885 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2886 B43legacy_RADIOCTL_ID);
2887 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2889 radio_manuf = (tmp & 0x00000FFF);
2890 radio_ver = (tmp & 0x0FFFF000) >> 12;
2891 radio_rev = (tmp & 0xF0000000) >> 28;
2893 case B43legacy_PHYTYPE_B:
2894 if ((radio_ver & 0xFFF0) != 0x2050)
2897 case B43legacy_PHYTYPE_G:
2898 if (radio_ver != 0x2050)
2902 B43legacy_BUG_ON(1);
2905 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2906 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2907 radio_manuf, radio_ver, radio_rev);
2910 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2911 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2914 phy->radio_manuf = radio_manuf;
2915 phy->radio_ver = radio_ver;
2916 phy->radio_rev = radio_rev;
2918 phy->analog = analog_type;
2919 phy->type = phy_type;
2925 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2926 struct b43legacy_phy *phy)
2928 struct b43legacy_lopair *lo;
2931 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2932 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2937 phy->savedpctlreg = 0xFFFF;
2938 phy->aci_enable = 0;
2939 phy->aci_wlan_automatic = 0;
2940 phy->aci_hw_rssi = 0;
2942 lo = phy->_lo_pairs;
2944 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2945 B43legacy_LO_COUNT);
2946 phy->max_lb_gain = 0;
2947 phy->trsw_rx_gain = 0;
2949 /* Set default attenuation values. */
2950 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2951 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2952 phy->txctl1 = b43legacy_default_txctl1(dev);
2953 phy->txpwr_offset = 0;
2956 phy->nrssislope = 0;
2957 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2958 phy->nrssi[i] = -1000;
2959 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2960 phy->nrssi_lt[i] = i;
2962 phy->lofcal = 0xFFFF;
2963 phy->initval = 0xFFFF;
2965 spin_lock_init(&phy->lock);
2966 phy->interfmode = B43legacy_INTERFMODE_NONE;
2967 phy->channel = 0xFF;
2970 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2973 dev->reg124_set_0x4 = 0;
2976 memset(&dev->stats, 0, sizeof(dev->stats));
2978 setup_struct_phy_for_init(dev, &dev->phy);
2980 /* IRQ related flags */
2981 dev->irq_reason = 0;
2982 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2983 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2985 dev->mac_suspended = 1;
2987 /* Noise calculation context */
2988 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2991 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2993 #ifdef CONFIG_SSB_DRIVER_PCICORE
2994 struct ssb_bus *bus = dev->dev->bus;
2997 if (bus->pcicore.dev &&
2998 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2999 bus->pcicore.dev->id.revision <= 5) {
3000 /* IMCFGLO timeouts workaround. */
3001 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
3002 tmp &= ~SSB_IMCFGLO_REQTO;
3003 tmp &= ~SSB_IMCFGLO_SERTO;
3004 switch (bus->bustype) {
3005 case SSB_BUSTYPE_PCI:
3006 case SSB_BUSTYPE_PCMCIA:
3009 case SSB_BUSTYPE_SSB:
3013 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
3015 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3018 /* Shutdown a wireless core */
3019 /* Locking: wl->mutex */
3020 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3022 struct b43legacy_wl *wl = dev->wl;
3023 struct b43legacy_phy *phy = &dev->phy;
3025 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3026 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3028 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3030 mutex_unlock(&wl->mutex);
3031 /* Must unlock as it would otherwise deadlock. No races here.
3032 * Cancel possibly pending workqueues. */
3033 cancel_work_sync(&dev->restart_work);
3034 mutex_lock(&wl->mutex);
3036 b43legacy_rng_exit(dev->wl);
3037 b43legacy_pio_free(dev);
3038 b43legacy_dma_free(dev);
3039 b43legacy_chip_exit(dev);
3040 b43legacy_radio_turn_off(dev);
3041 b43legacy_switch_analog(dev, 0);
3042 if (phy->dyn_tssi_tbl)
3043 kfree(phy->tssi2dbm);
3044 kfree(phy->lo_control);
3045 phy->lo_control = NULL;
3046 ssb_device_disable(dev->dev, 0);
3047 ssb_bus_may_powerdown(dev->dev->bus);
3050 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3052 struct b43legacy_phy *phy = &dev->phy;
3055 /* Set default attenuation values. */
3056 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3057 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3058 phy->txctl1 = b43legacy_default_txctl1(dev);
3059 phy->txctl2 = 0xFFFF;
3060 phy->txpwr_offset = 0;
3063 phy->nrssislope = 0;
3064 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3065 phy->nrssi[i] = -1000;
3066 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3067 phy->nrssi_lt[i] = i;
3069 phy->lofcal = 0xFFFF;
3070 phy->initval = 0xFFFF;
3072 phy->aci_enable = 0;
3073 phy->aci_wlan_automatic = 0;
3074 phy->aci_hw_rssi = 0;
3076 phy->antenna_diversity = 0xFFFF;
3077 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3078 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3081 phy->calibrated = 0;
3085 memset(phy->_lo_pairs, 0,
3086 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3087 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3090 /* Initialize a wireless core */
3091 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3093 struct b43legacy_wl *wl = dev->wl;
3094 struct ssb_bus *bus = dev->dev->bus;
3095 struct b43legacy_phy *phy = &dev->phy;
3096 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3101 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3103 err = ssb_bus_powerup(bus, 0);
3106 if (!ssb_device_is_enabled(dev->dev)) {
3107 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3108 b43legacy_wireless_core_reset(dev, tmp);
3111 if ((phy->type == B43legacy_PHYTYPE_B) ||
3112 (phy->type == B43legacy_PHYTYPE_G)) {
3113 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3114 * B43legacy_LO_COUNT,
3116 if (!phy->_lo_pairs)
3119 setup_struct_wldev_for_init(dev);
3121 err = b43legacy_phy_init_tssi2dbm_table(dev);
3123 goto err_kfree_lo_control;
3125 /* Enable IRQ routing to this device. */
3126 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3128 b43legacy_imcfglo_timeouts_workaround(dev);
3129 prepare_phy_data_for_init(dev);
3130 b43legacy_phy_calibrate(dev);
3131 err = b43legacy_chip_init(dev);
3133 goto err_kfree_tssitbl;
3134 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3135 B43legacy_SHM_SH_WLCOREREV,
3136 dev->dev->id.revision);
3137 hf = b43legacy_hf_read(dev);
3138 if (phy->type == B43legacy_PHYTYPE_G) {
3139 hf |= B43legacy_HF_SYMW;
3141 hf |= B43legacy_HF_GDCW;
3142 if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
3143 hf |= B43legacy_HF_OFDMPABOOST;
3144 } else if (phy->type == B43legacy_PHYTYPE_B) {
3145 hf |= B43legacy_HF_SYMW;
3146 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3147 hf &= ~B43legacy_HF_GDCW;
3149 b43legacy_hf_write(dev, hf);
3151 /* Short/Long Retry Limit.
3152 * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3153 * the chip-internal counter.
3155 tmp = limit_value(modparam_short_retry, 0, 0xF);
3156 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3158 tmp = limit_value(modparam_long_retry, 0, 0xF);
3159 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3162 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3164 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3167 /* Disable sending probe responses from firmware.
3168 * Setting the MaxTime to one usec will always trigger
3169 * a timeout, so we never send any probe resp.
3170 * A timeout of zero is infinite. */
3171 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3172 B43legacy_SHM_SH_PRMAXTIME, 1);
3174 b43legacy_rate_memory_init(dev);
3176 /* Minimum Contention Window */
3177 if (phy->type == B43legacy_PHYTYPE_B)
3178 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3181 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3183 /* Maximum Contention Window */
3184 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3188 if (b43legacy_using_pio(dev))
3189 err = b43legacy_pio_init(dev);
3191 err = b43legacy_dma_init(dev);
3193 b43legacy_qos_init(dev);
3195 } while (err == -EAGAIN);
3199 b43legacy_write16(dev, 0x0612, 0x0050);
3200 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3201 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3203 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3205 b43legacy_upload_card_macaddress(dev, NULL);
3206 b43legacy_security_init(dev);
3207 b43legacy_rng_init(wl);
3209 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3215 b43legacy_chip_exit(dev);
3217 if (phy->dyn_tssi_tbl)
3218 kfree(phy->tssi2dbm);
3219 err_kfree_lo_control:
3220 kfree(phy->lo_control);
3221 phy->lo_control = NULL;
3222 ssb_bus_may_powerdown(bus);
3223 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3227 static int b43legacy_add_interface(struct ieee80211_hw *hw,
3228 struct ieee80211_if_init_conf *conf)
3230 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3231 struct b43legacy_wldev *dev;
3232 unsigned long flags;
3233 int err = -EOPNOTSUPP;
3236 mutex_lock(&wl->mutex);
3237 if ((conf->type != IEEE80211_IF_TYPE_MNTR) &&
3239 goto out_mutex_unlock;
3241 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3243 dev = wl->current_dev;
3244 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3245 err = b43legacy_wireless_core_init(dev);
3247 goto out_mutex_unlock;
3250 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3251 err = b43legacy_wireless_core_start(dev);
3254 b43legacy_wireless_core_exit(dev);
3255 goto out_mutex_unlock;
3259 spin_lock_irqsave(&wl->irq_lock, flags);
3260 switch (conf->type) {
3261 case IEEE80211_IF_TYPE_MNTR:
3266 wl->if_id = conf->if_id;
3267 wl->if_type = conf->type;
3268 b43legacy_upload_card_macaddress(dev, conf->mac_addr);
3270 b43legacy_adjust_opmode(dev);
3271 spin_unlock_irqrestore(&wl->irq_lock, flags);
3275 mutex_unlock(&wl->mutex);
3280 static void b43legacy_remove_interface(struct ieee80211_hw *hw,
3281 struct ieee80211_if_init_conf *conf)
3283 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3284 struct b43legacy_wldev *dev;
3285 unsigned long flags;
3287 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3289 mutex_lock(&wl->mutex);
3290 if (conf->type == IEEE80211_IF_TYPE_MNTR) {
3292 B43legacy_WARN_ON(wl->monitor < 0);
3294 B43legacy_WARN_ON(!wl->operating);
3298 dev = wl->current_dev;
3299 if (!wl->operating && wl->monitor == 0) {
3300 /* No interface left. */
3301 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3302 b43legacy_wireless_core_stop(dev);
3303 b43legacy_wireless_core_exit(dev);
3305 /* Just monitor interfaces left. */
3306 spin_lock_irqsave(&wl->irq_lock, flags);
3307 b43legacy_adjust_opmode(dev);
3309 b43legacy_upload_card_macaddress(dev, NULL);
3310 spin_unlock_irqrestore(&wl->irq_lock, flags);
3312 mutex_unlock(&wl->mutex);
3316 static const struct ieee80211_ops b43legacy_hw_ops = {
3318 .conf_tx = b43legacy_conf_tx,
3319 .add_interface = b43legacy_add_interface,
3320 .remove_interface = b43legacy_remove_interface,
3321 .config = b43legacy_dev_config,
3322 .config_interface = b43legacy_config_interface,
3323 .set_key = b43legacy_dev_set_key,
3324 .set_multicast_list = b43legacy_set_multicast_list,
3325 .get_stats = b43legacy_get_stats,
3326 .get_tx_stats = b43legacy_get_tx_stats,
3329 /* Hard-reset the chip. Do not call this directly.
3330 * Use b43legacy_controller_restart()
3332 static void b43legacy_chip_reset(struct work_struct *work)
3334 struct b43legacy_wldev *dev =
3335 container_of(work, struct b43legacy_wldev, restart_work);
3336 struct b43legacy_wl *wl = dev->wl;
3340 mutex_lock(&wl->mutex);
3342 prev_status = b43legacy_status(dev);
3343 /* Bring the device down... */
3344 if (prev_status >= B43legacy_STAT_STARTED)
3345 b43legacy_wireless_core_stop(dev);
3346 if (prev_status >= B43legacy_STAT_INITIALIZED)
3347 b43legacy_wireless_core_exit(dev);
3349 /* ...and up again. */
3350 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3351 err = b43legacy_wireless_core_init(dev);
3355 if (prev_status >= B43legacy_STAT_STARTED) {
3356 err = b43legacy_wireless_core_start(dev);
3358 b43legacy_wireless_core_exit(dev);
3363 mutex_unlock(&wl->mutex);
3365 b43legacyerr(wl, "Controller restart FAILED\n");
3367 b43legacyinfo(wl, "Controller restarted\n");
3370 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3374 struct ieee80211_hw *hw = dev->wl->hw;
3375 struct ieee80211_hw_mode *mode;
3376 struct b43legacy_phy *phy = &dev->phy;
3380 phy->possible_phymodes = 0;
3383 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3384 mode = &phy->hwmodes[cnt];
3386 mode->mode = MODE_IEEE80211B;
3387 mode->num_channels = b43legacy_bg_chantable_size;
3388 mode->channels = b43legacy_bg_chantable;
3389 mode->num_rates = b43legacy_b_ratetable_size;
3390 mode->rates = b43legacy_b_ratetable;
3391 err = ieee80211_register_hwmode(hw, mode);
3395 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3400 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3401 mode = &phy->hwmodes[cnt];
3403 mode->mode = MODE_IEEE80211G;
3404 mode->num_channels = b43legacy_bg_chantable_size;
3405 mode->channels = b43legacy_bg_chantable;
3406 mode->num_rates = b43legacy_g_ratetable_size;
3407 mode->rates = b43legacy_g_ratetable;
3408 err = ieee80211_register_hwmode(hw, mode);
3412 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3422 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3424 /* We release firmware that late to not be required to re-request
3425 * is all the time when we reinit the core. */
3426 b43legacy_release_firmware(dev);
3429 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3431 struct b43legacy_wl *wl = dev->wl;
3432 struct ssb_bus *bus = dev->dev->bus;
3433 struct pci_dev *pdev = bus->host_pci;
3439 /* Do NOT do any device initialization here.
3440 * Do it in wireless_core_init() instead.
3441 * This function is for gathering basic information about the HW, only.
3442 * Also some structs may be set up here. But most likely you want to
3443 * have that in core_init(), too.
3446 err = ssb_bus_powerup(bus, 0);
3448 b43legacyerr(wl, "Bus powerup failed\n");
3451 /* Get the PHY type. */
3452 if (dev->dev->id.revision >= 5) {
3455 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3456 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3459 } else if (dev->dev->id.revision == 4)
3464 /* Initialize LEDs structs. */
3465 err = b43legacy_leds_init(dev);
3469 dev->phy.gmode = (have_gphy || have_bphy);
3470 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3471 b43legacy_wireless_core_reset(dev, tmp);
3473 err = b43legacy_phy_versioning(dev);
3476 /* Check if this device supports multiband. */
3478 (pdev->device != 0x4312 &&
3479 pdev->device != 0x4319 &&
3480 pdev->device != 0x4324)) {
3481 /* No multiband support. */
3484 switch (dev->phy.type) {
3485 case B43legacy_PHYTYPE_B:
3488 case B43legacy_PHYTYPE_G:
3492 B43legacy_BUG_ON(1);
3495 dev->phy.gmode = (have_gphy || have_bphy);
3496 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3497 b43legacy_wireless_core_reset(dev, tmp);
3499 err = b43legacy_validate_chipaccess(dev);
3502 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3506 /* Now set some default "current_dev" */
3507 if (!wl->current_dev)
3508 wl->current_dev = dev;
3509 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3511 b43legacy_radio_turn_off(dev);
3512 b43legacy_switch_analog(dev, 0);
3513 ssb_device_disable(dev->dev, 0);
3514 ssb_bus_may_powerdown(bus);
3520 b43legacy_leds_exit(dev);
3522 ssb_bus_may_powerdown(bus);
3526 static void b43legacy_one_core_detach(struct ssb_device *dev)
3528 struct b43legacy_wldev *wldev;
3529 struct b43legacy_wl *wl;
3531 wldev = ssb_get_drvdata(dev);
3533 cancel_work_sync(&wldev->restart_work);
3534 b43legacy_debugfs_remove_device(wldev);
3535 b43legacy_wireless_core_detach(wldev);
3536 list_del(&wldev->list);
3538 ssb_set_drvdata(dev, NULL);
3542 static int b43legacy_one_core_attach(struct ssb_device *dev,
3543 struct b43legacy_wl *wl)
3545 struct b43legacy_wldev *wldev;
3546 struct pci_dev *pdev;
3549 if (!list_empty(&wl->devlist)) {
3550 /* We are not the first core on this chip. */
3551 pdev = dev->bus->host_pci;
3552 /* Only special chips support more than one wireless
3553 * core, although some of the other chips have more than
3554 * one wireless core as well. Check for this and
3558 ((pdev->device != 0x4321) &&
3559 (pdev->device != 0x4313) &&
3560 (pdev->device != 0x431A))) {
3561 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3566 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3572 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3573 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3574 tasklet_init(&wldev->isr_tasklet,
3575 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3576 (unsigned long)wldev);
3578 wldev->__using_pio = 1;
3579 INIT_LIST_HEAD(&wldev->list);
3581 err = b43legacy_wireless_core_attach(wldev);
3583 goto err_kfree_wldev;
3585 list_add(&wldev->list, &wl->devlist);
3587 ssb_set_drvdata(dev, wldev);
3588 b43legacy_debugfs_add_device(wldev);
3597 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3599 /* boardflags workarounds */
3600 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3601 bus->boardinfo.type == 0x4E &&
3602 bus->boardinfo.rev > 0x40)
3603 bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
3605 /* Convert Antennagain values to Q5.2 */
3606 if (bus->sprom.r1.antenna_gain_bg == 0xFF)
3607 bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3608 bus->sprom.r1.antenna_gain_bg <<= 2;
3611 static void b43legacy_wireless_exit(struct ssb_device *dev,
3612 struct b43legacy_wl *wl)
3614 struct ieee80211_hw *hw = wl->hw;
3616 ssb_set_devtypedata(dev, NULL);
3617 ieee80211_free_hw(hw);
3620 static int b43legacy_wireless_init(struct ssb_device *dev)
3622 struct ssb_sprom *sprom = &dev->bus->sprom;
3623 struct ieee80211_hw *hw;
3624 struct b43legacy_wl *wl;
3627 b43legacy_sprom_fixup(dev->bus);
3629 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3631 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3636 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3637 IEEE80211_HW_RX_INCLUDES_FCS;
3638 hw->max_signal = 100;
3639 hw->max_rssi = -110;
3640 hw->max_noise = -110;
3641 hw->queues = 1; /* FIXME: hardware has more queues */
3642 SET_IEEE80211_DEV(hw, dev->dev);
3643 if (is_valid_ether_addr(sprom->r1.et1mac))
3644 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
3646 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
3648 /* Get and initialize struct b43legacy_wl */
3649 wl = hw_to_b43legacy_wl(hw);
3650 memset(wl, 0, sizeof(*wl));
3652 spin_lock_init(&wl->irq_lock);
3653 spin_lock_init(&wl->leds_lock);
3654 mutex_init(&wl->mutex);
3655 INIT_LIST_HEAD(&wl->devlist);
3657 ssb_set_devtypedata(dev, wl);
3658 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3664 static int b43legacy_probe(struct ssb_device *dev,
3665 const struct ssb_device_id *id)
3667 struct b43legacy_wl *wl;
3671 wl = ssb_get_devtypedata(dev);
3673 /* Probing the first core - setup common struct b43legacy_wl */
3675 err = b43legacy_wireless_init(dev);
3678 wl = ssb_get_devtypedata(dev);
3679 B43legacy_WARN_ON(!wl);
3681 err = b43legacy_one_core_attach(dev, wl);
3683 goto err_wireless_exit;
3686 err = ieee80211_register_hw(wl->hw);
3688 goto err_one_core_detach;
3694 err_one_core_detach:
3695 b43legacy_one_core_detach(dev);
3698 b43legacy_wireless_exit(dev, wl);
3702 static void b43legacy_remove(struct ssb_device *dev)
3704 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3705 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3707 B43legacy_WARN_ON(!wl);
3708 if (wl->current_dev == wldev)
3709 ieee80211_unregister_hw(wl->hw);
3711 b43legacy_one_core_detach(dev);
3713 if (list_empty(&wl->devlist))
3714 /* Last core on the chip unregistered.
3715 * We can destroy common struct b43legacy_wl.
3717 b43legacy_wireless_exit(dev, wl);
3720 /* Perform a hardware reset. This can be called from any context. */
3721 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3724 /* Must avoid requeueing, if we are in shutdown. */
3725 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3727 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3728 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3733 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3735 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3736 struct b43legacy_wl *wl = wldev->wl;
3738 b43legacydbg(wl, "Suspending...\n");
3740 mutex_lock(&wl->mutex);
3741 wldev->suspend_init_status = b43legacy_status(wldev);
3742 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3743 b43legacy_wireless_core_stop(wldev);
3744 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3745 b43legacy_wireless_core_exit(wldev);
3746 mutex_unlock(&wl->mutex);
3748 b43legacydbg(wl, "Device suspended.\n");
3753 static int b43legacy_resume(struct ssb_device *dev)
3755 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3756 struct b43legacy_wl *wl = wldev->wl;
3759 b43legacydbg(wl, "Resuming...\n");
3761 mutex_lock(&wl->mutex);
3762 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3763 err = b43legacy_wireless_core_init(wldev);
3765 b43legacyerr(wl, "Resume failed at core init\n");
3769 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3770 err = b43legacy_wireless_core_start(wldev);
3772 b43legacy_wireless_core_exit(wldev);
3773 b43legacyerr(wl, "Resume failed at core start\n");
3777 mutex_unlock(&wl->mutex);
3779 b43legacydbg(wl, "Device resumed.\n");
3784 #else /* CONFIG_PM */
3785 # define b43legacy_suspend NULL
3786 # define b43legacy_resume NULL
3787 #endif /* CONFIG_PM */
3789 static struct ssb_driver b43legacy_ssb_driver = {
3790 .name = KBUILD_MODNAME,
3791 .id_table = b43legacy_ssb_tbl,
3792 .probe = b43legacy_probe,
3793 .remove = b43legacy_remove,
3794 .suspend = b43legacy_suspend,
3795 .resume = b43legacy_resume,
3798 static int __init b43legacy_init(void)
3802 b43legacy_debugfs_init();
3804 err = ssb_driver_register(&b43legacy_ssb_driver);
3811 b43legacy_debugfs_exit();
3815 static void __exit b43legacy_exit(void)
3817 ssb_driver_unregister(&b43legacy_ssb_driver);
3818 b43legacy_debugfs_exit();
3821 module_init(b43legacy_init)
3822 module_exit(b43legacy_exit)