1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
33 #define EFX_MAX_MTU (9 * 1024)
35 /* RX slow fill workqueue. If memory allocation fails in the fast path,
36 * a work item is pushed onto this work queue to retry the allocation later,
37 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
38 * workqueue, there is nothing to be gained in making it per NIC
40 static struct workqueue_struct *refill_workqueue;
42 /**************************************************************************
46 *************************************************************************/
49 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
51 * This sets the default for new devices. It can be controlled later
54 static int lro = true;
55 module_param(lro, int, 0644);
56 MODULE_PARM_DESC(lro, "Large receive offload acceleration");
59 * Use separate channels for TX and RX events
61 * Set this to 1 to use separate channels for TX and RX. It allows us to
62 * apply a higher level of interrupt moderation to TX events.
64 * This is forced to 0 for MSI interrupt mode as the interrupt vector
67 static unsigned int separate_tx_and_rx_channels = true;
69 /* This is the weight assigned to each of the (per-channel) virtual
72 static int napi_weight = 64;
74 /* This is the time (in jiffies) between invocations of the hardware
75 * monitor, which checks for known hardware bugs and resets the
76 * hardware and driver as necessary.
78 unsigned int efx_monitor_interval = 1 * HZ;
80 /* This controls whether or not the hardware monitor will trigger a
81 * reset when it detects an error condition.
83 static unsigned int monitor_reset = true;
85 /* This controls whether or not the driver will initialise devices
86 * with invalid MAC addresses stored in the EEPROM or flash. If true,
87 * such devices will be initialised with a random locally-generated
88 * MAC address. This allows for loading the sfc_mtd driver to
89 * reprogram the flash, even if the flash contents (including the MAC
90 * address) have previously been erased.
92 static unsigned int allow_bad_hwaddr;
94 /* Initial interrupt moderation settings. They can be modified after
95 * module load with ethtool.
97 * The default for RX should strike a balance between increasing the
98 * round-trip latency and reducing overhead.
100 static unsigned int rx_irq_mod_usec = 60;
102 /* Initial interrupt moderation settings. They can be modified after
103 * module load with ethtool.
105 * This default is chosen to ensure that a 10G link does not go idle
106 * while a TX queue is stopped after it has become full. A queue is
107 * restarted when it drops below half full. The time this takes (assuming
108 * worst case 3 descriptors per packet and 1024 descriptors) is
109 * 512 / 3 * 1.2 = 205 usec.
111 static unsigned int tx_irq_mod_usec = 150;
113 /* This is the first interrupt mode to try out of:
118 static unsigned int interrupt_mode;
120 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
121 * i.e. the number of CPUs among which we may distribute simultaneous
122 * interrupt handling.
124 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
125 * The default (0) means to assign an interrupt to each package (level II cache)
127 static unsigned int rss_cpus;
128 module_param(rss_cpus, uint, 0444);
129 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
131 /**************************************************************************
133 * Utility functions and prototypes
135 *************************************************************************/
136 static void efx_remove_channel(struct efx_channel *channel);
137 static void efx_remove_port(struct efx_nic *efx);
138 static void efx_fini_napi(struct efx_nic *efx);
139 static void efx_fini_channels(struct efx_nic *efx);
141 #define EFX_ASSERT_RESET_SERIALISED(efx) \
143 if ((efx->state == STATE_RUNNING) || \
144 (efx->state == STATE_RESETTING)) \
148 /**************************************************************************
150 * Event queue processing
152 *************************************************************************/
154 /* Process channel's event queue
156 * This function is responsible for processing the event queue of a
157 * single channel. The caller must guarantee that this function will
158 * never be concurrently called more than once on the same channel,
159 * though different channels may be being processed concurrently.
161 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
163 struct efx_nic *efx = channel->efx;
166 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
170 rx_packets = falcon_process_eventq(channel, rx_quota);
174 /* Deliver last RX packet. */
175 if (channel->rx_pkt) {
176 __efx_rx_packet(channel, channel->rx_pkt,
177 channel->rx_pkt_csummed);
178 channel->rx_pkt = NULL;
181 efx_flush_lro(channel);
182 efx_rx_strategy(channel);
184 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
189 /* Mark channel as finished processing
191 * Note that since we will not receive further interrupts for this
192 * channel before we finish processing and call the eventq_read_ack()
193 * method, there is no need to use the interrupt hold-off timers.
195 static inline void efx_channel_processed(struct efx_channel *channel)
197 /* The interrupt handler for this channel may set work_pending
198 * as soon as we acknowledge the events we've seen. Make sure
199 * it's cleared before then. */
200 channel->work_pending = false;
203 falcon_eventq_read_ack(channel);
208 * NAPI guarantees serialisation of polls of the same device, which
209 * provides the guarantee required by efx_process_channel().
211 static int efx_poll(struct napi_struct *napi, int budget)
213 struct efx_channel *channel =
214 container_of(napi, struct efx_channel, napi_str);
215 struct net_device *napi_dev = channel->napi_dev;
218 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
219 channel->channel, raw_smp_processor_id());
221 rx_packets = efx_process_channel(channel, budget);
223 if (rx_packets < budget) {
224 /* There is no race here; although napi_disable() will
225 * only wait for netif_rx_complete(), this isn't a problem
226 * since efx_channel_processed() will have no effect if
227 * interrupts have already been disabled.
229 netif_rx_complete(napi_dev, napi);
230 efx_channel_processed(channel);
236 /* Process the eventq of the specified channel immediately on this CPU
238 * Disable hardware generated interrupts, wait for any existing
239 * processing to finish, then directly poll (and ack ) the eventq.
240 * Finally reenable NAPI and interrupts.
242 * Since we are touching interrupts the caller should hold the suspend lock
244 void efx_process_channel_now(struct efx_channel *channel)
246 struct efx_nic *efx = channel->efx;
248 BUG_ON(!channel->used_flags);
249 BUG_ON(!channel->enabled);
251 /* Disable interrupts and wait for ISRs to complete */
252 falcon_disable_interrupts(efx);
254 synchronize_irq(efx->legacy_irq);
256 synchronize_irq(channel->irq);
258 /* Wait for any NAPI processing to complete */
259 napi_disable(&channel->napi_str);
261 /* Poll the channel */
262 efx_process_channel(channel, efx->type->evq_size);
264 /* Ack the eventq. This may cause an interrupt to be generated
265 * when they are reenabled */
266 efx_channel_processed(channel);
268 napi_enable(&channel->napi_str);
269 falcon_enable_interrupts(efx);
272 /* Create event queue
273 * Event queue memory allocations are done only once. If the channel
274 * is reset, the memory buffer will be reused; this guards against
275 * errors during channel reset and also simplifies interrupt handling.
277 static int efx_probe_eventq(struct efx_channel *channel)
279 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
281 return falcon_probe_eventq(channel);
284 /* Prepare channel's event queue */
285 static int efx_init_eventq(struct efx_channel *channel)
287 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
289 channel->eventq_read_ptr = 0;
291 return falcon_init_eventq(channel);
294 static void efx_fini_eventq(struct efx_channel *channel)
296 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
298 falcon_fini_eventq(channel);
301 static void efx_remove_eventq(struct efx_channel *channel)
303 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
305 falcon_remove_eventq(channel);
308 /**************************************************************************
312 *************************************************************************/
314 static int efx_probe_channel(struct efx_channel *channel)
316 struct efx_tx_queue *tx_queue;
317 struct efx_rx_queue *rx_queue;
320 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
322 rc = efx_probe_eventq(channel);
326 efx_for_each_channel_tx_queue(tx_queue, channel) {
327 rc = efx_probe_tx_queue(tx_queue);
332 efx_for_each_channel_rx_queue(rx_queue, channel) {
333 rc = efx_probe_rx_queue(rx_queue);
338 channel->n_rx_frm_trunc = 0;
343 efx_for_each_channel_rx_queue(rx_queue, channel)
344 efx_remove_rx_queue(rx_queue);
346 efx_for_each_channel_tx_queue(tx_queue, channel)
347 efx_remove_tx_queue(tx_queue);
353 /* Channels are shutdown and reinitialised whilst the NIC is running
354 * to propagate configuration changes (mtu, checksum offload), or
355 * to clear hardware error conditions
357 static int efx_init_channels(struct efx_nic *efx)
359 struct efx_tx_queue *tx_queue;
360 struct efx_rx_queue *rx_queue;
361 struct efx_channel *channel;
364 /* Calculate the rx buffer allocation parameters required to
365 * support the current MTU, including padding for header
366 * alignment and overruns.
368 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
369 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
370 efx->type->rx_buffer_padding);
371 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
373 /* Initialise the channels */
374 efx_for_each_channel(channel, efx) {
375 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
377 rc = efx_init_eventq(channel);
381 efx_for_each_channel_tx_queue(tx_queue, channel) {
382 rc = efx_init_tx_queue(tx_queue);
387 /* The rx buffer allocation strategy is MTU dependent */
388 efx_rx_strategy(channel);
390 efx_for_each_channel_rx_queue(rx_queue, channel) {
391 rc = efx_init_rx_queue(rx_queue);
396 WARN_ON(channel->rx_pkt != NULL);
397 efx_rx_strategy(channel);
403 EFX_ERR(efx, "failed to initialise channel %d\n",
404 channel ? channel->channel : -1);
405 efx_fini_channels(efx);
409 /* This enables event queue processing and packet transmission.
411 * Note that this function is not allowed to fail, since that would
412 * introduce too much complexity into the suspend/resume path.
414 static void efx_start_channel(struct efx_channel *channel)
416 struct efx_rx_queue *rx_queue;
418 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
420 if (!(channel->efx->net_dev->flags & IFF_UP))
421 netif_napi_add(channel->napi_dev, &channel->napi_str,
422 efx_poll, napi_weight);
424 /* The interrupt handler for this channel may set work_pending
425 * as soon as we enable it. Make sure it's cleared before
426 * then. Similarly, make sure it sees the enabled flag set. */
427 channel->work_pending = false;
428 channel->enabled = true;
431 napi_enable(&channel->napi_str);
433 /* Load up RX descriptors */
434 efx_for_each_channel_rx_queue(rx_queue, channel)
435 efx_fast_push_rx_descriptors(rx_queue);
438 /* This disables event queue processing and packet transmission.
439 * This function does not guarantee that all queue processing
440 * (e.g. RX refill) is complete.
442 static void efx_stop_channel(struct efx_channel *channel)
444 struct efx_rx_queue *rx_queue;
446 if (!channel->enabled)
449 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
451 channel->enabled = false;
452 napi_disable(&channel->napi_str);
454 /* Ensure that any worker threads have exited or will be no-ops */
455 efx_for_each_channel_rx_queue(rx_queue, channel) {
456 spin_lock_bh(&rx_queue->add_lock);
457 spin_unlock_bh(&rx_queue->add_lock);
461 static void efx_fini_channels(struct efx_nic *efx)
463 struct efx_channel *channel;
464 struct efx_tx_queue *tx_queue;
465 struct efx_rx_queue *rx_queue;
467 EFX_ASSERT_RESET_SERIALISED(efx);
468 BUG_ON(efx->port_enabled);
470 efx_for_each_channel(channel, efx) {
471 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
473 efx_for_each_channel_rx_queue(rx_queue, channel)
474 efx_fini_rx_queue(rx_queue);
475 efx_for_each_channel_tx_queue(tx_queue, channel)
476 efx_fini_tx_queue(tx_queue);
479 /* Do the event queues last so that we can handle flush events
480 * for all DMA queues. */
481 efx_for_each_channel(channel, efx) {
482 EFX_LOG(channel->efx, "shut down evq %d\n", channel->channel);
484 efx_fini_eventq(channel);
488 static void efx_remove_channel(struct efx_channel *channel)
490 struct efx_tx_queue *tx_queue;
491 struct efx_rx_queue *rx_queue;
493 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
495 efx_for_each_channel_rx_queue(rx_queue, channel)
496 efx_remove_rx_queue(rx_queue);
497 efx_for_each_channel_tx_queue(tx_queue, channel)
498 efx_remove_tx_queue(tx_queue);
499 efx_remove_eventq(channel);
501 channel->used_flags = 0;
504 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
506 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
509 /**************************************************************************
513 **************************************************************************/
515 /* This ensures that the kernel is kept informed (via
516 * netif_carrier_on/off) of the link status, and also maintains the
517 * link status's stop on the port's TX queue.
519 static void efx_link_status_changed(struct efx_nic *efx)
521 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
522 * that no events are triggered between unregister_netdev() and the
523 * driver unloading. A more general condition is that NETDEV_CHANGE
524 * can only be generated between NETDEV_UP and NETDEV_DOWN */
525 if (!netif_running(efx->net_dev))
528 if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
529 efx->n_link_state_changes++;
532 netif_carrier_on(efx->net_dev);
534 netif_carrier_off(efx->net_dev);
537 /* Status message for kernel log */
539 struct mii_if_info *gmii = &efx->mii;
541 /* NONE here means direct XAUI from the controller, with no
542 * MDIO-attached device we can query. */
543 if (efx->phy_type != PHY_TYPE_NONE) {
544 adv = gmii_advertised(gmii);
545 lpa = gmii_lpa(gmii);
547 lpa = GM_LPA_10000 | LPA_DUPLEX;
550 EFX_INFO(efx, "link up at %dMbps %s-duplex "
551 "(adv %04x lpa %04x) (MTU %d)%s\n",
552 (efx->link_options & GM_LPA_10000 ? 10000 :
553 (efx->link_options & GM_LPA_1000 ? 1000 :
554 (efx->link_options & GM_LPA_100 ? 100 :
556 (efx->link_options & GM_LPA_DUPLEX ?
560 (efx->promiscuous ? " [PROMISC]" : ""));
562 EFX_INFO(efx, "link down\n");
567 /* This call reinitialises the MAC to pick up new PHY settings. The
568 * caller must hold the mac_lock */
569 static void __efx_reconfigure_port(struct efx_nic *efx)
571 WARN_ON(!mutex_is_locked(&efx->mac_lock));
573 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
574 raw_smp_processor_id());
576 falcon_reconfigure_xmac(efx);
578 /* Inform kernel of loss/gain of carrier */
579 efx_link_status_changed(efx);
582 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
584 void efx_reconfigure_port(struct efx_nic *efx)
586 EFX_ASSERT_RESET_SERIALISED(efx);
588 mutex_lock(&efx->mac_lock);
589 __efx_reconfigure_port(efx);
590 mutex_unlock(&efx->mac_lock);
593 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
594 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
595 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
596 static void efx_reconfigure_work(struct work_struct *data)
598 struct efx_nic *efx = container_of(data, struct efx_nic,
601 mutex_lock(&efx->mac_lock);
602 if (efx->port_enabled)
603 __efx_reconfigure_port(efx);
604 mutex_unlock(&efx->mac_lock);
607 static int efx_probe_port(struct efx_nic *efx)
611 EFX_LOG(efx, "create port\n");
613 /* Connect up MAC/PHY operations table and read MAC address */
614 rc = falcon_probe_port(efx);
618 /* Sanity check MAC address */
619 if (is_valid_ether_addr(efx->mac_address)) {
620 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
622 DECLARE_MAC_BUF(mac);
624 EFX_ERR(efx, "invalid MAC address %s\n",
625 print_mac(mac, efx->mac_address));
626 if (!allow_bad_hwaddr) {
630 random_ether_addr(efx->net_dev->dev_addr);
631 EFX_INFO(efx, "using locally-generated MAC %s\n",
632 print_mac(mac, efx->net_dev->dev_addr));
638 efx_remove_port(efx);
642 static int efx_init_port(struct efx_nic *efx)
646 EFX_LOG(efx, "init port\n");
648 /* Initialise the MAC and PHY */
649 rc = falcon_init_xmac(efx);
653 efx->port_initialized = true;
655 /* Reconfigure port to program MAC registers */
656 falcon_reconfigure_xmac(efx);
661 /* Allow efx_reconfigure_port() to be scheduled, and close the window
662 * between efx_stop_port and efx_flush_all whereby a previously scheduled
663 * efx_reconfigure_port() may have been cancelled */
664 static void efx_start_port(struct efx_nic *efx)
666 EFX_LOG(efx, "start port\n");
667 BUG_ON(efx->port_enabled);
669 mutex_lock(&efx->mac_lock);
670 efx->port_enabled = true;
671 __efx_reconfigure_port(efx);
672 mutex_unlock(&efx->mac_lock);
675 /* Prevent efx_reconfigure_work and efx_monitor() from executing, and
676 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
677 * efx_reconfigure_work can still be scheduled via NAPI processing
678 * until efx_flush_all() is called */
679 static void efx_stop_port(struct efx_nic *efx)
681 EFX_LOG(efx, "stop port\n");
683 mutex_lock(&efx->mac_lock);
684 efx->port_enabled = false;
685 mutex_unlock(&efx->mac_lock);
687 /* Serialise against efx_set_multicast_list() */
688 if (efx_dev_registered(efx)) {
689 netif_addr_lock_bh(efx->net_dev);
690 netif_addr_unlock_bh(efx->net_dev);
694 static void efx_fini_port(struct efx_nic *efx)
696 EFX_LOG(efx, "shut down port\n");
698 if (!efx->port_initialized)
701 falcon_fini_xmac(efx);
702 efx->port_initialized = false;
704 efx->link_up = false;
705 efx_link_status_changed(efx);
708 static void efx_remove_port(struct efx_nic *efx)
710 EFX_LOG(efx, "destroying port\n");
712 falcon_remove_port(efx);
715 /**************************************************************************
719 **************************************************************************/
721 /* This configures the PCI device to enable I/O and DMA. */
722 static int efx_init_io(struct efx_nic *efx)
724 struct pci_dev *pci_dev = efx->pci_dev;
725 dma_addr_t dma_mask = efx->type->max_dma_mask;
728 EFX_LOG(efx, "initialising I/O\n");
730 rc = pci_enable_device(pci_dev);
732 EFX_ERR(efx, "failed to enable PCI device\n");
736 pci_set_master(pci_dev);
738 /* Set the PCI DMA mask. Try all possibilities from our
739 * genuine mask down to 32 bits, because some architectures
740 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
741 * masks event though they reject 46 bit masks.
743 while (dma_mask > 0x7fffffffUL) {
744 if (pci_dma_supported(pci_dev, dma_mask) &&
745 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
750 EFX_ERR(efx, "could not find a suitable DMA mask\n");
753 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
754 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
756 /* pci_set_consistent_dma_mask() is not *allowed* to
757 * fail with a mask that pci_set_dma_mask() accepted,
758 * but just in case...
760 EFX_ERR(efx, "failed to set consistent DMA mask\n");
764 efx->membase_phys = pci_resource_start(efx->pci_dev,
766 rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
768 EFX_ERR(efx, "request for memory BAR failed\n");
772 efx->membase = ioremap_nocache(efx->membase_phys,
773 efx->type->mem_map_size);
775 EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
777 (unsigned long long)efx->membase_phys,
778 efx->type->mem_map_size);
782 EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
783 efx->type->mem_bar, (unsigned long long)efx->membase_phys,
784 efx->type->mem_map_size, efx->membase);
789 release_mem_region(efx->membase_phys, efx->type->mem_map_size);
791 efx->membase_phys = 0;
793 pci_disable_device(efx->pci_dev);
798 static void efx_fini_io(struct efx_nic *efx)
800 EFX_LOG(efx, "shutting down I/O\n");
803 iounmap(efx->membase);
807 if (efx->membase_phys) {
808 pci_release_region(efx->pci_dev, efx->type->mem_bar);
809 efx->membase_phys = 0;
812 pci_disable_device(efx->pci_dev);
815 /* Get number of RX queues wanted. Return number of online CPU
816 * packages in the expectation that an IRQ balancer will spread
817 * interrupts across them. */
818 static int efx_wanted_rx_queues(void)
824 cpus_clear(core_mask);
826 for_each_online_cpu(cpu) {
827 if (!cpu_isset(cpu, core_mask)) {
829 cpus_or(core_mask, core_mask,
830 topology_core_siblings(cpu));
837 /* Probe the number and type of interrupts we are able to obtain, and
838 * the resulting numbers of channels and RX queues.
840 static void efx_probe_interrupts(struct efx_nic *efx)
843 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
846 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
847 struct msix_entry xentries[EFX_MAX_CHANNELS];
850 /* We want one RX queue and interrupt per CPU package
851 * (or as specified by the rss_cpus module parameter).
852 * We will need one channel per interrupt.
854 wanted_ints = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
855 efx->n_rx_queues = min(wanted_ints, max_channels);
857 for (i = 0; i < efx->n_rx_queues; i++)
858 xentries[i].entry = i;
859 rc = pci_enable_msix(efx->pci_dev, xentries, efx->n_rx_queues);
861 EFX_BUG_ON_PARANOID(rc >= efx->n_rx_queues);
862 efx->n_rx_queues = rc;
863 rc = pci_enable_msix(efx->pci_dev, xentries,
868 for (i = 0; i < efx->n_rx_queues; i++)
869 efx->channel[i].irq = xentries[i].vector;
871 /* Fall back to single channel MSI */
872 efx->interrupt_mode = EFX_INT_MODE_MSI;
873 EFX_ERR(efx, "could not enable MSI-X\n");
877 /* Try single interrupt MSI */
878 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
879 efx->n_rx_queues = 1;
880 rc = pci_enable_msi(efx->pci_dev);
882 efx->channel[0].irq = efx->pci_dev->irq;
884 EFX_ERR(efx, "could not enable MSI\n");
885 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
889 /* Assume legacy interrupts */
890 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
891 efx->n_rx_queues = 1;
892 efx->legacy_irq = efx->pci_dev->irq;
896 static void efx_remove_interrupts(struct efx_nic *efx)
898 struct efx_channel *channel;
900 /* Remove MSI/MSI-X interrupts */
901 efx_for_each_channel(channel, efx)
903 pci_disable_msi(efx->pci_dev);
904 pci_disable_msix(efx->pci_dev);
906 /* Remove legacy interrupt */
910 static void efx_set_channels(struct efx_nic *efx)
912 struct efx_tx_queue *tx_queue;
913 struct efx_rx_queue *rx_queue;
915 efx_for_each_tx_queue(tx_queue, efx) {
916 if (!EFX_INT_MODE_USE_MSI(efx) && separate_tx_and_rx_channels)
917 tx_queue->channel = &efx->channel[1];
919 tx_queue->channel = &efx->channel[0];
920 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
923 efx_for_each_rx_queue(rx_queue, efx) {
924 rx_queue->channel = &efx->channel[rx_queue->queue];
925 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
929 static int efx_probe_nic(struct efx_nic *efx)
933 EFX_LOG(efx, "creating NIC\n");
935 /* Carry out hardware-type specific initialisation */
936 rc = falcon_probe_nic(efx);
940 /* Determine the number of channels and RX queues by trying to hook
941 * in MSI-X interrupts. */
942 efx_probe_interrupts(efx);
944 efx_set_channels(efx);
946 /* Initialise the interrupt moderation settings */
947 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec);
952 static void efx_remove_nic(struct efx_nic *efx)
954 EFX_LOG(efx, "destroying NIC\n");
956 efx_remove_interrupts(efx);
957 falcon_remove_nic(efx);
960 /**************************************************************************
962 * NIC startup/shutdown
964 *************************************************************************/
966 static int efx_probe_all(struct efx_nic *efx)
968 struct efx_channel *channel;
972 rc = efx_probe_nic(efx);
974 EFX_ERR(efx, "failed to create NIC\n");
979 rc = efx_probe_port(efx);
981 EFX_ERR(efx, "failed to create port\n");
985 /* Create channels */
986 efx_for_each_channel(channel, efx) {
987 rc = efx_probe_channel(channel);
989 EFX_ERR(efx, "failed to create channel %d\n",
998 efx_for_each_channel(channel, efx)
999 efx_remove_channel(channel);
1000 efx_remove_port(efx);
1002 efx_remove_nic(efx);
1007 /* Called after previous invocation(s) of efx_stop_all, restarts the
1008 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1009 * and ensures that the port is scheduled to be reconfigured.
1010 * This function is safe to call multiple times when the NIC is in any
1012 static void efx_start_all(struct efx_nic *efx)
1014 struct efx_channel *channel;
1016 EFX_ASSERT_RESET_SERIALISED(efx);
1018 /* Check that it is appropriate to restart the interface. All
1019 * of these flags are safe to read under just the rtnl lock */
1020 if (efx->port_enabled)
1022 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1024 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1027 /* Mark the port as enabled so port reconfigurations can start, then
1028 * restart the transmit interface early so the watchdog timer stops */
1029 efx_start_port(efx);
1030 efx_wake_queue(efx);
1032 efx_for_each_channel(channel, efx)
1033 efx_start_channel(channel);
1035 falcon_enable_interrupts(efx);
1037 /* Start hardware monitor if we're in RUNNING */
1038 if (efx->state == STATE_RUNNING)
1039 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1040 efx_monitor_interval);
1043 /* Flush all delayed work. Should only be called when no more delayed work
1044 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1045 * since we're holding the rtnl_lock at this point. */
1046 static void efx_flush_all(struct efx_nic *efx)
1048 struct efx_rx_queue *rx_queue;
1050 /* Make sure the hardware monitor is stopped */
1051 cancel_delayed_work_sync(&efx->monitor_work);
1053 /* Ensure that all RX slow refills are complete. */
1054 efx_for_each_rx_queue(rx_queue, efx)
1055 cancel_delayed_work_sync(&rx_queue->work);
1057 /* Stop scheduled port reconfigurations */
1058 cancel_work_sync(&efx->reconfigure_work);
1062 /* Quiesce hardware and software without bringing the link down.
1063 * Safe to call multiple times, when the nic and interface is in any
1064 * state. The caller is guaranteed to subsequently be in a position
1065 * to modify any hardware and software state they see fit without
1067 static void efx_stop_all(struct efx_nic *efx)
1069 struct efx_channel *channel;
1071 EFX_ASSERT_RESET_SERIALISED(efx);
1073 /* port_enabled can be read safely under the rtnl lock */
1074 if (!efx->port_enabled)
1077 /* Disable interrupts and wait for ISR to complete */
1078 falcon_disable_interrupts(efx);
1079 if (efx->legacy_irq)
1080 synchronize_irq(efx->legacy_irq);
1081 efx_for_each_channel(channel, efx) {
1083 synchronize_irq(channel->irq);
1086 /* Stop all NAPI processing and synchronous rx refills */
1087 efx_for_each_channel(channel, efx)
1088 efx_stop_channel(channel);
1090 /* Stop all asynchronous port reconfigurations. Since all
1091 * event processing has already been stopped, there is no
1092 * window to loose phy events */
1095 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1098 /* Isolate the MAC from the TX and RX engines, so that queue
1099 * flushes will complete in a timely fashion. */
1100 falcon_deconfigure_mac_wrapper(efx);
1101 falcon_drain_tx_fifo(efx);
1103 /* Stop the kernel transmit interface late, so the watchdog
1104 * timer isn't ticking over the flush */
1105 efx_stop_queue(efx);
1106 if (efx_dev_registered(efx)) {
1107 netif_tx_lock_bh(efx->net_dev);
1108 netif_tx_unlock_bh(efx->net_dev);
1112 static void efx_remove_all(struct efx_nic *efx)
1114 struct efx_channel *channel;
1116 efx_for_each_channel(channel, efx)
1117 efx_remove_channel(channel);
1118 efx_remove_port(efx);
1119 efx_remove_nic(efx);
1122 /* A convinience function to safely flush all the queues */
1123 int efx_flush_queues(struct efx_nic *efx)
1127 EFX_ASSERT_RESET_SERIALISED(efx);
1131 efx_fini_channels(efx);
1132 rc = efx_init_channels(efx);
1134 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
1143 /**************************************************************************
1145 * Interrupt moderation
1147 **************************************************************************/
1149 /* Set interrupt moderation parameters */
1150 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs)
1152 struct efx_tx_queue *tx_queue;
1153 struct efx_rx_queue *rx_queue;
1155 EFX_ASSERT_RESET_SERIALISED(efx);
1157 efx_for_each_tx_queue(tx_queue, efx)
1158 tx_queue->channel->irq_moderation = tx_usecs;
1160 efx_for_each_rx_queue(rx_queue, efx)
1161 rx_queue->channel->irq_moderation = rx_usecs;
1164 /**************************************************************************
1168 **************************************************************************/
1170 /* Run periodically off the general workqueue. Serialised against
1171 * efx_reconfigure_port via the mac_lock */
1172 static void efx_monitor(struct work_struct *data)
1174 struct efx_nic *efx = container_of(data, struct efx_nic,
1178 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1179 raw_smp_processor_id());
1182 /* If the mac_lock is already held then it is likely a port
1183 * reconfiguration is already in place, which will likely do
1184 * most of the work of check_hw() anyway. */
1185 if (!mutex_trylock(&efx->mac_lock)) {
1186 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1187 efx_monitor_interval);
1191 if (efx->port_enabled)
1192 rc = falcon_check_xmac(efx);
1193 mutex_unlock(&efx->mac_lock);
1196 if (monitor_reset) {
1197 EFX_ERR(efx, "hardware monitor detected a fault: "
1198 "triggering reset\n");
1199 efx_schedule_reset(efx, RESET_TYPE_MONITOR);
1201 EFX_ERR(efx, "hardware monitor detected a fault, "
1202 "skipping reset\n");
1206 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1207 efx_monitor_interval);
1210 /**************************************************************************
1214 *************************************************************************/
1217 * Context: process, rtnl_lock() held.
1219 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1221 struct efx_nic *efx = netdev_priv(net_dev);
1223 EFX_ASSERT_RESET_SERIALISED(efx);
1225 return generic_mii_ioctl(&efx->mii, if_mii(ifr), cmd, NULL);
1228 /**************************************************************************
1232 **************************************************************************/
1234 static int efx_init_napi(struct efx_nic *efx)
1236 struct efx_channel *channel;
1239 efx_for_each_channel(channel, efx) {
1240 channel->napi_dev = efx->net_dev;
1241 rc = efx_lro_init(&channel->lro_mgr, efx);
1251 static void efx_fini_napi(struct efx_nic *efx)
1253 struct efx_channel *channel;
1255 efx_for_each_channel(channel, efx) {
1256 efx_lro_fini(&channel->lro_mgr);
1257 channel->napi_dev = NULL;
1261 /**************************************************************************
1263 * Kernel netpoll interface
1265 *************************************************************************/
1267 #ifdef CONFIG_NET_POLL_CONTROLLER
1269 /* Although in the common case interrupts will be disabled, this is not
1270 * guaranteed. However, all our work happens inside the NAPI callback,
1271 * so no locking is required.
1273 static void efx_netpoll(struct net_device *net_dev)
1275 struct efx_nic *efx = netdev_priv(net_dev);
1276 struct efx_channel *channel;
1278 efx_for_each_channel(channel, efx)
1279 efx_schedule_channel(channel);
1284 /**************************************************************************
1286 * Kernel net device interface
1288 *************************************************************************/
1290 /* Context: process, rtnl_lock() held. */
1291 static int efx_net_open(struct net_device *net_dev)
1293 struct efx_nic *efx = netdev_priv(net_dev);
1294 EFX_ASSERT_RESET_SERIALISED(efx);
1296 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1297 raw_smp_processor_id());
1303 /* Context: process, rtnl_lock() held.
1304 * Note that the kernel will ignore our return code; this method
1305 * should really be a void.
1307 static int efx_net_stop(struct net_device *net_dev)
1309 struct efx_nic *efx = netdev_priv(net_dev);
1312 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1313 raw_smp_processor_id());
1315 /* Stop the device and flush all the channels */
1317 efx_fini_channels(efx);
1318 rc = efx_init_channels(efx);
1320 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
1325 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1326 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1328 struct efx_nic *efx = netdev_priv(net_dev);
1329 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1330 struct net_device_stats *stats = &net_dev->stats;
1332 /* Update stats if possible, but do not wait if another thread
1333 * is updating them (or resetting the NIC); slightly stale
1334 * stats are acceptable.
1336 if (!spin_trylock(&efx->stats_lock))
1338 if (efx->state == STATE_RUNNING) {
1339 falcon_update_stats_xmac(efx);
1340 falcon_update_nic_stats(efx);
1342 spin_unlock(&efx->stats_lock);
1344 stats->rx_packets = mac_stats->rx_packets;
1345 stats->tx_packets = mac_stats->tx_packets;
1346 stats->rx_bytes = mac_stats->rx_bytes;
1347 stats->tx_bytes = mac_stats->tx_bytes;
1348 stats->multicast = mac_stats->rx_multicast;
1349 stats->collisions = mac_stats->tx_collision;
1350 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1351 mac_stats->rx_length_error);
1352 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1353 stats->rx_crc_errors = mac_stats->rx_bad;
1354 stats->rx_frame_errors = mac_stats->rx_align_error;
1355 stats->rx_fifo_errors = mac_stats->rx_overflow;
1356 stats->rx_missed_errors = mac_stats->rx_missed;
1357 stats->tx_window_errors = mac_stats->tx_late_collision;
1359 stats->rx_errors = (stats->rx_length_errors +
1360 stats->rx_over_errors +
1361 stats->rx_crc_errors +
1362 stats->rx_frame_errors +
1363 stats->rx_fifo_errors +
1364 stats->rx_missed_errors +
1365 mac_stats->rx_symbol_error);
1366 stats->tx_errors = (stats->tx_window_errors +
1372 /* Context: netif_tx_lock held, BHs disabled. */
1373 static void efx_watchdog(struct net_device *net_dev)
1375 struct efx_nic *efx = netdev_priv(net_dev);
1377 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d: %s\n",
1378 atomic_read(&efx->netif_stop_count), efx->port_enabled,
1379 monitor_reset ? "resetting channels" : "skipping reset");
1382 efx_schedule_reset(efx, RESET_TYPE_MONITOR);
1386 /* Context: process, rtnl_lock() held. */
1387 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1389 struct efx_nic *efx = netdev_priv(net_dev);
1392 EFX_ASSERT_RESET_SERIALISED(efx);
1394 if (new_mtu > EFX_MAX_MTU)
1399 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1401 efx_fini_channels(efx);
1402 net_dev->mtu = new_mtu;
1403 rc = efx_init_channels(efx);
1411 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
1415 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1417 struct efx_nic *efx = netdev_priv(net_dev);
1418 struct sockaddr *addr = data;
1419 char *new_addr = addr->sa_data;
1421 EFX_ASSERT_RESET_SERIALISED(efx);
1423 if (!is_valid_ether_addr(new_addr)) {
1424 DECLARE_MAC_BUF(mac);
1425 EFX_ERR(efx, "invalid ethernet MAC address requested: %s\n",
1426 print_mac(mac, new_addr));
1430 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1432 /* Reconfigure the MAC */
1433 efx_reconfigure_port(efx);
1438 /* Context: netif_tx_lock held, BHs disabled. */
1439 static void efx_set_multicast_list(struct net_device *net_dev)
1441 struct efx_nic *efx = netdev_priv(net_dev);
1442 struct dev_mc_list *mc_list = net_dev->mc_list;
1443 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1449 /* Set per-MAC promiscuity flag and reconfigure MAC if necessary */
1450 promiscuous = !!(net_dev->flags & IFF_PROMISC);
1451 if (efx->promiscuous != promiscuous) {
1452 efx->promiscuous = promiscuous;
1453 /* Close the window between efx_stop_port() and efx_flush_all()
1454 * by only queuing work when the port is enabled. */
1455 if (efx->port_enabled)
1456 queue_work(efx->workqueue, &efx->reconfigure_work);
1459 /* Build multicast hash table */
1460 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1461 memset(mc_hash, 0xff, sizeof(*mc_hash));
1463 memset(mc_hash, 0x00, sizeof(*mc_hash));
1464 for (i = 0; i < net_dev->mc_count; i++) {
1465 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1466 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1467 set_bit_le(bit, mc_hash->byte);
1468 mc_list = mc_list->next;
1472 /* Create and activate new global multicast hash table */
1473 falcon_set_multicast_hash(efx);
1476 static int efx_netdev_event(struct notifier_block *this,
1477 unsigned long event, void *ptr)
1479 struct net_device *net_dev = ptr;
1481 if (net_dev->open == efx_net_open && event == NETDEV_CHANGENAME) {
1482 struct efx_nic *efx = netdev_priv(net_dev);
1484 strcpy(efx->name, net_dev->name);
1490 static struct notifier_block efx_netdev_notifier = {
1491 .notifier_call = efx_netdev_event,
1494 static int efx_register_netdev(struct efx_nic *efx)
1496 struct net_device *net_dev = efx->net_dev;
1499 net_dev->watchdog_timeo = 5 * HZ;
1500 net_dev->irq = efx->pci_dev->irq;
1501 net_dev->open = efx_net_open;
1502 net_dev->stop = efx_net_stop;
1503 net_dev->get_stats = efx_net_stats;
1504 net_dev->tx_timeout = &efx_watchdog;
1505 net_dev->hard_start_xmit = efx_hard_start_xmit;
1506 net_dev->do_ioctl = efx_ioctl;
1507 net_dev->change_mtu = efx_change_mtu;
1508 net_dev->set_mac_address = efx_set_mac_address;
1509 net_dev->set_multicast_list = efx_set_multicast_list;
1510 #ifdef CONFIG_NET_POLL_CONTROLLER
1511 net_dev->poll_controller = efx_netpoll;
1513 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1514 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1516 /* Always start with carrier off; PHY events will detect the link */
1517 netif_carrier_off(efx->net_dev);
1519 /* Clear MAC statistics */
1520 falcon_update_stats_xmac(efx);
1521 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1523 rc = register_netdev(net_dev);
1525 EFX_ERR(efx, "could not register net dev\n");
1528 strcpy(efx->name, net_dev->name);
1533 static void efx_unregister_netdev(struct efx_nic *efx)
1535 struct efx_tx_queue *tx_queue;
1540 BUG_ON(netdev_priv(efx->net_dev) != efx);
1542 /* Free up any skbs still remaining. This has to happen before
1543 * we try to unregister the netdev as running their destructors
1544 * may be needed to get the device ref. count to 0. */
1545 efx_for_each_tx_queue(tx_queue, efx)
1546 efx_release_tx_buffers(tx_queue);
1548 if (efx_dev_registered(efx)) {
1549 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1550 unregister_netdev(efx->net_dev);
1554 /**************************************************************************
1556 * Device reset and suspend
1558 **************************************************************************/
1560 /* The final hardware and software finalisation before reset. */
1561 static int efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
1565 EFX_ASSERT_RESET_SERIALISED(efx);
1567 rc = falcon_xmac_get_settings(efx, ecmd);
1569 EFX_ERR(efx, "could not back up PHY settings\n");
1573 efx_fini_channels(efx);
1580 /* The first part of software initialisation after a hardware reset
1581 * This function does not handle serialisation with the kernel, it
1582 * assumes the caller has done this */
1583 static int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd)
1587 rc = efx_init_channels(efx);
1591 /* Restore MAC and PHY settings. */
1592 rc = falcon_xmac_set_settings(efx, ecmd);
1594 EFX_ERR(efx, "could not restore PHY settings\n");
1601 efx_fini_channels(efx);
1606 /* Reset the NIC as transparently as possible. Do not reset the PHY
1607 * Note that the reset may fail, in which case the card will be left
1608 * in a most-probably-unusable state.
1610 * This function will sleep. You cannot reset from within an atomic
1611 * state; use efx_schedule_reset() instead.
1613 * Grabs the rtnl_lock.
1615 static int efx_reset(struct efx_nic *efx)
1617 struct ethtool_cmd ecmd;
1618 enum reset_type method = efx->reset_pending;
1621 /* Serialise with kernel interfaces */
1624 /* If we're not RUNNING then don't reset. Leave the reset_pending
1625 * flag set so that efx_pci_probe_main will be retried */
1626 if (efx->state != STATE_RUNNING) {
1627 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1631 efx->state = STATE_RESETTING;
1632 EFX_INFO(efx, "resetting (%d)\n", method);
1634 /* The net_dev->get_stats handler is quite slow, and will fail
1635 * if a fetch is pending over reset. Serialise against it. */
1636 spin_lock(&efx->stats_lock);
1637 spin_unlock(&efx->stats_lock);
1640 mutex_lock(&efx->mac_lock);
1642 rc = efx_reset_down(efx, &ecmd);
1646 rc = falcon_reset_hw(efx, method);
1648 EFX_ERR(efx, "failed to reset hardware\n");
1652 /* Allow resets to be rescheduled. */
1653 efx->reset_pending = RESET_TYPE_NONE;
1655 /* Reinitialise bus-mastering, which may have been turned off before
1656 * the reset was scheduled. This is still appropriate, even in the
1657 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1658 * can respond to requests. */
1659 pci_set_master(efx->pci_dev);
1661 /* Reinitialise device. This is appropriate in the RESET_TYPE_DISABLE
1662 * case so the driver can talk to external SRAM */
1663 rc = falcon_init_nic(efx);
1665 EFX_ERR(efx, "failed to initialise NIC\n");
1669 /* Leave device stopped if necessary */
1670 if (method == RESET_TYPE_DISABLE) {
1671 /* Reinitialise the device anyway so the driver unload sequence
1672 * can talk to the external SRAM */
1673 falcon_init_nic(efx);
1678 rc = efx_reset_up(efx, &ecmd);
1682 mutex_unlock(&efx->mac_lock);
1683 EFX_LOG(efx, "reset complete\n");
1685 efx->state = STATE_RUNNING;
1697 EFX_ERR(efx, "has been disabled\n");
1698 efx->state = STATE_DISABLED;
1700 mutex_unlock(&efx->mac_lock);
1702 efx_unregister_netdev(efx);
1707 /* The worker thread exists so that code that cannot sleep can
1708 * schedule a reset for later.
1710 static void efx_reset_work(struct work_struct *data)
1712 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1717 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1719 enum reset_type method;
1721 if (efx->reset_pending != RESET_TYPE_NONE) {
1722 EFX_INFO(efx, "quenching already scheduled reset\n");
1727 case RESET_TYPE_INVISIBLE:
1728 case RESET_TYPE_ALL:
1729 case RESET_TYPE_WORLD:
1730 case RESET_TYPE_DISABLE:
1733 case RESET_TYPE_RX_RECOVERY:
1734 case RESET_TYPE_RX_DESC_FETCH:
1735 case RESET_TYPE_TX_DESC_FETCH:
1736 case RESET_TYPE_TX_SKIP:
1737 method = RESET_TYPE_INVISIBLE;
1740 method = RESET_TYPE_ALL;
1745 EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
1747 EFX_LOG(efx, "scheduling reset (%d)\n", method);
1749 efx->reset_pending = method;
1751 queue_work(efx->reset_workqueue, &efx->reset_work);
1754 /**************************************************************************
1756 * List of NICs we support
1758 **************************************************************************/
1760 /* PCI device ID table */
1761 static struct pci_device_id efx_pci_table[] __devinitdata = {
1762 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1763 .driver_data = (unsigned long) &falcon_a_nic_type},
1764 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1765 .driver_data = (unsigned long) &falcon_b_nic_type},
1766 {0} /* end of list */
1769 /**************************************************************************
1771 * Dummy PHY/MAC/Board operations
1773 * Can be used where the MAC does not implement this operation
1774 * Needed so all function pointers are valid and do not have to be tested
1777 **************************************************************************/
1778 int efx_port_dummy_op_int(struct efx_nic *efx)
1782 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1783 void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
1785 static struct efx_phy_operations efx_dummy_phy_operations = {
1786 .init = efx_port_dummy_op_int,
1787 .reconfigure = efx_port_dummy_op_void,
1788 .check_hw = efx_port_dummy_op_int,
1789 .fini = efx_port_dummy_op_void,
1790 .clear_interrupt = efx_port_dummy_op_void,
1791 .reset_xaui = efx_port_dummy_op_void,
1794 /* Dummy board operations */
1795 static int efx_nic_dummy_op_int(struct efx_nic *nic)
1800 static struct efx_board efx_dummy_board_info = {
1801 .init = efx_nic_dummy_op_int,
1802 .init_leds = efx_port_dummy_op_int,
1803 .set_fault_led = efx_port_dummy_op_blink,
1804 .fini = efx_port_dummy_op_void,
1807 /**************************************************************************
1811 **************************************************************************/
1813 /* This zeroes out and then fills in the invariants in a struct
1814 * efx_nic (including all sub-structures).
1816 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1817 struct pci_dev *pci_dev, struct net_device *net_dev)
1819 struct efx_channel *channel;
1820 struct efx_tx_queue *tx_queue;
1821 struct efx_rx_queue *rx_queue;
1824 /* Initialise common structures */
1825 memset(efx, 0, sizeof(*efx));
1826 spin_lock_init(&efx->biu_lock);
1827 spin_lock_init(&efx->phy_lock);
1828 INIT_WORK(&efx->reset_work, efx_reset_work);
1829 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1830 efx->pci_dev = pci_dev;
1831 efx->state = STATE_INIT;
1832 efx->reset_pending = RESET_TYPE_NONE;
1833 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1834 efx->board_info = efx_dummy_board_info;
1836 efx->net_dev = net_dev;
1837 efx->rx_checksum_enabled = true;
1838 spin_lock_init(&efx->netif_stop_lock);
1839 spin_lock_init(&efx->stats_lock);
1840 mutex_init(&efx->mac_lock);
1841 efx->phy_op = &efx_dummy_phy_operations;
1842 efx->mii.dev = net_dev;
1843 INIT_WORK(&efx->reconfigure_work, efx_reconfigure_work);
1844 atomic_set(&efx->netif_stop_count, 1);
1846 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1847 channel = &efx->channel[i];
1849 channel->channel = i;
1850 channel->work_pending = false;
1852 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1853 tx_queue = &efx->tx_queue[i];
1854 tx_queue->efx = efx;
1855 tx_queue->queue = i;
1856 tx_queue->buffer = NULL;
1857 tx_queue->channel = &efx->channel[0]; /* for safety */
1858 tx_queue->tso_headers_free = NULL;
1860 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1861 rx_queue = &efx->rx_queue[i];
1862 rx_queue->efx = efx;
1863 rx_queue->queue = i;
1864 rx_queue->channel = &efx->channel[0]; /* for safety */
1865 rx_queue->buffer = NULL;
1866 spin_lock_init(&rx_queue->add_lock);
1867 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1872 /* Sanity-check NIC type */
1873 EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
1874 (efx->type->txd_ring_mask + 1));
1875 EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
1876 (efx->type->rxd_ring_mask + 1));
1877 EFX_BUG_ON_PARANOID(efx->type->evq_size &
1878 (efx->type->evq_size - 1));
1879 /* As close as we can get to guaranteeing that we don't overflow */
1880 EFX_BUG_ON_PARANOID(efx->type->evq_size <
1881 (efx->type->txd_ring_mask + 1 +
1882 efx->type->rxd_ring_mask + 1));
1883 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1885 /* Higher numbered interrupt modes are less capable! */
1886 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
1889 efx->workqueue = create_singlethread_workqueue("sfc_work");
1890 if (!efx->workqueue) {
1895 efx->reset_workqueue = create_singlethread_workqueue("sfc_reset");
1896 if (!efx->reset_workqueue) {
1904 destroy_workqueue(efx->workqueue);
1905 efx->workqueue = NULL;
1911 static void efx_fini_struct(struct efx_nic *efx)
1913 if (efx->reset_workqueue) {
1914 destroy_workqueue(efx->reset_workqueue);
1915 efx->reset_workqueue = NULL;
1917 if (efx->workqueue) {
1918 destroy_workqueue(efx->workqueue);
1919 efx->workqueue = NULL;
1923 /**************************************************************************
1927 **************************************************************************/
1929 /* Main body of final NIC shutdown code
1930 * This is called only at module unload (or hotplug removal).
1932 static void efx_pci_remove_main(struct efx_nic *efx)
1934 EFX_ASSERT_RESET_SERIALISED(efx);
1936 /* Skip everything if we never obtained a valid membase */
1940 efx_fini_channels(efx);
1943 /* Shutdown the board, then the NIC and board state */
1944 efx->board_info.fini(efx);
1945 falcon_fini_interrupt(efx);
1948 efx_remove_all(efx);
1951 /* Final NIC shutdown
1952 * This is called only at module unload (or hotplug removal).
1954 static void efx_pci_remove(struct pci_dev *pci_dev)
1956 struct efx_nic *efx;
1958 efx = pci_get_drvdata(pci_dev);
1962 /* Mark the NIC as fini, then stop the interface */
1964 efx->state = STATE_FINI;
1965 dev_close(efx->net_dev);
1967 /* Allow any queued efx_resets() to complete */
1970 if (efx->membase == NULL)
1973 efx_unregister_netdev(efx);
1975 /* Wait for any scheduled resets to complete. No more will be
1976 * scheduled from this point because efx_stop_all() has been
1977 * called, we are no longer registered with driverlink, and
1978 * the net_device's have been removed. */
1979 flush_workqueue(efx->reset_workqueue);
1981 efx_pci_remove_main(efx);
1985 EFX_LOG(efx, "shutdown successful\n");
1987 pci_set_drvdata(pci_dev, NULL);
1988 efx_fini_struct(efx);
1989 free_netdev(efx->net_dev);
1992 /* Main body of NIC initialisation
1993 * This is called at module load (or hotplug insertion, theoretically).
1995 static int efx_pci_probe_main(struct efx_nic *efx)
1999 /* Do start-of-day initialisation */
2000 rc = efx_probe_all(efx);
2004 rc = efx_init_napi(efx);
2008 /* Initialise the board */
2009 rc = efx->board_info.init(efx);
2011 EFX_ERR(efx, "failed to initialise board\n");
2015 rc = falcon_init_nic(efx);
2017 EFX_ERR(efx, "failed to initialise NIC\n");
2021 rc = efx_init_port(efx);
2023 EFX_ERR(efx, "failed to initialise port\n");
2027 rc = efx_init_channels(efx);
2031 rc = falcon_init_interrupt(efx);
2038 efx_fini_channels(efx);
2046 efx_remove_all(efx);
2051 /* NIC initialisation
2053 * This is called at module load (or hotplug insertion,
2054 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2055 * sets up and registers the network devices with the kernel and hooks
2056 * the interrupt service routine. It does not prepare the device for
2057 * transmission; this is left to the first time one of the network
2058 * interfaces is brought up (i.e. efx_net_open).
2060 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2061 const struct pci_device_id *entry)
2063 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2064 struct net_device *net_dev;
2065 struct efx_nic *efx;
2068 /* Allocate and initialise a struct net_device and struct efx_nic */
2069 net_dev = alloc_etherdev(sizeof(*efx));
2072 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2073 NETIF_F_HIGHDMA | NETIF_F_TSO);
2075 net_dev->features |= NETIF_F_LRO;
2076 /* Mask for features that also apply to VLAN devices */
2077 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2079 efx = netdev_priv(net_dev);
2080 pci_set_drvdata(pci_dev, efx);
2081 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2085 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2087 /* Set up basic I/O (BAR mappings etc) */
2088 rc = efx_init_io(efx);
2092 /* No serialisation is required with the reset path because
2093 * we're in STATE_INIT. */
2094 for (i = 0; i < 5; i++) {
2095 rc = efx_pci_probe_main(efx);
2099 /* Serialise against efx_reset(). No more resets will be
2100 * scheduled since efx_stop_all() has been called, and we
2101 * have not and never have been registered with either
2102 * the rtnetlink or driverlink layers. */
2103 flush_workqueue(efx->reset_workqueue);
2105 /* Retry if a recoverably reset event has been scheduled */
2106 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2107 (efx->reset_pending != RESET_TYPE_ALL))
2110 efx->reset_pending = RESET_TYPE_NONE;
2114 EFX_ERR(efx, "Could not reset NIC\n");
2118 /* Switch to the running state before we expose the device to
2119 * the OS. This is to ensure that the initial gathering of
2120 * MAC stats succeeds. */
2122 efx->state = STATE_RUNNING;
2125 rc = efx_register_netdev(efx);
2129 EFX_LOG(efx, "initialisation successful\n");
2134 efx_pci_remove_main(efx);
2139 efx_fini_struct(efx);
2141 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2142 free_netdev(net_dev);
2146 static struct pci_driver efx_pci_driver = {
2147 .name = EFX_DRIVER_NAME,
2148 .id_table = efx_pci_table,
2149 .probe = efx_pci_probe,
2150 .remove = efx_pci_remove,
2153 /**************************************************************************
2155 * Kernel module interface
2157 *************************************************************************/
2159 module_param(interrupt_mode, uint, 0444);
2160 MODULE_PARM_DESC(interrupt_mode,
2161 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2163 static int __init efx_init_module(void)
2167 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2169 rc = register_netdevice_notifier(&efx_netdev_notifier);
2173 refill_workqueue = create_workqueue("sfc_refill");
2174 if (!refill_workqueue) {
2179 rc = pci_register_driver(&efx_pci_driver);
2186 destroy_workqueue(refill_workqueue);
2188 unregister_netdevice_notifier(&efx_netdev_notifier);
2193 static void __exit efx_exit_module(void)
2195 printk(KERN_INFO "Solarflare NET driver unloading\n");
2197 pci_unregister_driver(&efx_pci_driver);
2198 destroy_workqueue(refill_workqueue);
2199 unregister_netdevice_notifier(&efx_netdev_notifier);
2203 module_init(efx_init_module);
2204 module_exit(efx_exit_module);
2206 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2207 "Solarflare Communications");
2208 MODULE_DESCRIPTION("Solarflare Communications network driver");
2209 MODULE_LICENSE("GPL");
2210 MODULE_DEVICE_TABLE(pci, efx_pci_table);