git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-at91/at91sam9263_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9263_devices.c
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/i2c-gpio.h>
  18
  19 #include <linux/fb.h>
  20 #include <video/atmel_lcdc.h>
  21
  22 #include <mach/board.h>
  23 #include <mach/gpio.h>
  24 #include <mach/at91sam9263.h>
  25 #include <mach/at91sam9263_matrix.h>
  26 #include <mach/at91sam9_smc.h>
  27
  28 #include "generic.h"
  29
  30
  31 /* --------------------------------------------------------------------
  32  *  USB Host
  33  * -------------------------------------------------------------------- */
  34
  35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  36 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  37 static struct at91_usbh_data usbh_data;
  38
  39 static struct resource usbh_resources[] = {
  40         [0] = {
  41                 .start  = AT91SAM9263_UHP_BASE,
  42                 .end    = AT91SAM9263_UHP_BASE + SZ_1M - 1,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = {
  46                 .start  = AT91SAM9263_ID_UHP,
  47                 .end    = AT91SAM9263_ID_UHP,
  48                 .flags  = IORESOURCE_IRQ,
  49         },
  50 };
  51
  52 static struct platform_device at91_usbh_device = {
  53         .name           = "at91_ohci",
  54         .id             = -1,
  55         .dev            = {
  56                                 .dma_mask               = &ohci_dmamask,
  57                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  58                                 .platform_data          = &usbh_data,
  59         },
  60         .resource       = usbh_resources,
  61         .num_resources  = ARRAY_SIZE(usbh_resources),
  62 };
  63
  64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  65 {
  66         int i;
  67
  68         if (!data)
  69                 return;
  70
  71         /* Enable VBus control for UHP ports */
  72         for (i = 0; i < data->ports; i++) {
  73                 if (data->vbus_pin[i])
  74                         at91_set_gpio_output(data->vbus_pin[i], 0);
  75         }
  76
  77         usbh_data = *data;
  78         platform_device_register(&at91_usbh_device);
  79 }
  80 #else
  81 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  82 #endif
  83
  84
  85 /* --------------------------------------------------------------------
  86  *  USB Device (Gadget)
  87  * -------------------------------------------------------------------- */
  88
  89 #ifdef CONFIG_USB_GADGET_AT91
  90 static struct at91_udc_data udc_data;
  91
  92 static struct resource udc_resources[] = {
  93         [0] = {
  94                 .start  = AT91SAM9263_BASE_UDP,
  95                 .end    = AT91SAM9263_BASE_UDP + SZ_16K - 1,
  96                 .flags  = IORESOURCE_MEM,
  97         },
  98         [1] = {
  99                 .start  = AT91SAM9263_ID_UDP,
 100                 .end    = AT91SAM9263_ID_UDP,
 101                 .flags  = IORESOURCE_IRQ,
 102         },
 103 };
 104
 105 static struct platform_device at91_udc_device = {
 106         .name           = "at91_udc",
 107         .id             = -1,
 108         .dev            = {
 109                                 .platform_data          = &udc_data,
 110         },
 111         .resource       = udc_resources,
 112         .num_resources  = ARRAY_SIZE(udc_resources),
 113 };
 114
 115 void __init at91_add_device_udc(struct at91_udc_data *data)
 116 {
 117         if (!data)
 118                 return;
 119
 120         if (data->vbus_pin) {
 121                 at91_set_gpio_input(data->vbus_pin, 0);
 122                 at91_set_deglitch(data->vbus_pin, 1);
 123         }
 124
 125         /* Pullup pin is handled internally by USB device peripheral */
 126
 127         udc_data = *data;
 128         platform_device_register(&at91_udc_device);
 129 }
 130 #else
 131 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 132 #endif
 133
 134
 135 /* --------------------------------------------------------------------
 136  *  Ethernet
 137  * -------------------------------------------------------------------- */
 138
 139 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 140 static u64 eth_dmamask = DMA_BIT_MASK(32);
 141 static struct at91_eth_data eth_data;
 142
 143 static struct resource eth_resources[] = {
 144         [0] = {
 145                 .start  = AT91SAM9263_BASE_EMAC,
 146                 .end    = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
 147                 .flags  = IORESOURCE_MEM,
 148         },
 149         [1] = {
 150                 .start  = AT91SAM9263_ID_EMAC,
 151                 .end    = AT91SAM9263_ID_EMAC,
 152                 .flags  = IORESOURCE_IRQ,
 153         },
 154 };
 155
 156 static struct platform_device at91sam9263_eth_device = {
 157         .name           = "macb",
 158         .id             = -1,
 159         .dev            = {
 160                                 .dma_mask               = &eth_dmamask,
 161                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 162                                 .platform_data          = &eth_data,
 163         },
 164         .resource       = eth_resources,
 165         .num_resources  = ARRAY_SIZE(eth_resources),
 166 };
 167
 168 void __init at91_add_device_eth(struct at91_eth_data *data)
 169 {
 170         if (!data)
 171                 return;
 172
 173         if (data->phy_irq_pin) {
 174                 at91_set_gpio_input(data->phy_irq_pin, 0);
 175                 at91_set_deglitch(data->phy_irq_pin, 1);
 176         }
 177
 178         /* Pins used for MII and RMII */
 179         at91_set_A_periph(AT91_PIN_PE21, 0);    /* ETXCK_EREFCK */
 180         at91_set_B_periph(AT91_PIN_PC25, 0);    /* ERXDV */
 181         at91_set_A_periph(AT91_PIN_PE25, 0);    /* ERX0 */
 182         at91_set_A_periph(AT91_PIN_PE26, 0);    /* ERX1 */
 183         at91_set_A_periph(AT91_PIN_PE27, 0);    /* ERXER */
 184         at91_set_A_periph(AT91_PIN_PE28, 0);    /* ETXEN */
 185         at91_set_A_periph(AT91_PIN_PE23, 0);    /* ETX0 */
 186         at91_set_A_periph(AT91_PIN_PE24, 0);    /* ETX1 */
 187         at91_set_A_periph(AT91_PIN_PE30, 0);    /* EMDIO */
 188         at91_set_A_periph(AT91_PIN_PE29, 0);    /* EMDC */
 189
 190         if (!data->is_rmii) {
 191                 at91_set_A_periph(AT91_PIN_PE22, 0);    /* ECRS */
 192                 at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
 193                 at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
 194                 at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
 195                 at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
 196                 at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
 197                 at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
 198                 at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
 199         }
 200
 201         eth_data = *data;
 202         platform_device_register(&at91sam9263_eth_device);
 203 }
 204 #else
 205 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 206 #endif
 207
 208
 209 /* --------------------------------------------------------------------
 210  *  MMC / SD
 211  * -------------------------------------------------------------------- */
 212
 213 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 214 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 215 static struct at91_mmc_data mmc0_data, mmc1_data;
 216
 217 static struct resource mmc0_resources[] = {
 218         [0] = {
 219                 .start  = AT91SAM9263_BASE_MCI0,
 220                 .end    = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
 221                 .flags  = IORESOURCE_MEM,
 222         },
 223         [1] = {
 224                 .start  = AT91SAM9263_ID_MCI0,
 225                 .end    = AT91SAM9263_ID_MCI0,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct platform_device at91sam9263_mmc0_device = {
 231         .name           = "at91_mci",
 232         .id             = 0,
 233         .dev            = {
 234                                 .dma_mask               = &mmc_dmamask,
 235                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 236                                 .platform_data          = &mmc0_data,
 237         },
 238         .resource       = mmc0_resources,
 239         .num_resources  = ARRAY_SIZE(mmc0_resources),
 240 };
 241
 242 static struct resource mmc1_resources[] = {
 243         [0] = {
 244                 .start  = AT91SAM9263_BASE_MCI1,
 245                 .end    = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
 246                 .flags  = IORESOURCE_MEM,
 247         },
 248         [1] = {
 249                 .start  = AT91SAM9263_ID_MCI1,
 250                 .end    = AT91SAM9263_ID_MCI1,
 251                 .flags  = IORESOURCE_IRQ,
 252         },
 253 };
 254
 255 static struct platform_device at91sam9263_mmc1_device = {
 256         .name           = "at91_mci",
 257         .id             = 1,
 258         .dev            = {
 259                                 .dma_mask               = &mmc_dmamask,
 260                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 261                                 .platform_data          = &mmc1_data,
 262         },
 263         .resource       = mmc1_resources,
 264         .num_resources  = ARRAY_SIZE(mmc1_resources),
 265 };
 266
 267 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 268 {
 269         if (!data)
 270                 return;
 271
 272         /* input/irq */
 273         if (data->det_pin) {
 274                 at91_set_gpio_input(data->det_pin, 1);
 275                 at91_set_deglitch(data->det_pin, 1);
 276         }
 277         if (data->wp_pin)
 278                 at91_set_gpio_input(data->wp_pin, 1);
 279         if (data->vcc_pin)
 280                 at91_set_gpio_output(data->vcc_pin, 0);
 281
 282         if (mmc_id == 0) {              /* MCI0 */
 283                 /* CLK */
 284                 at91_set_A_periph(AT91_PIN_PA12, 0);
 285
 286                 if (data->slot_b) {
 287                         /* CMD */
 288                         at91_set_A_periph(AT91_PIN_PA16, 1);
 289
 290                         /* DAT0, maybe DAT1..DAT3 */
 291                         at91_set_A_periph(AT91_PIN_PA17, 1);
 292                         if (data->wire4) {
 293                                 at91_set_A_periph(AT91_PIN_PA18, 1);
 294                                 at91_set_A_periph(AT91_PIN_PA19, 1);
 295                                 at91_set_A_periph(AT91_PIN_PA20, 1);
 296                         }
 297                 } else {
 298                         /* CMD */
 299                         at91_set_A_periph(AT91_PIN_PA1, 1);
 300
 301                         /* DAT0, maybe DAT1..DAT3 */
 302                         at91_set_A_periph(AT91_PIN_PA0, 1);
 303                         if (data->wire4) {
 304                                 at91_set_A_periph(AT91_PIN_PA3, 1);
 305                                 at91_set_A_periph(AT91_PIN_PA4, 1);
 306                                 at91_set_A_periph(AT91_PIN_PA5, 1);
 307                         }
 308                 }
 309
 310                 mmc0_data = *data;
 311                 at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
 312                 platform_device_register(&at91sam9263_mmc0_device);
 313         } else {                        /* MCI1 */
 314                 /* CLK */
 315                 at91_set_A_periph(AT91_PIN_PA6, 0);
 316
 317                 if (data->slot_b) {
 318                         /* CMD */
 319                         at91_set_A_periph(AT91_PIN_PA21, 1);
 320
 321                         /* DAT0, maybe DAT1..DAT3 */
 322                         at91_set_A_periph(AT91_PIN_PA22, 1);
 323                         if (data->wire4) {
 324                                 at91_set_A_periph(AT91_PIN_PA23, 1);
 325                                 at91_set_A_periph(AT91_PIN_PA24, 1);
 326                                 at91_set_A_periph(AT91_PIN_PA25, 1);
 327                         }
 328                 } else {
 329                         /* CMD */
 330                         at91_set_A_periph(AT91_PIN_PA7, 1);
 331
 332                         /* DAT0, maybe DAT1..DAT3 */
 333                         at91_set_A_periph(AT91_PIN_PA8, 1);
 334                         if (data->wire4) {
 335                                 at91_set_A_periph(AT91_PIN_PA9, 1);
 336                                 at91_set_A_periph(AT91_PIN_PA10, 1);
 337                                 at91_set_A_periph(AT91_PIN_PA11, 1);
 338                         }
 339                 }
 340
 341                 mmc1_data = *data;
 342                 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
 343                 platform_device_register(&at91sam9263_mmc1_device);
 344         }
 345 }
 346 #else
 347 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 348 #endif
 349
 350 /* --------------------------------------------------------------------
 351  *  Compact Flash (PCMCIA or IDE)
 352  * -------------------------------------------------------------------- */
 353
 354 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
 355     defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
 356
 357 static struct at91_cf_data cf0_data;
 358
 359 static struct resource cf0_resources[] = {
 360         [0] = {
 361                 .start  = AT91_CHIPSELECT_4,
 362                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
 363                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
 364         }
 365 };
 366
 367 static struct platform_device cf0_device = {
 368         .id             = 0,
 369         .dev            = {
 370                                 .platform_data  = &cf0_data,
 371         },
 372         .resource       = cf0_resources,
 373         .num_resources  = ARRAY_SIZE(cf0_resources),
 374 };
 375
 376 static struct at91_cf_data cf1_data;
 377
 378 static struct resource cf1_resources[] = {
 379         [0] = {
 380                 .start  = AT91_CHIPSELECT_5,
 381                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
 382                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
 383         }
 384 };
 385
 386 static struct platform_device cf1_device = {
 387         .id             = 1,
 388         .dev            = {
 389                                 .platform_data  = &cf1_data,
 390         },
 391         .resource       = cf1_resources,
 392         .num_resources  = ARRAY_SIZE(cf1_resources),
 393 };
 394
 395 void __init at91_add_device_cf(struct at91_cf_data *data)
 396 {
 397         unsigned long ebi0_csa;
 398         struct platform_device *pdev;
 399
 400         if (!data)
 401                 return;
 402
 403         /*
 404          * assign CS4 or CS5 to SMC with Compact Flash logic support,
 405          * we assume SMC timings are configured by board code,
 406          * except True IDE where timings are controlled by driver
 407          */
 408         ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
 409         switch (data->chipselect) {
 410         case 4:
 411                 at91_set_A_periph(AT91_PIN_PD6, 0);  /* EBI0_NCS4/CFCS0 */
 412                 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
 413                 cf0_data = *data;
 414                 pdev = &cf0_device;
 415                 break;
 416         case 5:
 417                 at91_set_A_periph(AT91_PIN_PD7, 0);  /* EBI0_NCS5/CFCS1 */
 418                 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
 419                 cf1_data = *data;
 420                 pdev = &cf1_device;
 421                 break;
 422         default:
 423                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
 424                        data->chipselect);
 425                 return;
 426         }
 427         at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
 428
 429         if (data->det_pin) {
 430                 at91_set_gpio_input(data->det_pin, 1);
 431                 at91_set_deglitch(data->det_pin, 1);
 432         }
 433
 434         if (data->irq_pin) {
 435                 at91_set_gpio_input(data->irq_pin, 1);
 436                 at91_set_deglitch(data->irq_pin, 1);
 437         }
 438
 439         if (data->vcc_pin)
 440                 /* initially off */
 441                 at91_set_gpio_output(data->vcc_pin, 0);
 442
 443         /* enable EBI controlled pins */
 444         at91_set_A_periph(AT91_PIN_PD5, 1);  /* NWAIT */
 445         at91_set_A_periph(AT91_PIN_PD8, 0);  /* CFCE1 */
 446         at91_set_A_periph(AT91_PIN_PD9, 0);  /* CFCE2 */
 447         at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
 448
 449         pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
 450         platform_device_register(pdev);
 451 }
 452 #else
 453 void __init at91_add_device_cf(struct at91_cf_data *data) {}
 454 #endif
 455
 456 /* --------------------------------------------------------------------
 457  *  NAND / SmartMedia
 458  * -------------------------------------------------------------------- */
 459
 460 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 461 static struct atmel_nand_data nand_data;
 462
 463 #define NAND_BASE       AT91_CHIPSELECT_3
 464
 465 static struct resource nand_resources[] = {
 466         [0] = {
 467                 .start  = NAND_BASE,
 468                 .end    = NAND_BASE + SZ_256M - 1,
 469                 .flags  = IORESOURCE_MEM,
 470         },
 471         [1] = {
 472                 .start  = AT91_BASE_SYS + AT91_ECC0,
 473                 .end    = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
 474                 .flags  = IORESOURCE_MEM,
 475         }
 476 };
 477
 478 static struct platform_device at91sam9263_nand_device = {
 479         .name           = "atmel_nand",
 480         .id             = -1,
 481         .dev            = {
 482                                 .platform_data  = &nand_data,
 483         },
 484         .resource       = nand_resources,
 485         .num_resources  = ARRAY_SIZE(nand_resources),
 486 };
 487
 488 void __init at91_add_device_nand(struct atmel_nand_data *data)
 489 {
 490         unsigned long csa;
 491
 492         if (!data)
 493                 return;
 494
 495         csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
 496         at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 497
 498         /* enable pin */
 499         if (data->enable_pin)
 500                 at91_set_gpio_output(data->enable_pin, 1);
 501
 502         /* ready/busy pin */
 503         if (data->rdy_pin)
 504                 at91_set_gpio_input(data->rdy_pin, 1);
 505
 506         /* card detect pin */
 507         if (data->det_pin)
 508                 at91_set_gpio_input(data->det_pin, 1);
 509
 510         nand_data = *data;
 511         platform_device_register(&at91sam9263_nand_device);
 512 }
 513 #else
 514 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 515 #endif
 516
 517
 518 /* --------------------------------------------------------------------
 519  *  TWI (i2c)
 520  * -------------------------------------------------------------------- */
 521
 522 /*
 523  * Prefer the GPIO code since the TWI controller isn't robust
 524  * (gets overruns and underruns under load) and can only issue
 525  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 526  */
 527 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 528
 529 static struct i2c_gpio_platform_data pdata = {
 530         .sda_pin                = AT91_PIN_PB4,
 531         .sda_is_open_drain      = 1,
 532         .scl_pin                = AT91_PIN_PB5,
 533         .scl_is_open_drain      = 1,
 534         .udelay                 = 2,            /* ~100 kHz */
 535 };
 536
 537 static struct platform_device at91sam9263_twi_device = {
 538         .name                   = "i2c-gpio",
 539         .id                     = -1,
 540         .dev.platform_data      = &pdata,
 541 };
 542
 543 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 544 {
 545         at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
 546         at91_set_multi_drive(AT91_PIN_PB4, 1);
 547
 548         at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
 549         at91_set_multi_drive(AT91_PIN_PB5, 1);
 550
 551         i2c_register_board_info(0, devices, nr_devices);
 552         platform_device_register(&at91sam9263_twi_device);
 553 }
 554
 555 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 556
 557 static struct resource twi_resources[] = {
 558         [0] = {
 559                 .start  = AT91SAM9263_BASE_TWI,
 560                 .end    = AT91SAM9263_BASE_TWI + SZ_16K - 1,
 561                 .flags  = IORESOURCE_MEM,
 562         },
 563         [1] = {
 564                 .start  = AT91SAM9263_ID_TWI,
 565                 .end    = AT91SAM9263_ID_TWI,
 566                 .flags  = IORESOURCE_IRQ,
 567         },
 568 };
 569
 570 static struct platform_device at91sam9263_twi_device = {
 571         .name           = "at91_i2c",
 572         .id             = -1,
 573         .resource       = twi_resources,
 574         .num_resources  = ARRAY_SIZE(twi_resources),
 575 };
 576
 577 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 578 {
 579         /* pins used for TWI interface */
 580         at91_set_A_periph(AT91_PIN_PB4, 0);             /* TWD */
 581         at91_set_multi_drive(AT91_PIN_PB4, 1);
 582
 583         at91_set_A_periph(AT91_PIN_PB5, 0);             /* TWCK */
 584         at91_set_multi_drive(AT91_PIN_PB5, 1);
 585
 586         i2c_register_board_info(0, devices, nr_devices);
 587         platform_device_register(&at91sam9263_twi_device);
 588 }
 589 #else
 590 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 591 #endif
 592
 593
 594 /* --------------------------------------------------------------------
 595  *  SPI
 596  * -------------------------------------------------------------------- */
 597
 598 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 599 static u64 spi_dmamask = DMA_BIT_MASK(32);
 600
 601 static struct resource spi0_resources[] = {
 602         [0] = {
 603                 .start  = AT91SAM9263_BASE_SPI0,
 604                 .end    = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
 605                 .flags  = IORESOURCE_MEM,
 606         },
 607         [1] = {
 608                 .start  = AT91SAM9263_ID_SPI0,
 609                 .end    = AT91SAM9263_ID_SPI0,
 610                 .flags  = IORESOURCE_IRQ,
 611         },
 612 };
 613
 614 static struct platform_device at91sam9263_spi0_device = {
 615         .name           = "atmel_spi",
 616         .id             = 0,
 617         .dev            = {
 618                                 .dma_mask               = &spi_dmamask,
 619                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 620         },
 621         .resource       = spi0_resources,
 622         .num_resources  = ARRAY_SIZE(spi0_resources),
 623 };
 624
 625 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
 626
 627 static struct resource spi1_resources[] = {
 628         [0] = {
 629                 .start  = AT91SAM9263_BASE_SPI1,
 630                 .end    = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
 631                 .flags  = IORESOURCE_MEM,
 632         },
 633         [1] = {
 634                 .start  = AT91SAM9263_ID_SPI1,
 635                 .end    = AT91SAM9263_ID_SPI1,
 636                 .flags  = IORESOURCE_IRQ,
 637         },
 638 };
 639
 640 static struct platform_device at91sam9263_spi1_device = {
 641         .name           = "atmel_spi",
 642         .id             = 1,
 643         .dev            = {
 644                                 .dma_mask               = &spi_dmamask,
 645                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 646         },
 647         .resource       = spi1_resources,
 648         .num_resources  = ARRAY_SIZE(spi1_resources),
 649 };
 650
 651 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
 652
 653 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 654 {
 655         int i;
 656         unsigned long cs_pin;
 657         short enable_spi0 = 0;
 658         short enable_spi1 = 0;
 659
 660         /* Choose SPI chip-selects */
 661         for (i = 0; i < nr_devices; i++) {
 662                 if (devices[i].controller_data)
 663                         cs_pin = (unsigned long) devices[i].controller_data;
 664                 else if (devices[i].bus_num == 0)
 665                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 666                 else
 667                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 668
 669                 if (devices[i].bus_num == 0)
 670                         enable_spi0 = 1;
 671                 else
 672                         enable_spi1 = 1;
 673
 674                 /* enable chip-select pin */
 675                 at91_set_gpio_output(cs_pin, 1);
 676
 677                 /* pass chip-select pin to driver */
 678                 devices[i].controller_data = (void *) cs_pin;
 679         }
 680
 681         spi_register_board_info(devices, nr_devices);
 682
 683         /* Configure SPI bus(es) */
 684         if (enable_spi0) {
 685                 at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 686                 at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 687                 at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 688
 689                 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
 690                 platform_device_register(&at91sam9263_spi0_device);
 691         }
 692         if (enable_spi1) {
 693                 at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
 694                 at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
 695                 at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 696
 697                 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
 698                 platform_device_register(&at91sam9263_spi1_device);
 699         }
 700 }
 701 #else
 702 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 703 #endif
 704
 705
 706 /* --------------------------------------------------------------------
 707  *  AC97
 708  * -------------------------------------------------------------------- */
 709
 710 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
 711 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 712 static struct atmel_ac97_data ac97_data;
 713
 714 static struct resource ac97_resources[] = {
 715         [0] = {
 716                 .start  = AT91SAM9263_BASE_AC97C,
 717                 .end    = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
 718                 .flags  = IORESOURCE_MEM,
 719         },
 720         [1] = {
 721                 .start  = AT91SAM9263_ID_AC97C,
 722                 .end    = AT91SAM9263_ID_AC97C,
 723                 .flags  = IORESOURCE_IRQ,
 724         },
 725 };
 726
 727 static struct platform_device at91sam9263_ac97_device = {
 728         .name           = "ac97c",
 729         .id             = 1,
 730         .dev            = {
 731                                 .dma_mask               = &ac97_dmamask,
 732                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 733                                 .platform_data          = &ac97_data,
 734         },
 735         .resource       = ac97_resources,
 736         .num_resources  = ARRAY_SIZE(ac97_resources),
 737 };
 738
 739 void __init at91_add_device_ac97(struct atmel_ac97_data *data)
 740 {
 741         if (!data)
 742                 return;
 743
 744         at91_set_A_periph(AT91_PIN_PB0, 0);     /* AC97FS */
 745         at91_set_A_periph(AT91_PIN_PB1, 0);     /* AC97CK */
 746         at91_set_A_periph(AT91_PIN_PB2, 0);     /* AC97TX */
 747         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
 748
 749         /* reset */
 750         if (data->reset_pin)
 751                 at91_set_gpio_output(data->reset_pin, 0);
 752
 753         ac97_data = *ek_data;
 754         platform_device_register(&at91sam9263_ac97_device);
 755 }
 756 #else
 757 void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
 758 #endif
 759
 760
 761 /* --------------------------------------------------------------------
 762  *  LCD Controller
 763  * -------------------------------------------------------------------- */
 764
 765 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 766 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 767 static struct atmel_lcdfb_info lcdc_data;
 768
 769 static struct resource lcdc_resources[] = {
 770         [0] = {
 771                 .start  = AT91SAM9263_LCDC_BASE,
 772                 .end    = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
 773                 .flags  = IORESOURCE_MEM,
 774         },
 775         [1] = {
 776                 .start  = AT91SAM9263_ID_LCDC,
 777                 .end    = AT91SAM9263_ID_LCDC,
 778                 .flags  = IORESOURCE_IRQ,
 779         },
 780 };
 781
 782 static struct platform_device at91_lcdc_device = {
 783         .name           = "atmel_lcdfb",
 784         .id             = 0,
 785         .dev            = {
 786                                 .dma_mask               = &lcdc_dmamask,
 787                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 788                                 .platform_data          = &lcdc_data,
 789         },
 790         .resource       = lcdc_resources,
 791         .num_resources  = ARRAY_SIZE(lcdc_resources),
 792 };
 793
 794 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 795 {
 796         if (!data)
 797                 return;
 798
 799         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
 800         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
 801         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
 802         at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
 803         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
 804         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
 805         at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
 806         at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
 807         at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
 808         at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
 809         at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
 810         at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 811         at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 812         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD13 */
 813         at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 814         at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 815         at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
 816         at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
 817         at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
 818         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD21 */
 819         at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
 820         at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
 821
 822         lcdc_data = *data;
 823         platform_device_register(&at91_lcdc_device);
 824 }
 825 #else
 826 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 827 #endif
 828
 829
 830 /* --------------------------------------------------------------------
 831  *  Image Sensor Interface
 832  * -------------------------------------------------------------------- */
 833
 834 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
 835
 836 struct resource isi_resources[] = {
 837         [0] = {
 838                 .start  = AT91SAM9263_BASE_ISI,
 839                 .end    = AT91SAM9263_BASE_ISI + SZ_16K - 1,
 840                 .flags  = IORESOURCE_MEM,
 841         },
 842         [1] = {
 843                 .start  = AT91SAM9263_ID_ISI,
 844                 .end    = AT91SAM9263_ID_ISI,
 845                 .flags  = IORESOURCE_IRQ,
 846         },
 847 };
 848
 849 static struct platform_device at91sam9263_isi_device = {
 850         .name           = "at91_isi",
 851         .id             = -1,
 852         .resource       = isi_resources,
 853         .num_resources  = ARRAY_SIZE(isi_resources),
 854 };
 855
 856 void __init at91_add_device_isi(void)
 857 {
 858         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
 859         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
 860         at91_set_A_periph(AT91_PIN_PE2, 0);     /* ISI_D2 */
 861         at91_set_A_periph(AT91_PIN_PE3, 0);     /* ISI_D3 */
 862         at91_set_A_periph(AT91_PIN_PE4, 0);     /* ISI_D4 */
 863         at91_set_A_periph(AT91_PIN_PE5, 0);     /* ISI_D5 */
 864         at91_set_A_periph(AT91_PIN_PE6, 0);     /* ISI_D6 */
 865         at91_set_A_periph(AT91_PIN_PE7, 0);     /* ISI_D7 */
 866         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
 867         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
 868         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
 869         at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
 870         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
 871         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
 872         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
 873         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
 874 }
 875 #else
 876 void __init at91_add_device_isi(void) {}
 877 #endif
 878
 879
 880 /* --------------------------------------------------------------------
 881  *  Timer/Counter block
 882  * -------------------------------------------------------------------- */
 883
 884 #ifdef CONFIG_ATMEL_TCLIB
 885
 886 static struct resource tcb_resources[] = {
 887         [0] = {
 888                 .start  = AT91SAM9263_BASE_TCB0,
 889                 .end    = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
 890                 .flags  = IORESOURCE_MEM,
 891         },
 892         [1] = {
 893                 .start  = AT91SAM9263_ID_TCB,
 894                 .end    = AT91SAM9263_ID_TCB,
 895                 .flags  = IORESOURCE_IRQ,
 896         },
 897 };
 898
 899 static struct platform_device at91sam9263_tcb_device = {
 900         .name           = "atmel_tcb",
 901         .id             = 0,
 902         .resource       = tcb_resources,
 903         .num_resources  = ARRAY_SIZE(tcb_resources),
 904 };
 905
 906 static void __init at91_add_device_tc(void)
 907 {
 908         /* this chip has one clock and irq for all three TC channels */
 909         at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
 910         platform_device_register(&at91sam9263_tcb_device);
 911 }
 912 #else
 913 static void __init at91_add_device_tc(void) { }
 914 #endif
 915
 916
 917 /* --------------------------------------------------------------------
 918  *  RTT
 919  * -------------------------------------------------------------------- */
 920
 921 static struct resource rtt0_resources[] = {
 922         {
 923                 .start  = AT91_BASE_SYS + AT91_RTT0,
 924                 .end    = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
 925                 .flags  = IORESOURCE_MEM,
 926         }
 927 };
 928
 929 static struct platform_device at91sam9263_rtt0_device = {
 930         .name           = "at91_rtt",
 931         .id             = 0,
 932         .resource       = rtt0_resources,
 933         .num_resources  = ARRAY_SIZE(rtt0_resources),
 934 };
 935
 936 static struct resource rtt1_resources[] = {
 937         {
 938                 .start  = AT91_BASE_SYS + AT91_RTT1,
 939                 .end    = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
 940                 .flags  = IORESOURCE_MEM,
 941         }
 942 };
 943
 944 static struct platform_device at91sam9263_rtt1_device = {
 945         .name           = "at91_rtt",
 946         .id             = 1,
 947         .resource       = rtt1_resources,
 948         .num_resources  = ARRAY_SIZE(rtt1_resources),
 949 };
 950
 951 static void __init at91_add_device_rtt(void)
 952 {
 953         platform_device_register(&at91sam9263_rtt0_device);
 954         platform_device_register(&at91sam9263_rtt1_device);
 955 }
 956
 957
 958 /* --------------------------------------------------------------------
 959  *  Watchdog
 960  * -------------------------------------------------------------------- */
 961
 962 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 963 static struct platform_device at91sam9263_wdt_device = {
 964         .name           = "at91_wdt",
 965         .id             = -1,
 966         .num_resources  = 0,
 967 };
 968
 969 static void __init at91_add_device_watchdog(void)
 970 {
 971         platform_device_register(&at91sam9263_wdt_device);
 972 }
 973 #else
 974 static void __init at91_add_device_watchdog(void) {}
 975 #endif
 976
 977
 978 /* --------------------------------------------------------------------
 979  *  PWM
 980  * --------------------------------------------------------------------*/
 981
 982 #if defined(CONFIG_ATMEL_PWM)
 983 static u32 pwm_mask;
 984
 985 static struct resource pwm_resources[] = {
 986         [0] = {
 987                 .start  = AT91SAM9263_BASE_PWMC,
 988                 .end    = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
 989                 .flags  = IORESOURCE_MEM,
 990         },
 991         [1] = {
 992                 .start  = AT91SAM9263_ID_PWMC,
 993                 .end    = AT91SAM9263_ID_PWMC,
 994                 .flags  = IORESOURCE_IRQ,
 995         },
 996 };
 997
 998 static struct platform_device at91sam9263_pwm0_device = {
 999         .name   = "atmel_pwm",
1000         .id     = -1,
1001         .dev    = {
1002                 .platform_data          = &pwm_mask,
1003         },
1004         .resource       = pwm_resources,
1005         .num_resources  = ARRAY_SIZE(pwm_resources),
1006 };
1007
1008 void __init at91_add_device_pwm(u32 mask)
1009 {
1010         if (mask & (1 << AT91_PWM0))
1011                 at91_set_B_periph(AT91_PIN_PB7, 1);     /* enable PWM0 */
1012
1013         if (mask & (1 << AT91_PWM1))
1014                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
1015
1016         if (mask & (1 << AT91_PWM2))
1017                 at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
1018
1019         if (mask & (1 << AT91_PWM3))
1020                 at91_set_B_periph(AT91_PIN_PB29, 1);    /* enable PWM3 */
1021
1022         pwm_mask = mask;
1023
1024         platform_device_register(&at91sam9263_pwm0_device);
1025 }
1026 #else
1027 void __init at91_add_device_pwm(u32 mask) {}
1028 #endif
1029
1030
1031 /* --------------------------------------------------------------------
1032  *  SSC -- Synchronous Serial Controller
1033  * -------------------------------------------------------------------- */
1034
1035 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1036 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1037
1038 static struct resource ssc0_resources[] = {
1039         [0] = {
1040                 .start  = AT91SAM9263_BASE_SSC0,
1041                 .end    = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1042                 .flags  = IORESOURCE_MEM,
1043         },
1044         [1] = {
1045                 .start  = AT91SAM9263_ID_SSC0,
1046                 .end    = AT91SAM9263_ID_SSC0,
1047                 .flags  = IORESOURCE_IRQ,
1048         },
1049 };
1050
1051 static struct platform_device at91sam9263_ssc0_device = {
1052         .name   = "ssc",
1053         .id     = 0,
1054         .dev    = {
1055                 .dma_mask               = &ssc0_dmamask,
1056                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1057         },
1058         .resource       = ssc0_resources,
1059         .num_resources  = ARRAY_SIZE(ssc0_resources),
1060 };
1061
1062 static inline void configure_ssc0_pins(unsigned pins)
1063 {
1064         if (pins & ATMEL_SSC_TF)
1065                 at91_set_B_periph(AT91_PIN_PB0, 1);
1066         if (pins & ATMEL_SSC_TK)
1067                 at91_set_B_periph(AT91_PIN_PB1, 1);
1068         if (pins & ATMEL_SSC_TD)
1069                 at91_set_B_periph(AT91_PIN_PB2, 1);
1070         if (pins & ATMEL_SSC_RD)
1071                 at91_set_B_periph(AT91_PIN_PB3, 1);
1072         if (pins & ATMEL_SSC_RK)
1073                 at91_set_B_periph(AT91_PIN_PB4, 1);
1074         if (pins & ATMEL_SSC_RF)
1075                 at91_set_B_periph(AT91_PIN_PB5, 1);
1076 }
1077
1078 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1079
1080 static struct resource ssc1_resources[] = {
1081         [0] = {
1082                 .start  = AT91SAM9263_BASE_SSC1,
1083                 .end    = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1084                 .flags  = IORESOURCE_MEM,
1085         },
1086         [1] = {
1087                 .start  = AT91SAM9263_ID_SSC1,
1088                 .end    = AT91SAM9263_ID_SSC1,
1089                 .flags  = IORESOURCE_IRQ,
1090         },
1091 };
1092
1093 static struct platform_device at91sam9263_ssc1_device = {
1094         .name   = "ssc",
1095         .id     = 1,
1096         .dev    = {
1097                 .dma_mask               = &ssc1_dmamask,
1098                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1099         },
1100         .resource       = ssc1_resources,
1101         .num_resources  = ARRAY_SIZE(ssc1_resources),
1102 };
1103
1104 static inline void configure_ssc1_pins(unsigned pins)
1105 {
1106         if (pins & ATMEL_SSC_TF)
1107                 at91_set_A_periph(AT91_PIN_PB6, 1);
1108         if (pins & ATMEL_SSC_TK)
1109                 at91_set_A_periph(AT91_PIN_PB7, 1);
1110         if (pins & ATMEL_SSC_TD)
1111                 at91_set_A_periph(AT91_PIN_PB8, 1);
1112         if (pins & ATMEL_SSC_RD)
1113                 at91_set_A_periph(AT91_PIN_PB9, 1);
1114         if (pins & ATMEL_SSC_RK)
1115                 at91_set_A_periph(AT91_PIN_PB10, 1);
1116         if (pins & ATMEL_SSC_RF)
1117                 at91_set_A_periph(AT91_PIN_PB11, 1);
1118 }
1119
1120 /*
1121  * SSC controllers are accessed through library code, instead of any
1122  * kind of all-singing/all-dancing driver.  For example one could be
1123  * used by a particular I2S audio codec's driver, while another one
1124  * on the same system might be used by a custom data capture driver.
1125  */
1126 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1127 {
1128         struct platform_device *pdev;
1129
1130         /*
1131          * NOTE: caller is responsible for passing information matching
1132          * "pins" to whatever will be using each particular controller.
1133          */
1134         switch (id) {
1135         case AT91SAM9263_ID_SSC0:
1136                 pdev = &at91sam9263_ssc0_device;
1137                 configure_ssc0_pins(pins);
1138                 at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
1139                 break;
1140         case AT91SAM9263_ID_SSC1:
1141                 pdev = &at91sam9263_ssc1_device;
1142                 configure_ssc1_pins(pins);
1143                 at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
1144                 break;
1145         default:
1146                 return;
1147         }
1148
1149         platform_device_register(pdev);
1150 }
1151
1152 #else
1153 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1154 #endif
1155
1156
1157 /* --------------------------------------------------------------------
1158  *  UART
1159  * -------------------------------------------------------------------- */
1160
1161 #if defined(CONFIG_SERIAL_ATMEL)
1162
1163 static struct resource dbgu_resources[] = {
1164         [0] = {
1165                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
1166                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1167                 .flags  = IORESOURCE_MEM,
1168         },
1169         [1] = {
1170                 .start  = AT91_ID_SYS,
1171                 .end    = AT91_ID_SYS,
1172                 .flags  = IORESOURCE_IRQ,
1173         },
1174 };
1175
1176 static struct atmel_uart_data dbgu_data = {
1177         .use_dma_tx     = 0,
1178         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
1179         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1180 };
1181
1182 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1183
1184 static struct platform_device at91sam9263_dbgu_device = {
1185         .name           = "atmel_usart",
1186         .id             = 0,
1187         .dev            = {
1188                                 .dma_mask               = &dbgu_dmamask,
1189                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1190                                 .platform_data          = &dbgu_data,
1191         },
1192         .resource       = dbgu_resources,
1193         .num_resources  = ARRAY_SIZE(dbgu_resources),
1194 };
1195
1196 static inline void configure_dbgu_pins(void)
1197 {
1198         at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
1199         at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
1200 }
1201
1202 static struct resource uart0_resources[] = {
1203         [0] = {
1204                 .start  = AT91SAM9263_BASE_US0,
1205                 .end    = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1206                 .flags  = IORESOURCE_MEM,
1207         },
1208         [1] = {
1209                 .start  = AT91SAM9263_ID_US0,
1210                 .end    = AT91SAM9263_ID_US0,
1211                 .flags  = IORESOURCE_IRQ,
1212         },
1213 };
1214
1215 static struct atmel_uart_data uart0_data = {
1216         .use_dma_tx     = 1,
1217         .use_dma_rx     = 1,
1218 };
1219
1220 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1221
1222 static struct platform_device at91sam9263_uart0_device = {
1223         .name           = "atmel_usart",
1224         .id             = 1,
1225         .dev            = {
1226                                 .dma_mask               = &uart0_dmamask,
1227                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1228                                 .platform_data          = &uart0_data,
1229         },
1230         .resource       = uart0_resources,
1231         .num_resources  = ARRAY_SIZE(uart0_resources),
1232 };
1233
1234 static inline void configure_usart0_pins(unsigned pins)
1235 {
1236         at91_set_A_periph(AT91_PIN_PA26, 1);            /* TXD0 */
1237         at91_set_A_periph(AT91_PIN_PA27, 0);            /* RXD0 */
1238
1239         if (pins & ATMEL_UART_RTS)
1240                 at91_set_A_periph(AT91_PIN_PA28, 0);    /* RTS0 */
1241         if (pins & ATMEL_UART_CTS)
1242                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* CTS0 */
1243 }
1244
1245 static struct resource uart1_resources[] = {
1246         [0] = {
1247                 .start  = AT91SAM9263_BASE_US1,
1248                 .end    = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1249                 .flags  = IORESOURCE_MEM,
1250         },
1251         [1] = {
1252                 .start  = AT91SAM9263_ID_US1,
1253                 .end    = AT91SAM9263_ID_US1,
1254                 .flags  = IORESOURCE_IRQ,
1255         },
1256 };
1257
1258 static struct atmel_uart_data uart1_data = {
1259         .use_dma_tx     = 1,
1260         .use_dma_rx     = 1,
1261 };
1262
1263 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1264
1265 static struct platform_device at91sam9263_uart1_device = {
1266         .name           = "atmel_usart",
1267         .id             = 2,
1268         .dev            = {
1269                                 .dma_mask               = &uart1_dmamask,
1270                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1271                                 .platform_data          = &uart1_data,
1272         },
1273         .resource       = uart1_resources,
1274         .num_resources  = ARRAY_SIZE(uart1_resources),
1275 };
1276
1277 static inline void configure_usart1_pins(unsigned pins)
1278 {
1279         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
1280         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
1281
1282         if (pins & ATMEL_UART_RTS)
1283                 at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
1284         if (pins & ATMEL_UART_CTS)
1285                 at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
1286 }
1287
1288 static struct resource uart2_resources[] = {
1289         [0] = {
1290                 .start  = AT91SAM9263_BASE_US2,
1291                 .end    = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1292                 .flags  = IORESOURCE_MEM,
1293         },
1294         [1] = {
1295                 .start  = AT91SAM9263_ID_US2,
1296                 .end    = AT91SAM9263_ID_US2,
1297                 .flags  = IORESOURCE_IRQ,
1298         },
1299 };
1300
1301 static struct atmel_uart_data uart2_data = {
1302         .use_dma_tx     = 1,
1303         .use_dma_rx     = 1,
1304 };
1305
1306 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1307
1308 static struct platform_device at91sam9263_uart2_device = {
1309         .name           = "atmel_usart",
1310         .id             = 3,
1311         .dev            = {
1312                                 .dma_mask               = &uart2_dmamask,
1313                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1314                                 .platform_data          = &uart2_data,
1315         },
1316         .resource       = uart2_resources,
1317         .num_resources  = ARRAY_SIZE(uart2_resources),
1318 };
1319
1320 static inline void configure_usart2_pins(unsigned pins)
1321 {
1322         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
1323         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
1324
1325         if (pins & ATMEL_UART_RTS)
1326                 at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
1327         if (pins & ATMEL_UART_CTS)
1328                 at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
1329 }
1330
1331 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1332 struct platform_device *atmel_default_console_device;   /* the serial console device */
1333
1334 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1335 {
1336         struct platform_device *pdev;
1337
1338         switch (id) {
1339                 case 0:         /* DBGU */
1340                         pdev = &at91sam9263_dbgu_device;
1341                         configure_dbgu_pins();
1342                         at91_clock_associate("mck", &pdev->dev, "usart");
1343                         break;
1344                 case AT91SAM9263_ID_US0:
1345                         pdev = &at91sam9263_uart0_device;
1346                         configure_usart0_pins(pins);
1347                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1348                         break;
1349                 case AT91SAM9263_ID_US1:
1350                         pdev = &at91sam9263_uart1_device;
1351                         configure_usart1_pins(pins);
1352                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1353                         break;
1354                 case AT91SAM9263_ID_US2:
1355                         pdev = &at91sam9263_uart2_device;
1356                         configure_usart2_pins(pins);
1357                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1358                         break;
1359                 default:
1360                         return;
1361         }
1362         pdev->id = portnr;              /* update to mapped ID */
1363
1364         if (portnr < ATMEL_MAX_UART)
1365                 at91_uarts[portnr] = pdev;
1366 }
1367
1368 void __init at91_set_serial_console(unsigned portnr)
1369 {
1370         if (portnr < ATMEL_MAX_UART)
1371                 atmel_default_console_device = at91_uarts[portnr];
1372 }
1373
1374 void __init at91_add_device_serial(void)
1375 {
1376         int i;
1377
1378         for (i = 0; i < ATMEL_MAX_UART; i++) {
1379                 if (at91_uarts[i])
1380                         platform_device_register(at91_uarts[i]);
1381         }
1382
1383         if (!atmel_default_console_device)
1384                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1385 }
1386 #else
1387 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1388 void __init at91_set_serial_console(unsigned portnr) {}
1389 void __init at91_add_device_serial(void) {}
1390 #endif
1391
1392
1393 /* -------------------------------------------------------------------- */
1394 /*
1395  * These devices are always present and don't need any board-specific
1396  * setup.
1397  */
1398 static int __init at91_add_standard_devices(void)
1399 {
1400         at91_add_device_rtt();
1401         at91_add_device_watchdog();
1402         at91_add_device_tc();
1403         return 0;
1404 }
1405
1406 arch_initcall(at91_add_standard_devices);