1 /* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
2 * Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
5 #ifndef _ASM_PARISC_ATOMIC_H_
6 #define _ASM_PARISC_ATOMIC_H_
8 #include <linux/types.h>
9 #include <asm/system.h>
12 * Atomic operations that C can't guarantee us. Useful for
13 * resource counting etc..
15 * And probably incredibly slow on parisc. OTOH, we don't
16 * have to write any serious assembly. prumpf
20 #include <asm/spinlock.h>
21 #include <asm/cache.h> /* we use L1_CACHE_BYTES */
23 /* Use an array of spinlocks for our atomic_ts.
24 * Hash function to index into a different SPINLOCK.
25 * Since "a" is usually an address, use one spinlock per cacheline.
27 # define ATOMIC_HASH_SIZE 4
28 # define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
30 extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
32 /* Can't use raw_spin_lock_irq because of #include problems, so
33 * this is the substitute */
34 #define _atomic_spin_lock_irqsave(l,f) do { \
35 raw_spinlock_t *s = ATOMIC_HASH(l); \
40 #define _atomic_spin_unlock_irqrestore(l,f) do { \
41 raw_spinlock_t *s = ATOMIC_HASH(l); \
42 __raw_spin_unlock(s); \
43 local_irq_restore(f); \
48 # define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
49 # define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
52 /* This should get optimized out since it's never called.
53 ** Or get a link error if xchg is used "wrong".
55 extern void __xchg_called_with_bad_pointer(void);
58 /* __xchg32/64 defined in arch/parisc/lib/bitops.c */
59 extern unsigned long __xchg8(char, char *);
60 extern unsigned long __xchg32(int, int *);
62 extern unsigned long __xchg64(unsigned long, unsigned long *);
65 /* optimizer better get rid of switch since size is a constant */
66 static __inline__ unsigned long
67 __xchg(unsigned long x, __volatile__ void * ptr, int size)
71 case 8: return __xchg64(x,(unsigned long *) ptr);
73 case 4: return __xchg32((int) x, (int *) ptr);
74 case 1: return __xchg8((char) x, (char *) ptr);
76 __xchg_called_with_bad_pointer();
82 ** REVISIT - Abandoned use of LDCW in xchg() for now:
83 ** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
84 ** o and while we are at it, could CONFIG_64BIT code use LDCD too?
86 ** if (__builtin_constant_p(x) && (x == NULL))
87 ** if (((unsigned long)p & 0xf) == 0)
91 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
94 #define __HAVE_ARCH_CMPXCHG 1
96 /* bug catcher for when unsupported size is used - won't link */
97 extern void __cmpxchg_called_with_bad_pointer(void);
99 /* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
100 extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
101 extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
103 /* don't worry...optimizer will get rid of most of this */
104 static __inline__ unsigned long
105 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
109 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
111 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
113 __cmpxchg_called_with_bad_pointer();
117 #define cmpxchg(ptr,o,n) \
119 __typeof__(*(ptr)) _o_ = (o); \
120 __typeof__(*(ptr)) _n_ = (n); \
121 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
122 (unsigned long)_n_, sizeof(*(ptr))); \
125 #include <asm-generic/cmpxchg-local.h>
127 static inline unsigned long __cmpxchg_local(volatile void *ptr,
129 unsigned long new_, int size)
133 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
135 case 4: return __cmpxchg_u32(ptr, old, new_);
137 return __cmpxchg_local_generic(ptr, old, new_, size);
142 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
145 #define cmpxchg_local(ptr, o, n) \
146 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
147 (unsigned long)(n), sizeof(*(ptr))))
149 #define cmpxchg64_local(ptr, o, n) \
151 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
152 cmpxchg_local((ptr), (o), (n)); \
155 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
158 /* Note that we need not lock read accesses - aligned word writes/reads
159 * are atomic, so a reader never sees unconsistent values.
161 * Cache-line alignment would conflict with, for example, linux/module.h
164 typedef struct { volatile int counter; } atomic_t;
166 /* It's possible to reduce all atomic operations to either
167 * __atomic_add_return, atomic_set and atomic_read (the latter
168 * is there only for consistency).
171 static __inline__ int __atomic_add_return(int i, atomic_t *v)
175 _atomic_spin_lock_irqsave(v, flags);
177 ret = (v->counter += i);
179 _atomic_spin_unlock_irqrestore(v, flags);
183 static __inline__ void atomic_set(atomic_t *v, int i)
186 _atomic_spin_lock_irqsave(v, flags);
190 _atomic_spin_unlock_irqrestore(v, flags);
193 static __inline__ int atomic_read(const atomic_t *v)
198 /* exported interface */
199 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
200 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
203 * atomic_add_unless - add unless the number is a given value
204 * @v: pointer of type atomic_t
205 * @a: the amount to add to v...
206 * @u: ...unless v is equal to u.
208 * Atomically adds @a to @v, so long as it was not @u.
209 * Returns non-zero if @v was not @u, and zero otherwise.
211 static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
216 if (unlikely(c == (u)))
218 old = atomic_cmpxchg((v), c, c + (a));
219 if (likely(old == c))
226 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
228 #define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
229 #define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
230 #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
231 #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
233 #define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v)))
234 #define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v)))
235 #define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
236 #define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
238 #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
241 * atomic_inc_and_test - increment and test
242 * @v: pointer of type atomic_t
244 * Atomically increments @v by 1
245 * and returns true if the result is zero, or false for all
248 #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
250 #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
252 #define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
254 #define ATOMIC_INIT(i) ((atomic_t) { (i) })
256 #define smp_mb__before_atomic_dec() smp_mb()
257 #define smp_mb__after_atomic_dec() smp_mb()
258 #define smp_mb__before_atomic_inc() smp_mb()
259 #define smp_mb__after_atomic_inc() smp_mb()
263 typedef struct { volatile s64 counter; } atomic64_t;
265 #define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
267 static __inline__ int
268 __atomic64_add_return(s64 i, atomic64_t *v)
272 _atomic_spin_lock_irqsave(v, flags);
274 ret = (v->counter += i);
276 _atomic_spin_unlock_irqrestore(v, flags);
280 static __inline__ void
281 atomic64_set(atomic64_t *v, s64 i)
284 _atomic_spin_lock_irqsave(v, flags);
288 _atomic_spin_unlock_irqrestore(v, flags);
291 static __inline__ s64
292 atomic64_read(const atomic64_t *v)
297 #define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v))))
298 #define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v))))
299 #define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v))))
300 #define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v))))
302 #define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v)))
303 #define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v)))
304 #define atomic64_inc_return(v) (__atomic64_add_return( 1,(v)))
305 #define atomic64_dec_return(v) (__atomic64_add_return( -1,(v)))
307 #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
309 #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
310 #define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
311 #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
313 /* exported interface */
314 #define atomic64_cmpxchg(v, o, n) \
315 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
316 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
319 * atomic64_add_unless - add unless the number is a given value
320 * @v: pointer of type atomic64_t
321 * @a: the amount to add to v...
322 * @u: ...unless v is equal to u.
324 * Atomically adds @a to @v, so long as it was not @u.
325 * Returns non-zero if @v was not @u, and zero otherwise.
327 static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
330 c = atomic64_read(v);
332 if (unlikely(c == (u)))
334 old = atomic64_cmpxchg((v), c, c + (a));
335 if (likely(old == c))
342 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
344 #endif /* CONFIG_64BIT */
346 #include <asm-generic/atomic.h>
348 #endif /* _ASM_PARISC_ATOMIC_H_ */