2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
55 #include <video/edid.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
65 #include <asm/sections.h>
72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
73 EXPORT_SYMBOL(boot_cpu_data);
75 unsigned long mmu_cr4_features;
78 EXPORT_SYMBOL(acpi_disabled);
80 int acpi_numa __initdata;
82 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
85 unsigned long saved_video_mode;
91 char dmi_alloc_data[DMI_MAX_DATA];
96 struct screen_info screen_info;
97 EXPORT_SYMBOL(screen_info);
98 struct sys_desc_table_struct {
99 unsigned short length;
100 unsigned char table[0];
103 struct edid_info edid_info;
104 EXPORT_SYMBOL_GPL(edid_info);
107 extern int root_mountflags;
109 char command_line[COMMAND_LINE_SIZE];
111 struct resource standard_io_resources[] = {
112 { .name = "dma1", .start = 0x00, .end = 0x1f,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "pic1", .start = 0x20, .end = 0x21,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer0", .start = 0x40, .end = 0x43,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "timer1", .start = 0x50, .end = 0x53,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "keyboard", .start = 0x60, .end = 0x6f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "pic2", .start = 0xa0, .end = 0xa1,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "dma2", .start = 0xc0, .end = 0xdf,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "fpu", .start = 0xf0, .end = 0xff,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
132 #define STANDARD_IO_RESOURCES \
133 (sizeof standard_io_resources / sizeof standard_io_resources[0])
135 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
137 struct resource data_resource = {
138 .name = "Kernel data",
141 .flags = IORESOURCE_RAM,
143 struct resource code_resource = {
144 .name = "Kernel code",
147 .flags = IORESOURCE_RAM,
150 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
152 static struct resource system_rom_resource = {
153 .name = "System ROM",
156 .flags = IORESOURCE_ROM,
159 static struct resource extension_rom_resource = {
160 .name = "Extension ROM",
163 .flags = IORESOURCE_ROM,
166 static struct resource adapter_rom_resources[] = {
167 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM }
181 #define ADAPTER_ROM_RESOURCES \
182 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
184 static struct resource video_rom_resource = {
188 .flags = IORESOURCE_ROM,
191 static struct resource video_ram_resource = {
192 .name = "Video RAM area",
195 .flags = IORESOURCE_RAM,
198 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
200 static int __init romchecksum(unsigned char *rom, unsigned long length)
202 unsigned char *p, sum = 0;
204 for (p = rom; p < rom + length; p++)
209 static void __init probe_roms(void)
211 unsigned long start, length, upper;
216 upper = adapter_rom_resources[0].start;
217 for (start = video_rom_resource.start; start < upper; start += 2048) {
218 rom = isa_bus_to_virt(start);
219 if (!romsignature(rom))
222 video_rom_resource.start = start;
224 /* 0 < length <= 0x7f * 512, historically */
225 length = rom[2] * 512;
227 /* if checksum okay, trust length byte */
228 if (length && romchecksum(rom, length))
229 video_rom_resource.end = start + length - 1;
231 request_resource(&iomem_resource, &video_rom_resource);
235 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
240 request_resource(&iomem_resource, &system_rom_resource);
241 upper = system_rom_resource.start;
243 /* check for extension rom (ignore length byte!) */
244 rom = isa_bus_to_virt(extension_rom_resource.start);
245 if (romsignature(rom)) {
246 length = extension_rom_resource.end - extension_rom_resource.start + 1;
247 if (romchecksum(rom, length)) {
248 request_resource(&iomem_resource, &extension_rom_resource);
249 upper = extension_rom_resource.start;
253 /* check for adapter roms on 2k boundaries */
254 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
255 rom = isa_bus_to_virt(start);
256 if (!romsignature(rom))
259 /* 0 < length <= 0x7f * 512, historically */
260 length = rom[2] * 512;
262 /* but accept any length that fits if checksum okay */
263 if (!length || start + length > upper || !romchecksum(rom, length))
266 adapter_rom_resources[i].start = start;
267 adapter_rom_resources[i].end = start + length - 1;
268 request_resource(&iomem_resource, &adapter_rom_resources[i]);
270 start = adapter_rom_resources[i++].end & ~2047UL;
274 #ifdef CONFIG_PROC_VMCORE
275 /* elfcorehdr= specifies the location of elf core header
276 * stored by the crashed kernel. This option will be passed
277 * by kexec loader to the capture kernel.
279 static int __init setup_elfcorehdr(char *arg)
284 elfcorehdr_addr = memparse(arg, &end);
285 return end > arg ? 0 : -EINVAL;
287 early_param("elfcorehdr", setup_elfcorehdr);
292 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
294 unsigned long bootmap_size, bootmap;
296 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
297 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
299 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
300 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
301 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
302 reserve_bootmem(bootmap, bootmap_size);
306 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
308 #ifdef CONFIG_EDD_MODULE
312 * copy_edd() - Copy the BIOS EDD information
313 * from boot_params into a safe place.
316 static inline void copy_edd(void)
318 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
319 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
320 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
321 edd.edd_info_nr = EDD_NR;
324 static inline void copy_edd(void)
329 #define EBDA_ADDR_POINTER 0x40E
331 unsigned __initdata ebda_addr;
332 unsigned __initdata ebda_size;
334 static void discover_ebda(void)
337 * there is a real-mode segmented pointer pointing to the
338 * 4K EBDA area at 0x40E
340 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
343 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
345 /* Round EBDA up to pages */
349 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
350 if (ebda_size > 64*1024)
354 void __init setup_arch(char **cmdline_p)
356 printk(KERN_INFO "Command line: %s\n", saved_command_line);
358 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
359 screen_info = SCREEN_INFO;
360 edid_info = EDID_INFO;
361 saved_video_mode = SAVED_VIDEO_MODE;
362 bootloader_type = LOADER_TYPE;
364 #ifdef CONFIG_BLK_DEV_RAM
365 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
366 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
367 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
369 setup_memory_region();
372 if (!MOUNT_ROOT_RDONLY)
373 root_mountflags &= ~MS_RDONLY;
374 init_mm.start_code = (unsigned long) &_text;
375 init_mm.end_code = (unsigned long) &_etext;
376 init_mm.end_data = (unsigned long) &_edata;
377 init_mm.brk = (unsigned long) &_end;
379 code_resource.start = virt_to_phys(&_text);
380 code_resource.end = virt_to_phys(&_etext)-1;
381 data_resource.start = virt_to_phys(&_etext);
382 data_resource.end = virt_to_phys(&_edata)-1;
384 early_identify_cpu(&boot_cpu_data);
386 strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
387 *cmdline_p = command_line;
391 finish_e820_parsing();
394 * partially used pages are not usable - thus
395 * we are rounding upwards:
397 end_pfn = e820_end_of_ram();
398 num_physpages = end_pfn;
404 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
412 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
413 * Call this early for SRAT node setup.
415 acpi_boot_table_init();
418 /* How many end-of-memory variables you have, grandma! */
419 max_low_pfn = end_pfn;
421 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
423 #ifdef CONFIG_ACPI_NUMA
425 * Parse SRAT to discover nodes.
431 numa_initmem_init(0, end_pfn);
433 contig_initmem_init(0, end_pfn);
436 /* Reserve direct mapping */
437 reserve_bootmem_generic(table_start << PAGE_SHIFT,
438 (table_end - table_start) << PAGE_SHIFT);
441 reserve_bootmem_generic(__pa_symbol(&_text),
442 __pa_symbol(&_end) - __pa_symbol(&_text));
445 * reserve physical page 0 - it's a special BIOS page on many boxes,
446 * enabling clean reboots, SMP operation, laptop functions.
448 reserve_bootmem_generic(0, PAGE_SIZE);
450 /* reserve ebda region */
452 reserve_bootmem_generic(ebda_addr, ebda_size);
456 * But first pinch a few for the stack/trampoline stuff
457 * FIXME: Don't need the extra page at 4K, but need to fix
458 * trampoline before removing it. (see the GDT stuff)
460 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
462 /* Reserve SMP trampoline */
463 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
466 #ifdef CONFIG_ACPI_SLEEP
468 * Reserve low memory region for sleep support.
470 acpi_reserve_bootmem();
473 * Find and reserve possible boot-time SMP configuration:
476 #ifdef CONFIG_BLK_DEV_INITRD
477 if (LOADER_TYPE && INITRD_START) {
478 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
479 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
481 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
482 initrd_end = initrd_start+INITRD_SIZE;
485 printk(KERN_ERR "initrd extends beyond end of memory "
486 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
487 (unsigned long)(INITRD_START + INITRD_SIZE),
488 (unsigned long)(end_pfn << PAGE_SHIFT));
494 if (crashk_res.start != crashk_res.end) {
495 reserve_bootmem_generic(crashk_res.start,
496 crashk_res.end - crashk_res.start + 1);
505 * set this early, so we dont allocate cpu0
506 * if MADT list doesnt list BSP first
507 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
509 cpu_set(0, cpu_present_map);
512 * Read APIC and some other early information from ACPI tables.
520 * get boot-time SMP configuration:
522 if (smp_found_config)
524 init_apic_mappings();
527 * Request address space for all standard RAM and ROM resources
528 * and also for regions reported as reserved by the e820.
531 e820_reserve_resources();
533 request_resource(&iomem_resource, &video_ram_resource);
537 /* request I/O space for devices used on all i[345]86 PCs */
538 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
539 request_resource(&ioport_resource, &standard_io_resources[i]);
545 #if defined(CONFIG_VGA_CONSOLE)
546 conswitchp = &vga_con;
547 #elif defined(CONFIG_DUMMY_CONSOLE)
548 conswitchp = &dummy_con;
553 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
557 if (c->extended_cpuid_level < 0x80000004)
560 v = (unsigned int *) c->x86_model_id;
561 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
562 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
563 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
564 c->x86_model_id[48] = 0;
569 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
571 unsigned int n, dummy, eax, ebx, ecx, edx;
573 n = c->extended_cpuid_level;
575 if (n >= 0x80000005) {
576 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
577 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
578 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
579 c->x86_cache_size=(ecx>>24)+(edx>>24);
580 /* On K8 L1 TLB is inclusive, so don't count it */
584 if (n >= 0x80000006) {
585 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
586 ecx = cpuid_ecx(0x80000006);
587 c->x86_cache_size = ecx >> 16;
588 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
590 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
591 c->x86_cache_size, ecx & 0xFF);
595 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
596 if (n >= 0x80000008) {
597 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
598 c->x86_virt_bits = (eax >> 8) & 0xff;
599 c->x86_phys_bits = eax & 0xff;
604 static int nearby_node(int apicid)
607 for (i = apicid - 1; i >= 0; i--) {
608 int node = apicid_to_node[i];
609 if (node != NUMA_NO_NODE && node_online(node))
612 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
613 int node = apicid_to_node[i];
614 if (node != NUMA_NO_NODE && node_online(node))
617 return first_node(node_online_map); /* Shouldn't happen */
622 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
623 * Assumes number of cores is a power of two.
625 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
630 int cpu = smp_processor_id();
632 unsigned apicid = hard_smp_processor_id();
634 unsigned ecx = cpuid_ecx(0x80000008);
636 c->x86_max_cores = (ecx & 0xff) + 1;
638 /* CPU telling us the core id bits shift? */
639 bits = (ecx >> 12) & 0xF;
641 /* Otherwise recompute */
643 while ((1 << bits) < c->x86_max_cores)
647 /* Low order bits define the core id (index of core in socket) */
648 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
649 /* Convert the APIC ID into the socket ID */
650 c->phys_proc_id = phys_pkg_id(bits);
653 node = c->phys_proc_id;
654 if (apicid_to_node[apicid] != NUMA_NO_NODE)
655 node = apicid_to_node[apicid];
656 if (!node_online(node)) {
657 /* Two possibilities here:
658 - The CPU is missing memory and no node was created.
659 In that case try picking one from a nearby CPU
660 - The APIC IDs differ from the HyperTransport node IDs
661 which the K8 northbridge parsing fills in.
662 Assume they are all increased by a constant offset,
663 but in the same order as the HT nodeids.
664 If that doesn't result in a usable node fall back to the
665 path for the previous case. */
666 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
667 if (ht_nodeid >= 0 &&
668 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
669 node = apicid_to_node[ht_nodeid];
670 /* Pick a nearby node */
671 if (!node_online(node))
672 node = nearby_node(apicid);
674 numa_set_node(cpu, node);
676 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
681 static void __init init_amd(struct cpuinfo_x86 *c)
689 * Disable TLB flush filter by setting HWCR.FFDIS on K8
690 * bit 6 of msr C001_0015
692 * Errata 63 for SH-B3 steppings
693 * Errata 122 for all steppings (F+ have it disabled by default)
696 rdmsrl(MSR_K8_HWCR, value);
698 wrmsrl(MSR_K8_HWCR, value);
702 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
703 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
704 clear_bit(0*32+31, &c->x86_capability);
706 /* On C+ stepping K8 rep microcode works well for copy/memset */
707 level = cpuid_eax(1);
708 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
709 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
711 /* Enable workaround for FXSAVE leak */
713 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
715 level = get_model_name(c);
719 /* Should distinguish Models here, but this is only
720 a fallback anyways. */
721 strcpy(c->x86_model_id, "Hammer");
725 display_cacheinfo(c);
727 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
728 if (c->x86_power & (1<<8))
729 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
731 /* Multi core CPU? */
732 if (c->extended_cpuid_level >= 0x80000008)
735 /* Fix cpuid4 emulation for more */
736 num_cache_leaves = 3;
739 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
742 u32 eax, ebx, ecx, edx;
743 int index_msb, core_bits;
745 cpuid(1, &eax, &ebx, &ecx, &edx);
748 if (!cpu_has(c, X86_FEATURE_HT))
750 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
753 smp_num_siblings = (ebx & 0xff0000) >> 16;
755 if (smp_num_siblings == 1) {
756 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
757 } else if (smp_num_siblings > 1 ) {
759 if (smp_num_siblings > NR_CPUS) {
760 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
761 smp_num_siblings = 1;
765 index_msb = get_count_order(smp_num_siblings);
766 c->phys_proc_id = phys_pkg_id(index_msb);
768 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
770 index_msb = get_count_order(smp_num_siblings) ;
772 core_bits = get_count_order(c->x86_max_cores);
774 c->cpu_core_id = phys_pkg_id(index_msb) &
775 ((1 << core_bits) - 1);
778 if ((c->x86_max_cores * smp_num_siblings) > 1) {
779 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
780 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
787 * find out the number of processor cores on the die
789 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
793 if (c->cpuid_level < 4)
796 cpuid_count(4, 0, &eax, &t, &t, &t);
799 return ((eax >> 26) + 1);
804 static void srat_detect_node(void)
808 int cpu = smp_processor_id();
809 int apicid = hard_smp_processor_id();
811 /* Don't do the funky fallback heuristics the AMD version employs
813 node = apicid_to_node[apicid];
814 if (node == NUMA_NO_NODE)
815 node = first_node(node_online_map);
816 numa_set_node(cpu, node);
819 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
823 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
828 init_intel_cacheinfo(c);
829 if (c->cpuid_level > 9 ) {
830 unsigned eax = cpuid_eax(10);
831 /* Check for version and the number of counters */
832 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
833 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
836 n = c->extended_cpuid_level;
837 if (n >= 0x80000008) {
838 unsigned eax = cpuid_eax(0x80000008);
839 c->x86_virt_bits = (eax >> 8) & 0xff;
840 c->x86_phys_bits = eax & 0xff;
841 /* CPUID workaround for Intel 0F34 CPU */
842 if (c->x86_vendor == X86_VENDOR_INTEL &&
843 c->x86 == 0xF && c->x86_model == 0x3 &&
845 c->x86_phys_bits = 36;
849 c->x86_cache_alignment = c->x86_clflush_size * 2;
850 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
851 (c->x86 == 0x6 && c->x86_model >= 0x0e))
852 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
853 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
854 c->x86_max_cores = intel_num_cpu_cores(c);
859 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
861 char *v = c->x86_vendor_id;
863 if (!strcmp(v, "AuthenticAMD"))
864 c->x86_vendor = X86_VENDOR_AMD;
865 else if (!strcmp(v, "GenuineIntel"))
866 c->x86_vendor = X86_VENDOR_INTEL;
868 c->x86_vendor = X86_VENDOR_UNKNOWN;
871 struct cpu_model_info {
874 char *model_names[16];
877 /* Do some early cpuid on the boot CPU to get some parameter that are
878 needed before check_bugs. Everything advanced is in identify_cpu
880 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
884 c->loops_per_jiffy = loops_per_jiffy;
885 c->x86_cache_size = -1;
886 c->x86_vendor = X86_VENDOR_UNKNOWN;
887 c->x86_model = c->x86_mask = 0; /* So far unknown... */
888 c->x86_vendor_id[0] = '\0'; /* Unset */
889 c->x86_model_id[0] = '\0'; /* Unset */
890 c->x86_clflush_size = 64;
891 c->x86_cache_alignment = c->x86_clflush_size;
892 c->x86_max_cores = 1;
893 c->extended_cpuid_level = 0;
894 memset(&c->x86_capability, 0, sizeof c->x86_capability);
896 /* Get vendor name */
897 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
898 (unsigned int *)&c->x86_vendor_id[0],
899 (unsigned int *)&c->x86_vendor_id[8],
900 (unsigned int *)&c->x86_vendor_id[4]);
904 /* Initialize the standard set of capabilities */
905 /* Note that the vendor-specific code below might override */
907 /* Intel-defined flags: level 0x00000001 */
908 if (c->cpuid_level >= 0x00000001) {
910 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
911 &c->x86_capability[0]);
912 c->x86 = (tfms >> 8) & 0xf;
913 c->x86_model = (tfms >> 4) & 0xf;
914 c->x86_mask = tfms & 0xf;
916 c->x86 += (tfms >> 20) & 0xff;
918 c->x86_model += ((tfms >> 16) & 0xF) << 4;
919 if (c->x86_capability[0] & (1<<19))
920 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
922 /* Have CPUID level 0 only - unheard of */
927 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
932 * This does the hard work of actually picking apart the CPU stuff...
934 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
939 early_identify_cpu(c);
941 /* AMD-defined flags: level 0x80000001 */
942 xlvl = cpuid_eax(0x80000000);
943 c->extended_cpuid_level = xlvl;
944 if ((xlvl & 0xffff0000) == 0x80000000) {
945 if (xlvl >= 0x80000001) {
946 c->x86_capability[1] = cpuid_edx(0x80000001);
947 c->x86_capability[6] = cpuid_ecx(0x80000001);
949 if (xlvl >= 0x80000004)
950 get_model_name(c); /* Default name */
953 /* Transmeta-defined flags: level 0x80860001 */
954 xlvl = cpuid_eax(0x80860000);
955 if ((xlvl & 0xffff0000) == 0x80860000) {
956 /* Don't set x86_cpuid_level here for now to not confuse. */
957 if (xlvl >= 0x80860001)
958 c->x86_capability[2] = cpuid_edx(0x80860001);
961 c->apicid = phys_pkg_id(0);
964 * Vendor-specific initialization. In this section we
965 * canonicalize the feature flags, meaning if there are
966 * features a certain CPU supports which CPUID doesn't
967 * tell us, CPUID claiming incorrect flags, or other bugs,
968 * we handle them here.
970 * At the end of this section, c->x86_capability better
971 * indicate the features this CPU genuinely supports!
973 switch (c->x86_vendor) {
978 case X86_VENDOR_INTEL:
982 case X86_VENDOR_UNKNOWN:
984 display_cacheinfo(c);
988 select_idle_routine(c);
992 * On SMP, boot_cpu_data holds the common feature set between
993 * all CPUs; so make sure that we indicate which features are
994 * common between the CPUs. The first time this routine gets
995 * executed, c == &boot_cpu_data.
997 if (c != &boot_cpu_data) {
998 /* AND the already accumulated flags with these */
999 for (i = 0 ; i < NCAPINTS ; i++)
1000 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1003 #ifdef CONFIG_X86_MCE
1006 if (c == &boot_cpu_data)
1011 numa_add_cpu(smp_processor_id());
1016 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1018 if (c->x86_model_id[0])
1019 printk("%s", c->x86_model_id);
1021 if (c->x86_mask || c->cpuid_level >= 0)
1022 printk(" stepping %02x\n", c->x86_mask);
1028 * Get CPU information for use by the procfs.
1031 static int show_cpuinfo(struct seq_file *m, void *v)
1033 struct cpuinfo_x86 *c = v;
1036 * These flag bits must match the definitions in <asm/cpufeature.h>.
1037 * NULL means this bit is undefined or reserved; either way it doesn't
1038 * have meaning as far as Linux is concerned. Note that it's important
1039 * to realize there is a difference between this table and CPUID -- if
1040 * applications want to get the raw CPUID data, they should access
1041 * /dev/cpu/<cpu_nr>/cpuid instead.
1043 static char *x86_cap_flags[] = {
1045 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1046 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1047 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1048 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1051 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1052 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1053 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1054 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1056 /* Transmeta-defined */
1057 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1058 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1059 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1060 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1062 /* Other (Linux-defined) */
1063 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1064 "constant_tsc", NULL, NULL,
1065 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1066 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1067 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1069 /* Intel-defined (#2) */
1070 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1071 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1072 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1073 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1075 /* VIA/Cyrix/Centaur-defined */
1076 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1077 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1078 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1079 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1081 /* AMD-defined (#2) */
1082 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1083 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1084 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1085 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1087 static char *x86_power_flags[] = {
1088 "ts", /* temperature sensor */
1089 "fid", /* frequency id control */
1090 "vid", /* voltage id control */
1091 "ttp", /* thermal trip */
1095 /* nothing */ /* constant_tsc - moved to flags */
1100 if (!cpu_online(c-cpu_data))
1104 seq_printf(m,"processor\t: %u\n"
1106 "cpu family\t: %d\n"
1108 "model name\t: %s\n",
1109 (unsigned)(c-cpu_data),
1110 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1113 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1115 if (c->x86_mask || c->cpuid_level >= 0)
1116 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1118 seq_printf(m, "stepping\t: unknown\n");
1120 if (cpu_has(c,X86_FEATURE_TSC)) {
1121 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1124 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1125 freq / 1000, (freq % 1000));
1129 if (c->x86_cache_size >= 0)
1130 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1133 if (smp_num_siblings * c->x86_max_cores > 1) {
1134 int cpu = c - cpu_data;
1135 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1136 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1137 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1138 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1144 "fpu_exception\t: yes\n"
1145 "cpuid level\t: %d\n"
1152 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1153 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1154 seq_printf(m, " %s", x86_cap_flags[i]);
1157 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1158 c->loops_per_jiffy/(500000/HZ),
1159 (c->loops_per_jiffy/(5000/HZ)) % 100);
1161 if (c->x86_tlbsize > 0)
1162 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1163 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1164 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1166 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1167 c->x86_phys_bits, c->x86_virt_bits);
1169 seq_printf(m, "power management:");
1172 for (i = 0; i < 32; i++)
1173 if (c->x86_power & (1 << i)) {
1174 if (i < ARRAY_SIZE(x86_power_flags) &&
1176 seq_printf(m, "%s%s",
1177 x86_power_flags[i][0]?" ":"",
1178 x86_power_flags[i]);
1180 seq_printf(m, " [%d]", i);
1184 seq_printf(m, "\n\n");
1189 static void *c_start(struct seq_file *m, loff_t *pos)
1191 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1194 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1197 return c_start(m, pos);
1200 static void c_stop(struct seq_file *m, void *v)
1204 struct seq_operations cpuinfo_op = {
1208 .show = show_cpuinfo,
1211 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1212 #include <linux/platform_device.h>
1213 static __init int add_pcspkr(void)
1215 struct platform_device *pd;
1218 pd = platform_device_alloc("pcspkr", -1);
1222 ret = platform_device_add(pd);
1224 platform_device_put(pd);
1228 device_initcall(add_pcspkr);