V4L/DVB (3311): DViCO FusionHDTV DVB-T Dual Digital PCI support
[linux-2.6] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #ifdef HAVE_MT352
37 # include "mt352.h"
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 #  include "cx88-vp3054-i2c.h"
41 # endif
42 #endif
43 #ifdef HAVE_CX22702
44 # include "cx22702.h"
45 #endif
46 #ifdef HAVE_OR51132
47 # include "or51132.h"
48 #endif
49 #ifdef HAVE_LGDT330X
50 # include "lgdt330x.h"
51 #endif
52 #ifdef HAVE_NXT200X
53 # include "nxt200x.h"
54 #endif
55 #ifdef HAVE_CX24123
56 # include "cx24123.h"
57 #endif
58
59 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
60 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
61 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
62 MODULE_LICENSE("GPL");
63
64 static unsigned int debug = 0;
65 module_param(debug, int, 0644);
66 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
67
68 #define dprintk(level,fmt, arg...)      if (debug >= level) \
69         printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
70
71 /* ------------------------------------------------------------------ */
72
73 static int dvb_buf_setup(struct videobuf_queue *q,
74                          unsigned int *count, unsigned int *size)
75 {
76         struct cx8802_dev *dev = q->priv_data;
77
78         dev->ts_packet_size  = 188 * 4;
79         dev->ts_packet_count = 32;
80
81         *size  = dev->ts_packet_size * dev->ts_packet_count;
82         *count = 32;
83         return 0;
84 }
85
86 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
87                            enum v4l2_field field)
88 {
89         struct cx8802_dev *dev = q->priv_data;
90         return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb,field);
91 }
92
93 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
94 {
95         struct cx8802_dev *dev = q->priv_data;
96         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
97 }
98
99 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
100 {
101         struct cx8802_dev *dev = q->priv_data;
102         cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
103 }
104
105 static struct videobuf_queue_ops dvb_qops = {
106         .buf_setup    = dvb_buf_setup,
107         .buf_prepare  = dvb_buf_prepare,
108         .buf_queue    = dvb_buf_queue,
109         .buf_release  = dvb_buf_release,
110 };
111
112 /* ------------------------------------------------------------------ */
113
114 #ifdef HAVE_MT352
115 static int generic_mt352_demod_init(struct dvb_frontend* fe)
116 {
117         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
118         static u8 reset []         = { RESET,      0x80 };
119         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
120         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
121         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
122         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
123
124         mt352_write(fe, clock_config,   sizeof(clock_config));
125         udelay(200);
126         mt352_write(fe, reset,          sizeof(reset));
127         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
128
129         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
130         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
131         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
132         return 0;
133 }
134
135 static int dvico_dual_demod_init(struct dvb_frontend *fe)
136 {
137         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
138         static u8 reset []         = { RESET,      0x80 };
139         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
140         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
141         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
142         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
143
144         mt352_write(fe, clock_config,   sizeof(clock_config));
145         udelay(200);
146         mt352_write(fe, reset,          sizeof(reset));
147         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
148
149         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
150         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
151         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
152
153         return 0;
154 }
155
156 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
157 {
158         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
159         static u8 reset []         = { 0x50, 0x80 };
160         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
161         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
162                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
163         static u8 dntv_extra[]     = { 0xB5, 0x7A };
164         static u8 capt_range_cfg[] = { 0x75, 0x32 };
165
166         mt352_write(fe, clock_config,   sizeof(clock_config));
167         udelay(2000);
168         mt352_write(fe, reset,          sizeof(reset));
169         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
170
171         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
172         udelay(2000);
173         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
174         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
175
176         return 0;
177 }
178
179 static int mt352_pll_set(struct dvb_frontend* fe,
180                          struct dvb_frontend_parameters* params,
181                          u8* pllbuf)
182 {
183         struct cx8802_dev *dev= fe->dvb->priv;
184
185         pllbuf[0] = dev->core->pll_addr << 1;
186         dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
187                           params->frequency,
188                           params->u.ofdm.bandwidth);
189         return 0;
190 }
191
192 static struct mt352_config dvico_fusionhdtv = {
193         .demod_address = 0x0F,
194         .demod_init    = generic_mt352_demod_init,
195         .pll_set       = mt352_pll_set,
196 };
197
198 static struct mt352_config dntv_live_dvbt_config = {
199         .demod_address = 0x0f,
200         .demod_init    = dntv_live_dvbt_demod_init,
201         .pll_set       = mt352_pll_set,
202 };
203
204 static struct mt352_config dvico_fusionhdtv_dual = {
205         .demod_address = 0x0F,
206         .demod_init    = dvico_dual_demod_init,
207         .pll_set       = mt352_pll_set,
208 };
209
210 #ifdef HAVE_VP3054_I2C
211 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
212 {
213         struct cx8802_dev *dev= fe->dvb->priv;
214
215         /* this message is to set up ATC and ALC */
216         static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
217         struct i2c_msg msg =
218                 { .addr = dev->core->pll_addr, .flags = 0,
219                   .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
220         int err;
221
222         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
223                 if (err < 0)
224                         return err;
225                 else
226                         return -EREMOTEIO;
227         }
228
229         return 0;
230 }
231
232 static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
233                                       struct dvb_frontend_parameters* params,
234                                       u8* pllbuf)
235 {
236         struct cx8802_dev *dev= fe->dvb->priv;
237         struct i2c_msg msg =
238                 { .addr = dev->core->pll_addr, .flags = 0,
239                   .buf = pllbuf+1, .len = 4 };
240         int err;
241
242         /* Switch PLL to DVB mode */
243         err = philips_fmd1216_pll_init(fe);
244         if (err)
245                 return err;
246
247         /* Tune PLL */
248         pllbuf[0] = dev->core->pll_addr << 1;
249         dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
250                           params->frequency,
251                           params->u.ofdm.bandwidth);
252         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
253                 printk(KERN_WARNING "cx88-dvb: %s error "
254                            "(addr %02x <- %02x, err = %i)\n",
255                            __FUNCTION__, pllbuf[0], pllbuf[1], err);
256                 if (err < 0)
257                         return err;
258                 else
259                         return -EREMOTEIO;
260         }
261
262         return 0;
263 }
264
265 static struct mt352_config dntv_live_dvbt_pro_config = {
266         .demod_address = 0x0f,
267         .no_tuner      = 1,
268         .demod_init    = generic_mt352_demod_init,
269         .pll_set       = dntv_live_dvbt_pro_pll_set,
270 };
271 #endif
272 #endif
273
274 #ifdef HAVE_CX22702
275 static struct cx22702_config connexant_refboard_config = {
276         .demod_address = 0x43,
277         .output_mode   = CX22702_SERIAL_OUTPUT,
278         .pll_address   = 0x60,
279         .pll_desc      = &dvb_pll_thomson_dtt7579,
280 };
281
282 static struct cx22702_config hauppauge_novat_config = {
283         .demod_address = 0x43,
284         .output_mode   = CX22702_SERIAL_OUTPUT,
285         .pll_address   = 0x61,
286         .pll_desc      = &dvb_pll_thomson_dtt759x,
287 };
288 static struct cx22702_config hauppauge_hvr1100_config = {
289         .demod_address = 0x63,
290         .output_mode   = CX22702_SERIAL_OUTPUT,
291         .pll_address   = 0x61,
292         .pll_desc      = &dvb_pll_fmd1216me,
293 };
294 #endif
295
296 #ifdef HAVE_OR51132
297 static int or51132_set_ts_param(struct dvb_frontend* fe,
298                                 int is_punctured)
299 {
300         struct cx8802_dev *dev= fe->dvb->priv;
301         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
302         return 0;
303 }
304
305 static struct or51132_config pchdtv_hd3000 = {
306         .demod_address    = 0x15,
307         .pll_address      = 0x61,
308         .pll_desc         = &dvb_pll_thomson_dtt7610,
309         .set_ts_params    = or51132_set_ts_param,
310 };
311 #endif
312
313 #ifdef HAVE_LGDT330X
314 static int lgdt330x_pll_set(struct dvb_frontend* fe,
315                             struct dvb_frontend_parameters* params)
316 {
317         /* FIXME make this routine use the tuner-simple code.
318          * It could probably be shared with a number of ATSC
319          * frontends. Many share the same tuner with analog TV. */
320
321         struct cx8802_dev *dev= fe->dvb->priv;
322         struct cx88_core *core = dev->core;
323         u8 buf[4];
324         struct i2c_msg msg =
325                 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
326         int err;
327
328         /* Put the analog decoder in standby to keep it quiet */
329         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
330
331         dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
332         dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
333                         __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
334         if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
335                 printk(KERN_WARNING "cx88-dvb: %s error "
336                            "(addr %02x <- %02x, err = %i)\n",
337                            __FUNCTION__, buf[0], buf[1], err);
338                 if (err < 0)
339                         return err;
340                 else
341                         return -EREMOTEIO;
342         }
343         if (core->tuner_type == TUNER_LG_TDVS_H062F) {
344                 /* Set the Auxiliary Byte. */
345                 buf[2] &= ~0x20;
346                 buf[2] |= 0x18;
347                 buf[3] = 0x50;
348                 i2c_transfer(&core->i2c_adap, &msg, 1);
349         }
350         return 0;
351 }
352
353 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
354 {
355         struct cx8802_dev *dev= fe->dvb->priv;
356         struct cx88_core *core = dev->core;
357
358         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
359         if (index == 0)
360                 cx_clear(MO_GP0_IO, 8);
361         else
362                 cx_set(MO_GP0_IO, 8);
363         return 0;
364 }
365
366 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
367 {
368         struct cx8802_dev *dev= fe->dvb->priv;
369         if (is_punctured)
370                 dev->ts_gen_cntrl |= 0x04;
371         else
372                 dev->ts_gen_cntrl &= ~0x04;
373         return 0;
374 }
375
376 static struct lgdt330x_config fusionhdtv_3_gold = {
377         .demod_address    = 0x0e,
378         .demod_chip       = LGDT3302,
379         .serial_mpeg      = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
380         .pll_set          = lgdt330x_pll_set,
381         .set_ts_params    = lgdt330x_set_ts_param,
382 };
383
384 static struct lgdt330x_config fusionhdtv_5_gold = {
385         .demod_address    = 0x0e,
386         .demod_chip       = LGDT3303,
387         .serial_mpeg      = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
388         .pll_set          = lgdt330x_pll_set,
389         .set_ts_params    = lgdt330x_set_ts_param,
390 };
391 #endif
392
393 #ifdef HAVE_NXT200X
394 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
395                                 int is_punctured)
396 {
397         struct cx8802_dev *dev= fe->dvb->priv;
398         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
399         return 0;
400 }
401
402 static int nxt200x_set_pll_input(u8* buf, int input)
403 {
404         if (input)
405                 buf[3] |= 0x08;
406         else
407                 buf[3] &= ~0x08;
408         return 0;
409 }
410
411 static struct nxt200x_config ati_hdtvwonder = {
412         .demod_address    = 0x0a,
413         .pll_address      = 0x61,
414         .pll_desc         = &dvb_pll_tuv1236d,
415         .set_pll_input    = nxt200x_set_pll_input,
416         .set_ts_params    = nxt200x_set_ts_param,
417 };
418 #endif
419
420 #ifdef HAVE_CX24123
421 static int cx24123_set_ts_param(struct dvb_frontend* fe,
422         int is_punctured)
423 {
424         struct cx8802_dev *dev= fe->dvb->priv;
425         dev->ts_gen_cntrl = 0x2;
426         return 0;
427 }
428
429 static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
430 {
431         struct cx8802_dev *dev= fe->dvb->priv;
432         struct cx88_core *core = dev->core;
433
434         if (on)
435                 cx_write(MO_GP0_IO, 0x000006f9);
436         else
437                 cx_write(MO_GP0_IO, 0x000006fB);
438 }
439
440 static struct cx24123_config hauppauge_novas_config = {
441         .demod_address          = 0x55,
442         .use_isl6421            = 1,
443         .set_ts_params          = cx24123_set_ts_param,
444 };
445
446 static struct cx24123_config kworld_dvbs_100_config = {
447         .demod_address          = 0x15,
448         .use_isl6421            = 0,
449         .set_ts_params          = cx24123_set_ts_param,
450         .enable_lnb_voltage     = cx24123_enable_lnb_voltage,
451 };
452 #endif
453
454 static int dvb_register(struct cx8802_dev *dev)
455 {
456         /* init struct videobuf_dvb */
457         dev->dvb.name = dev->core->name;
458         dev->ts_gen_cntrl = 0x0c;
459
460         /* init frontend */
461         switch (dev->core->board) {
462 #ifdef HAVE_CX22702
463         case CX88_BOARD_HAUPPAUGE_DVB_T1:
464                 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
465                                                    &dev->core->i2c_adap);
466                 break;
467         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
468         case CX88_BOARD_CONEXANT_DVB_T1:
469         case CX88_BOARD_KWORLD_DVB_T_CX22702:
470         case CX88_BOARD_WINFAST_DTV1000:
471                 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
472                                                    &dev->core->i2c_adap);
473                 break;
474         case CX88_BOARD_HAUPPAUGE_HVR1100:
475         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
476                 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
477                                                    &dev->core->i2c_adap);
478                 break;
479 #endif
480 #ifdef HAVE_MT352
481         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
482                 dev->core->pll_addr = 0x61;
483                 dev->core->pll_desc = &dvb_pll_lg_z201;
484                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
485                                                  &dev->core->i2c_adap);
486                 break;
487         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
488                 dev->core->pll_addr = 0x60;
489                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
490                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
491                                                  &dev->core->i2c_adap);
492                 break;
493         case CX88_BOARD_KWORLD_DVB_T:
494         case CX88_BOARD_DNTV_LIVE_DVB_T:
495         case CX88_BOARD_ADSTECH_DVB_T_PCI:
496                 dev->core->pll_addr = 0x61;
497                 dev->core->pll_desc = &dvb_pll_unknown_1;
498                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
499                                                  &dev->core->i2c_adap);
500                 break;
501         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
502 #ifdef HAVE_VP3054_I2C
503                 dev->core->pll_addr = 0x61;
504                 dev->core->pll_desc = &dvb_pll_fmd1216me;
505                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
506                         &((struct vp3054_i2c_state *)dev->card_priv)->adap);
507 #else
508                 printk("%s: built without vp3054 support\n", dev->core->name);
509 #endif
510                 break;
511         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
512                 /* The tin box says DEE1601, but it seems to be DTT7579
513                  * compatible, with a slightly different MT352 AGC gain. */
514                 dev->core->pll_addr = 0x61;
515                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
516                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
517                                                  &dev->core->i2c_adap);
518                 break;
519 #endif
520 #ifdef HAVE_OR51132
521         case CX88_BOARD_PCHDTV_HD3000:
522                 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
523                                                  &dev->core->i2c_adap);
524                 break;
525 #endif
526 #ifdef HAVE_LGDT330X
527         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
528                 dev->ts_gen_cntrl = 0x08;
529                 {
530                 /* Do a hardware reset of chip before using it. */
531                 struct cx88_core *core = dev->core;
532
533                 cx_clear(MO_GP0_IO, 1);
534                 mdelay(100);
535                 cx_set(MO_GP0_IO, 1);
536                 mdelay(200);
537
538                 /* Select RF connector callback */
539                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
540                 dev->core->pll_addr = 0x61;
541                 dev->core->pll_desc = &dvb_pll_microtune_4042;
542                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
543                                                     &dev->core->i2c_adap);
544                 }
545                 break;
546         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
547                 dev->ts_gen_cntrl = 0x08;
548                 {
549                 /* Do a hardware reset of chip before using it. */
550                 struct cx88_core *core = dev->core;
551
552                 cx_clear(MO_GP0_IO, 1);
553                 mdelay(100);
554                 cx_set(MO_GP0_IO, 9);
555                 mdelay(200);
556                 dev->core->pll_addr = 0x61;
557                 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
558                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
559                                                     &dev->core->i2c_adap);
560                 }
561                 break;
562         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
563                 dev->ts_gen_cntrl = 0x08;
564                 {
565                 /* Do a hardware reset of chip before using it. */
566                 struct cx88_core *core = dev->core;
567
568                 cx_clear(MO_GP0_IO, 1);
569                 mdelay(100);
570                 cx_set(MO_GP0_IO, 1);
571                 mdelay(200);
572                 dev->core->pll_addr = 0x61;
573                 dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
574                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
575                                                     &dev->core->i2c_adap);
576                 }
577                 break;
578 #endif
579 #ifdef HAVE_NXT200X
580         case CX88_BOARD_ATI_HDTVWONDER:
581                 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
582                                                  &dev->core->i2c_adap);
583                 break;
584 #endif
585 #ifdef HAVE_CX24123
586         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
587         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
588                 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
589                         &dev->core->i2c_adap);
590                 break;
591         case CX88_BOARD_KWORLD_DVBS_100:
592                 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
593                         &dev->core->i2c_adap);
594                 break;
595 #endif
596         default:
597                 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
598                        dev->core->name);
599                 break;
600         }
601         if (NULL == dev->dvb.frontend) {
602                 printk("%s: frontend initialization failed\n",dev->core->name);
603                 return -1;
604         }
605
606         if (dev->core->pll_desc) {
607                 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
608                 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
609         }
610
611         /* Put the analog decoder in standby to keep it quiet */
612         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
613
614         /* register everything */
615         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
616 }
617
618 /* ----------------------------------------------------------- */
619
620 static int __devinit dvb_probe(struct pci_dev *pci_dev,
621                                const struct pci_device_id *pci_id)
622 {
623         struct cx8802_dev *dev;
624         struct cx88_core  *core;
625         int err;
626
627         /* general setup */
628         core = cx88_core_get(pci_dev);
629         if (NULL == core)
630                 return -EINVAL;
631
632         err = -ENODEV;
633         if (!cx88_boards[core->board].dvb)
634                 goto fail_core;
635
636         err = -ENOMEM;
637         dev = kmalloc(sizeof(*dev),GFP_KERNEL);
638         if (NULL == dev)
639                 goto fail_core;
640         memset(dev,0,sizeof(*dev));
641         dev->pci = pci_dev;
642         dev->core = core;
643
644         err = cx8802_init_common(dev);
645         if (0 != err)
646                 goto fail_free;
647
648 #ifdef HAVE_VP3054_I2C
649         err = vp3054_i2c_probe(dev);
650         if (0 != err)
651                 goto fail_free;
652 #endif
653
654         /* dvb stuff */
655         printk("%s/2: cx2388x based dvb card\n", core->name);
656         videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
657                             dev->pci, &dev->slock,
658                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
659                             V4L2_FIELD_TOP,
660                             sizeof(struct cx88_buffer),
661                             dev);
662         err = dvb_register(dev);
663         if (0 != err)
664                 goto fail_fini;
665
666         /* Maintain a reference to cx88-video can query the 8802 device. */
667         core->dvbdev = dev;
668         return 0;
669
670  fail_fini:
671         cx8802_fini_common(dev);
672  fail_free:
673         kfree(dev);
674  fail_core:
675         cx88_core_put(core,pci_dev);
676         return err;
677 }
678
679 static void __devexit dvb_remove(struct pci_dev *pci_dev)
680 {
681         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
682
683         /* Destroy any 8802 reference. */
684         dev->core->dvbdev = NULL;
685
686         /* dvb */
687         videobuf_dvb_unregister(&dev->dvb);
688
689 #ifdef HAVE_VP3054_I2C
690         vp3054_i2c_remove(dev);
691 #endif
692
693         /* common */
694         cx8802_fini_common(dev);
695         cx88_core_put(dev->core,dev->pci);
696         kfree(dev);
697 }
698
699 static struct pci_device_id cx8802_pci_tbl[] = {
700         {
701                 .vendor       = 0x14f1,
702                 .device       = 0x8802,
703                 .subvendor    = PCI_ANY_ID,
704                 .subdevice    = PCI_ANY_ID,
705         },{
706                 /* --- end of list --- */
707         }
708 };
709 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
710
711 static struct pci_driver dvb_pci_driver = {
712         .name     = "cx88-dvb",
713         .id_table = cx8802_pci_tbl,
714         .probe    = dvb_probe,
715         .remove   = __devexit_p(dvb_remove),
716         .suspend  = cx8802_suspend_common,
717         .resume   = cx8802_resume_common,
718 };
719
720 static int dvb_init(void)
721 {
722         printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
723                (CX88_VERSION_CODE >> 16) & 0xff,
724                (CX88_VERSION_CODE >>  8) & 0xff,
725                CX88_VERSION_CODE & 0xff);
726 #ifdef SNAPSHOT
727         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
728                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
729 #endif
730         return pci_register_driver(&dvb_pci_driver);
731 }
732
733 static void dvb_fini(void)
734 {
735         pci_unregister_driver(&dvb_pci_driver);
736 }
737
738 module_init(dvb_init);
739 module_exit(dvb_fini);
740
741 /*
742  * Local variables:
743  * c-basic-offset: 8
744  * compile-command: "make DVB=1"
745  * End:
746  */