git.oblomov.eu Git - linux-2.6/blob - drivers/media/video/cx88/cx88-mpeg.c

   1 /*
   2  *
   3  *  Support for the mpeg transport stream transfers
   4  *  PCI function #2 of the cx2388x.
   5  *
   6  *    (c) 2004 Jelle Foks <jelle@foks.8m.com>
   7  *    (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
   8  *    (c) 2004 Gerd Knorr <kraxel@bytesex.org>
   9  *
  10  *  This program is free software; you can redistribute it and/or modify
  11  *  it under the terms of the GNU General Public License as published by
  12  *  the Free Software Foundation; either version 2 of the License, or
  13  *  (at your option) any later version.
  14  *
  15  *  This program is distributed in the hope that it will be useful,
  16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *  GNU General Public License for more details.
  19  *
  20  *  You should have received a copy of the GNU General Public License
  21  *  along with this program; if not, write to the Free Software
  22  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/moduleparam.h>
  27 #include <linux/init.h>
  28 #include <linux/device.h>
  29 #include <linux/interrupt.h>
  30 #include <asm/delay.h>
  31
  32 #include "cx88.h"
  33
  34 /* ------------------------------------------------------------------ */
  35
  36 MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards");
  37 MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>");
  38 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  39 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  40 MODULE_LICENSE("GPL");
  41
  42 static unsigned int debug = 0;
  43 module_param(debug,int,0644);
  44 MODULE_PARM_DESC(debug,"enable debug messages [mpeg]");
  45
  46 #define dprintk(level,fmt, arg...)      if (debug >= level) \
  47         printk(KERN_DEBUG "%s/2: " fmt, dev->core->name , ## arg)
  48
  49 /* ------------------------------------------------------------------ */
  50
  51 static int cx8802_start_dma(struct cx8802_dev    *dev,
  52                             struct cx88_dmaqueue *q,
  53                             struct cx88_buffer   *buf)
  54 {
  55         struct cx88_core *core = dev->core;
  56
  57         dprintk(1, "cx8802_start_dma w: %d, h: %d, f: %d\n", dev->width, dev->height, buf->vb.field);
  58
  59         /* setup fifo + format */
  60         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],
  61                                 dev->ts_packet_size, buf->risc.dma);
  62
  63         /* write TS length to chip */
  64         cx_write(MO_TS_LNGTH, buf->vb.width);
  65
  66         /* FIXME: this needs a review.
  67          * also: move to cx88-blackbird + cx88-dvb source files? */
  68         if (cx88_boards[core->board].mpeg == (CX88_MPEG_DVB | CX88_MPEG_BLACKBIRD) ) {
  69                 /* Report a warning until the mini driver patch is applied,
  70                  * else the following conditions will set the dma registers incorrectly.
  71                  * This will be removed in the next major patch and changes to the conditions
  72                  * will be made.
  73                  */
  74                 printk(KERN_INFO "%s() board->(CX88_MPEG_DVB | CX88_MPEG_BLACKBIRD) is invalid\n", __FUNCTION__);
  75                 return -EINVAL;
  76         }
  77
  78         if (cx88_boards[core->board].mpeg & CX88_MPEG_DVB) {
  79                 /* negedge driven & software reset */
  80                 cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl);
  81                 udelay(100);
  82                 cx_write(MO_PINMUX_IO, 0x00);
  83                 cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01);
  84                 switch (core->board) {
  85                 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  86                 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  87                 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  88                 case CX88_BOARD_PCHDTV_HD5500:
  89                         cx_write(TS_SOP_STAT, 1<<13);
  90                         break;
  91                 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  92                 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  93                         cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */
  94                         udelay(100);
  95                         break;
  96                 default:
  97                         cx_write(TS_SOP_STAT, 0x00);
  98                         break;
  99                 }
 100                 cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);
 101                 udelay(100);
 102         }
 103
 104         if (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) {
 105                 cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */
 106
 107                 cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */
 108                 udelay(100);
 109
 110                 cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */
 111                 cx_write(TS_VALERR_CNTRL, 0x2000);
 112
 113                 cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */
 114                 udelay(100);
 115         }
 116
 117         /* reset counter */
 118         cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET);
 119         q->count = 1;
 120
 121         /* enable irqs */
 122         dprintk( 1, "setting the interrupt mask\n" );
 123         cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04);
 124         cx_set(MO_TS_INTMSK,  0x1f0011);
 125
 126         /* start dma */
 127         cx_set(MO_DEV_CNTRL2, (1<<5));
 128         cx_set(MO_TS_DMACNTRL, 0x11);
 129         return 0;
 130 }
 131
 132 static int cx8802_stop_dma(struct cx8802_dev *dev)
 133 {
 134         struct cx88_core *core = dev->core;
 135         dprintk( 1, "cx8802_stop_dma\n" );
 136
 137         /* stop dma */
 138         cx_clear(MO_TS_DMACNTRL, 0x11);
 139
 140         /* disable irqs */
 141         cx_clear(MO_PCI_INTMSK, 0x000004);
 142         cx_clear(MO_TS_INTMSK, 0x1f0011);
 143
 144         /* Reset the controller */
 145         cx_write(TS_GEN_CNTRL, 0xcd);
 146         return 0;
 147 }
 148
 149 static int cx8802_restart_queue(struct cx8802_dev    *dev,
 150                                 struct cx88_dmaqueue *q)
 151 {
 152         struct cx88_buffer *buf;
 153         struct list_head *item;
 154
 155        dprintk( 1, "cx8802_restart_queue\n" );
 156         if (list_empty(&q->active))
 157         {
 158                struct cx88_buffer *prev;
 159                prev = NULL;
 160
 161                dprintk(1, "cx8802_restart_queue: queue is empty\n" );
 162
 163                for (;;) {
 164                        if (list_empty(&q->queued))
 165                                return 0;
 166                        buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
 167                        if (NULL == prev) {
 168                                list_del(&buf->vb.queue);
 169                                list_add_tail(&buf->vb.queue,&q->active);
 170                                cx8802_start_dma(dev, q, buf);
 171                                buf->vb.state = STATE_ACTIVE;
 172                                buf->count    = q->count++;
 173                                mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
 174                                dprintk(1,"[%p/%d] restart_queue - first active\n",
 175                                        buf,buf->vb.i);
 176
 177                        } else if (prev->vb.width  == buf->vb.width  &&
 178                                   prev->vb.height == buf->vb.height &&
 179                                   prev->fmt       == buf->fmt) {
 180                                list_del(&buf->vb.queue);
 181                                list_add_tail(&buf->vb.queue,&q->active);
 182                                buf->vb.state = STATE_ACTIVE;
 183                                buf->count    = q->count++;
 184                                prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 185                                dprintk(1,"[%p/%d] restart_queue - move to active\n",
 186                                        buf,buf->vb.i);
 187                        } else {
 188                                return 0;
 189                        }
 190                        prev = buf;
 191                }
 192                 return 0;
 193         }
 194
 195         buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
 196         dprintk(2,"restart_queue [%p/%d]: restart dma\n",
 197                 buf, buf->vb.i);
 198         cx8802_start_dma(dev, q, buf);
 199         list_for_each(item,&q->active) {
 200                 buf = list_entry(item, struct cx88_buffer, vb.queue);
 201                 buf->count = q->count++;
 202         }
 203         mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
 204         return 0;
 205 }
 206
 207 /* ------------------------------------------------------------------ */
 208
 209 int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,
 210                         struct cx88_buffer *buf, enum v4l2_field field)
 211 {
 212         int size = dev->ts_packet_size * dev->ts_packet_count;
 213         int rc;
 214
 215         dprintk(1, "%s: %p\n", __FUNCTION__, buf);
 216         if (0 != buf->vb.baddr  &&  buf->vb.bsize < size)
 217                 return -EINVAL;
 218
 219         if (STATE_NEEDS_INIT == buf->vb.state) {
 220                 buf->vb.width  = dev->ts_packet_size;
 221                 buf->vb.height = dev->ts_packet_count;
 222                 buf->vb.size   = size;
 223                 buf->vb.field  = field /*V4L2_FIELD_TOP*/;
 224
 225                 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
 226                         goto fail;
 227                 cx88_risc_databuffer(dev->pci, &buf->risc,
 228                                      buf->vb.dma.sglist,
 229                                      buf->vb.width, buf->vb.height);
 230         }
 231         buf->vb.state = STATE_PREPARED;
 232         return 0;
 233
 234  fail:
 235         cx88_free_buffer(q,buf);
 236         return rc;
 237 }
 238
 239 void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf)
 240 {
 241         struct cx88_buffer    *prev;
 242         struct cx88_dmaqueue  *cx88q = &dev->mpegq;
 243
 244         dprintk( 1, "cx8802_buf_queue\n" );
 245         /* add jump to stopper */
 246         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
 247         buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma);
 248
 249         if (list_empty(&cx88q->active)) {
 250                 dprintk( 1, "queue is empty - first active\n" );
 251                 list_add_tail(&buf->vb.queue,&cx88q->active);
 252                 cx8802_start_dma(dev, cx88q, buf);
 253                 buf->vb.state = STATE_ACTIVE;
 254                 buf->count    = cx88q->count++;
 255                 mod_timer(&cx88q->timeout, jiffies+BUFFER_TIMEOUT);
 256                 dprintk(1,"[%p/%d] %s - first active\n",
 257                         buf, buf->vb.i, __FUNCTION__);
 258
 259         } else {
 260                 dprintk( 1, "queue is not empty - append to active\n" );
 261                 prev = list_entry(cx88q->active.prev, struct cx88_buffer, vb.queue);
 262                 list_add_tail(&buf->vb.queue,&cx88q->active);
 263                 buf->vb.state = STATE_ACTIVE;
 264                 buf->count    = cx88q->count++;
 265                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 266                 dprintk( 1, "[%p/%d] %s - append to active\n",
 267                         buf, buf->vb.i, __FUNCTION__);
 268         }
 269 }
 270
 271 /* ----------------------------------------------------------- */
 272
 273 static void do_cancel_buffers(struct cx8802_dev *dev, char *reason, int restart)
 274 {
 275         struct cx88_dmaqueue *q = &dev->mpegq;
 276         struct cx88_buffer *buf;
 277         unsigned long flags;
 278
 279         spin_lock_irqsave(&dev->slock,flags);
 280         while (!list_empty(&q->active)) {
 281                 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
 282                 list_del(&buf->vb.queue);
 283                 buf->vb.state = STATE_ERROR;
 284                 wake_up(&buf->vb.done);
 285                 dprintk(1,"[%p/%d] %s - dma=0x%08lx\n",
 286                         buf, buf->vb.i, reason, (unsigned long)buf->risc.dma);
 287         }
 288         if (restart)
 289         {
 290                 dprintk(1, "restarting queue\n" );
 291                 cx8802_restart_queue(dev,q);
 292         }
 293         spin_unlock_irqrestore(&dev->slock,flags);
 294 }
 295
 296 void cx8802_cancel_buffers(struct cx8802_dev *dev)
 297 {
 298         struct cx88_dmaqueue *q = &dev->mpegq;
 299
 300         dprintk( 1, "cx8802_cancel_buffers" );
 301         del_timer_sync(&q->timeout);
 302         cx8802_stop_dma(dev);
 303         do_cancel_buffers(dev,"cancel",0);
 304 }
 305
 306 static void cx8802_timeout(unsigned long data)
 307 {
 308         struct cx8802_dev *dev = (struct cx8802_dev*)data;
 309
 310         dprintk(0, "%s\n",__FUNCTION__);
 311
 312         if (debug)
 313                 cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);
 314         cx8802_stop_dma(dev);
 315         do_cancel_buffers(dev,"timeout",1);
 316 }
 317
 318 static char *cx88_mpeg_irqs[32] = {
 319         "ts_risci1", NULL, NULL, NULL,
 320         "ts_risci2", NULL, NULL, NULL,
 321         "ts_oflow",  NULL, NULL, NULL,
 322         "ts_sync",   NULL, NULL, NULL,
 323         "opc_err", "par_err", "rip_err", "pci_abort",
 324         "ts_err?",
 325 };
 326
 327 static void cx8802_mpeg_irq(struct cx8802_dev *dev)
 328 {
 329         struct cx88_core *core = dev->core;
 330         u32 status, mask, count;
 331
 332         dprintk( 1, "cx8802_mpeg_irq\n" );
 333         status = cx_read(MO_TS_INTSTAT);
 334         mask   = cx_read(MO_TS_INTMSK);
 335         if (0 == (status & mask))
 336                 return;
 337
 338         cx_write(MO_TS_INTSTAT, status);
 339
 340         if (debug || (status & mask & ~0xff))
 341                 cx88_print_irqbits(core->name, "irq mpeg ",
 342                                    cx88_mpeg_irqs, status, mask);
 343
 344         /* risc op code error */
 345         if (status & (1 << 16)) {
 346                 printk(KERN_WARNING "%s: mpeg risc op code error\n",core->name);
 347                 cx_clear(MO_TS_DMACNTRL, 0x11);
 348                 cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);
 349         }
 350
 351         /* risc1 y */
 352         if (status & 0x01) {
 353                 dprintk( 1, "wake up\n" );
 354                 spin_lock(&dev->slock);
 355                 count = cx_read(MO_TS_GPCNT);
 356                 cx88_wakeup(dev->core, &dev->mpegq, count);
 357                 spin_unlock(&dev->slock);
 358         }
 359
 360         /* risc2 y */
 361         if (status & 0x10) {
 362                 spin_lock(&dev->slock);
 363                 cx8802_restart_queue(dev,&dev->mpegq);
 364                 spin_unlock(&dev->slock);
 365         }
 366
 367         /* other general errors */
 368         if (status & 0x1f0100) {
 369                 dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 );
 370                 spin_lock(&dev->slock);
 371                 cx8802_stop_dma(dev);
 372                 cx8802_restart_queue(dev,&dev->mpegq);
 373                 spin_unlock(&dev->slock);
 374         }
 375 }
 376
 377 #define MAX_IRQ_LOOP 10
 378
 379 static irqreturn_t cx8802_irq(int irq, void *dev_id)
 380 {
 381         struct cx8802_dev *dev = dev_id;
 382         struct cx88_core *core = dev->core;
 383         u32 status;
 384         int loop, handled = 0;
 385
 386         for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
 387                 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04);
 388                 if (0 == status)
 389                         goto out;
 390                 dprintk( 1, "cx8802_irq\n" );
 391                 dprintk( 1, "    loop: %d/%d\n", loop, MAX_IRQ_LOOP );
 392                 dprintk( 1, "    status: %d\n", status );
 393                 handled = 1;
 394                 cx_write(MO_PCI_INTSTAT, status);
 395
 396                 if (status & core->pci_irqmask)
 397                         cx88_core_irq(core,status);
 398                 if (status & 0x04)
 399                         cx8802_mpeg_irq(dev);
 400         };
 401         if (MAX_IRQ_LOOP == loop) {
 402                 dprintk( 0, "clearing mask\n" );
 403                 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
 404                        core->name);
 405                 cx_write(MO_PCI_INTMSK,0);
 406         }
 407
 408  out:
 409         return IRQ_RETVAL(handled);
 410 }
 411
 412 /* ----------------------------------------------------------- */
 413 /* exported stuff                                              */
 414
 415 int cx8802_init_common(struct cx8802_dev *dev)
 416 {
 417         struct cx88_core *core = dev->core;
 418         int err;
 419
 420         /* pci init */
 421         if (pci_enable_device(dev->pci))
 422                 return -EIO;
 423         pci_set_master(dev->pci);
 424         if (!pci_dma_supported(dev->pci,0xffffffff)) {
 425                 printk("%s/2: Oops: no 32bit PCI DMA ???\n",dev->core->name);
 426                 return -EIO;
 427         }
 428
 429         pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev);
 430         pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER,  &dev->pci_lat);
 431         printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, "
 432                "latency: %d, mmio: 0x%llx\n", dev->core->name,
 433                pci_name(dev->pci), dev->pci_rev, dev->pci->irq,
 434                dev->pci_lat,(unsigned long long)pci_resource_start(dev->pci,0));
 435
 436         /* initialize driver struct */
 437         spin_lock_init(&dev->slock);
 438
 439         /* init dma queue */
 440         INIT_LIST_HEAD(&dev->mpegq.active);
 441         INIT_LIST_HEAD(&dev->mpegq.queued);
 442         dev->mpegq.timeout.function = cx8802_timeout;
 443         dev->mpegq.timeout.data     = (unsigned long)dev;
 444         init_timer(&dev->mpegq.timeout);
 445         cx88_risc_stopper(dev->pci,&dev->mpegq.stopper,
 446                           MO_TS_DMACNTRL,0x11,0x00);
 447
 448         /* get irq */
 449         err = request_irq(dev->pci->irq, cx8802_irq,
 450                           IRQF_SHARED | IRQF_DISABLED, dev->core->name, dev);
 451         if (err < 0) {
 452                 printk(KERN_ERR "%s: can't get IRQ %d\n",
 453                        dev->core->name, dev->pci->irq);
 454                 return err;
 455         }
 456         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
 457
 458         /* everything worked */
 459         pci_set_drvdata(dev->pci,dev);
 460         return 0;
 461 }
 462
 463 void cx8802_fini_common(struct cx8802_dev *dev)
 464 {
 465         dprintk( 2, "cx8802_fini_common\n" );
 466         cx8802_stop_dma(dev);
 467         pci_disable_device(dev->pci);
 468
 469         /* unregister stuff */
 470         free_irq(dev->pci->irq, dev);
 471         pci_set_drvdata(dev->pci, NULL);
 472
 473         /* free memory */
 474         btcx_riscmem_free(dev->pci,&dev->mpegq.stopper);
 475 }
 476
 477 /* ----------------------------------------------------------- */
 478
 479 int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state)
 480 {
 481         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
 482         struct cx88_core *core = dev->core;
 483
 484         /* stop mpeg dma */
 485         spin_lock(&dev->slock);
 486         if (!list_empty(&dev->mpegq.active)) {
 487                 dprintk( 2, "suspend\n" );
 488                 printk("%s: suspend mpeg\n", core->name);
 489                 cx8802_stop_dma(dev);
 490                 del_timer(&dev->mpegq.timeout);
 491         }
 492         spin_unlock(&dev->slock);
 493
 494         /* FIXME -- shutdown device */
 495         cx88_shutdown(dev->core);
 496
 497         pci_save_state(pci_dev);
 498         if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
 499                 pci_disable_device(pci_dev);
 500                 dev->state.disabled = 1;
 501         }
 502         return 0;
 503 }
 504
 505 int cx8802_resume_common(struct pci_dev *pci_dev)
 506 {
 507         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
 508         struct cx88_core *core = dev->core;
 509         int err;
 510
 511         if (dev->state.disabled) {
 512                 err=pci_enable_device(pci_dev);
 513                 if (err) {
 514                         printk(KERN_ERR "%s: can't enable device\n",
 515                                                dev->core->name);
 516                         return err;
 517                 }
 518                 dev->state.disabled = 0;
 519         }
 520         err=pci_set_power_state(pci_dev, PCI_D0);
 521         if (err) {
 522                 printk(KERN_ERR "%s: can't enable device\n",
 523                                                dev->core->name);
 524                 pci_disable_device(pci_dev);
 525                 dev->state.disabled = 1;
 526
 527                 return err;
 528         }
 529         pci_restore_state(pci_dev);
 530
 531         /* FIXME: re-initialize hardware */
 532         cx88_reset(dev->core);
 533
 534         /* restart video+vbi capture */
 535         spin_lock(&dev->slock);
 536         if (!list_empty(&dev->mpegq.active)) {
 537                 printk("%s: resume mpeg\n", core->name);
 538                 cx8802_restart_queue(dev,&dev->mpegq);
 539         }
 540         spin_unlock(&dev->slock);
 541
 542         return 0;
 543 }
 544
 545 /* ----------------------------------------------------------- */
 546
 547 EXPORT_SYMBOL(cx8802_buf_prepare);
 548 EXPORT_SYMBOL(cx8802_buf_queue);
 549 EXPORT_SYMBOL(cx8802_cancel_buffers);
 550
 551 EXPORT_SYMBOL(cx8802_init_common);
 552 EXPORT_SYMBOL(cx8802_fini_common);
 553
 554 EXPORT_SYMBOL(cx8802_suspend_common);
 555 EXPORT_SYMBOL(cx8802_resume_common);
 556
 557 /* ----------------------------------------------------------- */
 558 /*
 559  * Local variables:
 560  * c-basic-offset: 8
 561  * End:
 562  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 563  */