git.oblomov.eu Git - linux-2.6/blob - drivers/net/r8169.c

   1 /*
   2 =========================================================================
   3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
   4  --------------------------------------------------------------------
   5
   6  History:
   7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
   8  May 20 2002    - Add link status force-mode and TBI mode support.
   9         2004    - Massive updates. See kernel SCM system for details.
  10 =========================================================================
  11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
  12          Command: 'insmod r8169 media = SET_MEDIA'
  13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
  14
  15          SET_MEDIA can be:
  16                 _10_Half        = 0x01
  17                 _10_Full        = 0x02
  18                 _100_Half       = 0x04
  19                 _100_Full       = 0x08
  20                 _1000_Full      = 0x10
  21
  22   2. Support TBI mode.
  23 =========================================================================
  24 VERSION 1.1     <2002/10/4>
  25
  26         The bit4:0 of MII register 4 is called "selector field", and have to be
  27         00001b to indicate support of IEEE std 802.3 during NWay process of
  28         exchanging Link Code Word (FLP).
  29
  30 VERSION 1.2     <2002/11/30>
  31
  32         - Large style cleanup
  33         - Use ether_crc in stock kernel (linux/crc32.h)
  34         - Copy mc_filter setup code from 8139cp
  35           (includes an optimization, and avoids set_bit use)
  36
  37 VERSION 1.6LK   <2004/04/14>
  38
  39         - Merge of Realtek's version 1.6
  40         - Conversion to DMA API
  41         - Suspend/resume
  42         - Endianness
  43         - Misc Rx/Tx bugs
  44
  45 VERSION 2.2LK   <2005/01/25>
  46
  47         - RX csum, TX csum/SG, TSO
  48         - VLAN
  49         - baby (< 7200) Jumbo frames support
  50         - Merge of Realtek's version 2.2 (new phy)
  51  */
  52
  53 #include <linux/module.h>
  54 #include <linux/moduleparam.h>
  55 #include <linux/pci.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/etherdevice.h>
  58 #include <linux/delay.h>
  59 #include <linux/ethtool.h>
  60 #include <linux/mii.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/crc32.h>
  63 #include <linux/in.h>
  64 #include <linux/ip.h>
  65 #include <linux/tcp.h>
  66 #include <linux/init.h>
  67 #include <linux/dma-mapping.h>
  68
  69 #include <asm/io.h>
  70 #include <asm/irq.h>
  71
  72 #ifdef CONFIG_R8169_NAPI
  73 #define NAPI_SUFFIX     "-NAPI"
  74 #else
  75 #define NAPI_SUFFIX     ""
  76 #endif
  77
  78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
  79 #define MODULENAME "r8169"
  80 #define PFX MODULENAME ": "
  81
  82 #ifdef RTL8169_DEBUG
  83 #define assert(expr) \
  84         if (!(expr)) {                                  \
  85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
  86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
  87         }
  88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
  89 #else
  90 #define assert(expr) do {} while (0)
  91 #define dprintk(fmt, args...)   do {} while (0)
  92 #endif /* RTL8169_DEBUG */
  93
  94 #define R8169_MSG_DEFAULT \
  95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
  96
  97 #define TX_BUFFS_AVAIL(tp) \
  98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
  99
 100 #ifdef CONFIG_R8169_NAPI
 101 #define rtl8169_rx_skb                  netif_receive_skb
 102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
 103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
 104 #else
 105 #define rtl8169_rx_skb                  netif_rx
 106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
 107 #define rtl8169_rx_quota(count, quota)  count
 108 #endif
 109
 110 /* media options */
 111 #define MAX_UNITS 8
 112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 113 static int num_media = 0;
 114
 115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
 116 static const int max_interrupt_work = 20;
 117
 118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
 120 static const int multicast_filter_limit = 32;
 121
 122 /* MAC address length */
 123 #define MAC_ADDR_LEN    6
 124
 125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
 126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
 129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
 130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
 131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
 132
 133 #define R8169_REGS_SIZE         256
 134 #define R8169_NAPI_WEIGHT       64
 135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
 136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
 137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
 138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
 139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
 140
 141 #define RTL8169_TX_TIMEOUT      (6*HZ)
 142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
 143
 144 /* write/read MMIO register */
 145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
 146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
 147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
 148 #define RTL_R8(reg)             readb (ioaddr + (reg))
 149 #define RTL_R16(reg)            readw (ioaddr + (reg))
 150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
 151
 152 enum mac_version {
 153         RTL_GIGA_MAC_VER_01 = 0x00,
 154         RTL_GIGA_MAC_VER_02 = 0x01,
 155         RTL_GIGA_MAC_VER_03 = 0x02,
 156         RTL_GIGA_MAC_VER_04 = 0x03,
 157         RTL_GIGA_MAC_VER_05 = 0x04,
 158         RTL_GIGA_MAC_VER_11 = 0x0b,
 159         RTL_GIGA_MAC_VER_12 = 0x0c,
 160         RTL_GIGA_MAC_VER_13 = 0x0d,
 161         RTL_GIGA_MAC_VER_14 = 0x0e,
 162         RTL_GIGA_MAC_VER_15 = 0x0f
 163 };
 164
 165 enum phy_version {
 166         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 167         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 168         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 169         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
 170         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
 171         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
 172 };
 173
 174 #define _R(NAME,MAC,MASK) \
 175         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
 176
 177 static const struct {
 178         const char *name;
 179         u8 mac_version;
 180         u32 RxConfigMask;       /* Clears the bits supported by this chip */
 181 } rtl_chip_info[] = {
 182         _R("RTL8169",           RTL_GIGA_MAC_VER_01, 0xff7e1880),
 183         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_02, 0xff7e1880),
 184         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_03, 0xff7e1880),
 185         _R("RTL8169sb/8110sb",  RTL_GIGA_MAC_VER_04, 0xff7e1880),
 186         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_05, 0xff7e1880),
 187         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
 188         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
 189         _R("RTL8101e",          RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
 190         _R("RTL8100e",          RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
 191         _R("RTL8100e",          RTL_GIGA_MAC_VER_15, 0xff7e1880)  // PCI-E 8139
 192 };
 193 #undef _R
 194
 195 enum cfg_version {
 196         RTL_CFG_0 = 0x00,
 197         RTL_CFG_1,
 198         RTL_CFG_2
 199 };
 200
 201 static const struct {
 202         unsigned int region;
 203         unsigned int align;
 204 } rtl_cfg_info[] = {
 205         [RTL_CFG_0] = { 1, NET_IP_ALIGN },
 206         [RTL_CFG_1] = { 2, NET_IP_ALIGN },
 207         [RTL_CFG_2] = { 2, 8 }
 208 };
 209
 210 static struct pci_device_id rtl8169_pci_tbl[] = {
 211         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8129), 0, 0, RTL_CFG_0 },
 212         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8136), 0, 0, RTL_CFG_2 },
 213         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8167), 0, 0, RTL_CFG_0 },
 214         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8168), 0, 0, RTL_CFG_2 },
 215         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), 0, 0, RTL_CFG_0 },
 216         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), 0, 0, RTL_CFG_0 },
 217         { PCI_DEVICE(0x16ec,                    0x0116), 0, 0, RTL_CFG_0 },
 218         { PCI_VENDOR_ID_LINKSYS,                0x1032,
 219                 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
 220         {0,},
 221 };
 222
 223 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
 224
 225 static int rx_copybreak = 200;
 226 static int use_dac;
 227 static struct {
 228         u32 msg_enable;
 229 } debug = { -1 };
 230
 231 enum RTL8169_registers {
 232         MAC0 = 0,               /* Ethernet hardware address. */
 233         MAR0 = 8,               /* Multicast filter. */
 234         CounterAddrLow = 0x10,
 235         CounterAddrHigh = 0x14,
 236         TxDescStartAddrLow = 0x20,
 237         TxDescStartAddrHigh = 0x24,
 238         TxHDescStartAddrLow = 0x28,
 239         TxHDescStartAddrHigh = 0x2c,
 240         FLASH = 0x30,
 241         ERSR = 0x36,
 242         ChipCmd = 0x37,
 243         TxPoll = 0x38,
 244         IntrMask = 0x3C,
 245         IntrStatus = 0x3E,
 246         TxConfig = 0x40,
 247         RxConfig = 0x44,
 248         RxMissed = 0x4C,
 249         Cfg9346 = 0x50,
 250         Config0 = 0x51,
 251         Config1 = 0x52,
 252         Config2 = 0x53,
 253         Config3 = 0x54,
 254         Config4 = 0x55,
 255         Config5 = 0x56,
 256         MultiIntr = 0x5C,
 257         PHYAR = 0x60,
 258         TBICSR = 0x64,
 259         TBI_ANAR = 0x68,
 260         TBI_LPAR = 0x6A,
 261         PHYstatus = 0x6C,
 262         RxMaxSize = 0xDA,
 263         CPlusCmd = 0xE0,
 264         IntrMitigate = 0xE2,
 265         RxDescAddrLow = 0xE4,
 266         RxDescAddrHigh = 0xE8,
 267         EarlyTxThres = 0xEC,
 268         FuncEvent = 0xF0,
 269         FuncEventMask = 0xF4,
 270         FuncPresetState = 0xF8,
 271         FuncForceEvent = 0xFC,
 272 };
 273
 274 enum RTL8169_register_content {
 275         /* InterruptStatusBits */
 276         SYSErr = 0x8000,
 277         PCSTimeout = 0x4000,
 278         SWInt = 0x0100,
 279         TxDescUnavail = 0x80,
 280         RxFIFOOver = 0x40,
 281         LinkChg = 0x20,
 282         RxOverflow = 0x10,
 283         TxErr = 0x08,
 284         TxOK = 0x04,
 285         RxErr = 0x02,
 286         RxOK = 0x01,
 287
 288         /* RxStatusDesc */
 289         RxFOVF  = (1 << 23),
 290         RxRWT   = (1 << 22),
 291         RxRES   = (1 << 21),
 292         RxRUNT  = (1 << 20),
 293         RxCRC   = (1 << 19),
 294
 295         /* ChipCmdBits */
 296         CmdReset = 0x10,
 297         CmdRxEnb = 0x08,
 298         CmdTxEnb = 0x04,
 299         RxBufEmpty = 0x01,
 300
 301         /* Cfg9346Bits */
 302         Cfg9346_Lock = 0x00,
 303         Cfg9346_Unlock = 0xC0,
 304
 305         /* rx_mode_bits */
 306         AcceptErr = 0x20,
 307         AcceptRunt = 0x10,
 308         AcceptBroadcast = 0x08,
 309         AcceptMulticast = 0x04,
 310         AcceptMyPhys = 0x02,
 311         AcceptAllPhys = 0x01,
 312
 313         /* RxConfigBits */
 314         RxCfgFIFOShift = 13,
 315         RxCfgDMAShift = 8,
 316
 317         /* TxConfigBits */
 318         TxInterFrameGapShift = 24,
 319         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
 320
 321         /* Config1 register p.24 */
 322         PMEnable        = (1 << 0),     /* Power Management Enable */
 323
 324         /* Config3 register p.25 */
 325         MagicPacket     = (1 << 5),     /* Wake up when receives a Magic Packet */
 326         LinkUp          = (1 << 4),     /* Wake up when the cable connection is re-established */
 327
 328         /* Config5 register p.27 */
 329         BWF             = (1 << 6),     /* Accept Broadcast wakeup frame */
 330         MWF             = (1 << 5),     /* Accept Multicast wakeup frame */
 331         UWF             = (1 << 4),     /* Accept Unicast wakeup frame */
 332         LanWake         = (1 << 1),     /* LanWake enable/disable */
 333         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
 334
 335         /* TBICSR p.28 */
 336         TBIReset        = 0x80000000,
 337         TBILoopback     = 0x40000000,
 338         TBINwEnable     = 0x20000000,
 339         TBINwRestart    = 0x10000000,
 340         TBILinkOk       = 0x02000000,
 341         TBINwComplete   = 0x01000000,
 342
 343         /* CPlusCmd p.31 */
 344         RxVlan          = (1 << 6),
 345         RxChkSum        = (1 << 5),
 346         PCIDAC          = (1 << 4),
 347         PCIMulRW        = (1 << 3),
 348
 349         /* rtl8169_PHYstatus */
 350         TBI_Enable = 0x80,
 351         TxFlowCtrl = 0x40,
 352         RxFlowCtrl = 0x20,
 353         _1000bpsF = 0x10,
 354         _100bps = 0x08,
 355         _10bps = 0x04,
 356         LinkStatus = 0x02,
 357         FullDup = 0x01,
 358
 359         /* _MediaType */
 360         _10_Half = 0x01,
 361         _10_Full = 0x02,
 362         _100_Half = 0x04,
 363         _100_Full = 0x08,
 364         _1000_Full = 0x10,
 365
 366         /* _TBICSRBit */
 367         TBILinkOK = 0x02000000,
 368
 369         /* DumpCounterCommand */
 370         CounterDump = 0x8,
 371 };
 372
 373 enum _DescStatusBit {
 374         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
 375         RingEnd         = (1 << 30), /* End of descriptor ring */
 376         FirstFrag       = (1 << 29), /* First segment of a packet */
 377         LastFrag        = (1 << 28), /* Final segment of a packet */
 378
 379         /* Tx private */
 380         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
 381         MSSShift        = 16,        /* MSS value position */
 382         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
 383         IPCS            = (1 << 18), /* Calculate IP checksum */
 384         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
 385         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
 386         TxVlanTag       = (1 << 17), /* Add VLAN tag */
 387
 388         /* Rx private */
 389         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
 390         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
 391
 392 #define RxProtoUDP      (PID1)
 393 #define RxProtoTCP      (PID0)
 394 #define RxProtoIP       (PID1 | PID0)
 395 #define RxProtoMask     RxProtoIP
 396
 397         IPFail          = (1 << 16), /* IP checksum failed */
 398         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
 399         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
 400         RxVlanTag       = (1 << 16), /* VLAN tag available */
 401 };
 402
 403 #define RsvdMask        0x3fffc000
 404
 405 struct TxDesc {
 406         u32 opts1;
 407         u32 opts2;
 408         u64 addr;
 409 };
 410
 411 struct RxDesc {
 412         u32 opts1;
 413         u32 opts2;
 414         u64 addr;
 415 };
 416
 417 struct ring_info {
 418         struct sk_buff  *skb;
 419         u32             len;
 420         u8              __pad[sizeof(void *) - sizeof(u32)];
 421 };
 422
 423 struct rtl8169_private {
 424         void __iomem *mmio_addr;        /* memory map physical address */
 425         struct pci_dev *pci_dev;        /* Index of PCI device */
 426         struct net_device_stats stats;  /* statistics of net device */
 427         spinlock_t lock;                /* spin lock flag */
 428         u32 msg_enable;
 429         int chipset;
 430         int mac_version;
 431         int phy_version;
 432         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
 433         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
 434         u32 dirty_rx;
 435         u32 dirty_tx;
 436         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
 437         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
 438         dma_addr_t TxPhyAddr;
 439         dma_addr_t RxPhyAddr;
 440         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
 441         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
 442         unsigned align;
 443         unsigned rx_buf_sz;
 444         struct timer_list timer;
 445         u16 cp_cmd;
 446         u16 intr_mask;
 447         int phy_auto_nego_reg;
 448         int phy_1000_ctrl_reg;
 449 #ifdef CONFIG_R8169_VLAN
 450         struct vlan_group *vlgrp;
 451 #endif
 452         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
 453         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
 454         void (*phy_reset_enable)(void __iomem *);
 455         unsigned int (*phy_reset_pending)(void __iomem *);
 456         unsigned int (*link_ok)(void __iomem *);
 457         struct work_struct task;
 458         unsigned wol_enabled : 1;
 459 };
 460
 461 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
 462 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
 463 module_param_array(media, int, &num_media, 0);
 464 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
 465 module_param(rx_copybreak, int, 0);
 466 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
 467 module_param(use_dac, int, 0);
 468 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
 469 module_param_named(debug, debug.msg_enable, int, 0);
 470 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
 471 MODULE_LICENSE("GPL");
 472 MODULE_VERSION(RTL8169_VERSION);
 473
 474 static int rtl8169_open(struct net_device *dev);
 475 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
 476 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance);
 477 static int rtl8169_init_ring(struct net_device *dev);
 478 static void rtl8169_hw_start(struct net_device *dev);
 479 static int rtl8169_close(struct net_device *dev);
 480 static void rtl8169_set_rx_mode(struct net_device *dev);
 481 static void rtl8169_tx_timeout(struct net_device *dev);
 482 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
 483 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
 484                                 void __iomem *);
 485 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
 486 static void rtl8169_down(struct net_device *dev);
 487
 488 #ifdef CONFIG_R8169_NAPI
 489 static int rtl8169_poll(struct net_device *dev, int *budget);
 490 #endif
 491
 492 static const u16 rtl8169_intr_mask =
 493         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
 494 static const u16 rtl8169_napi_event =
 495         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
 496 static const unsigned int rtl8169_rx_config =
 497         (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 498
 499 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
 500 {
 501         int i;
 502
 503         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
 504
 505         for (i = 20; i > 0; i--) {
 506                 /* Check if the RTL8169 has completed writing to the specified MII register */
 507                 if (!(RTL_R32(PHYAR) & 0x80000000))
 508                         break;
 509                 udelay(25);
 510         }
 511 }
 512
 513 static int mdio_read(void __iomem *ioaddr, int RegAddr)
 514 {
 515         int i, value = -1;
 516
 517         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
 518
 519         for (i = 20; i > 0; i--) {
 520                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
 521                 if (RTL_R32(PHYAR) & 0x80000000) {
 522                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
 523                         break;
 524                 }
 525                 udelay(25);
 526         }
 527         return value;
 528 }
 529
 530 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
 531 {
 532         RTL_W16(IntrMask, 0x0000);
 533
 534         RTL_W16(IntrStatus, 0xffff);
 535 }
 536
 537 static void rtl8169_asic_down(void __iomem *ioaddr)
 538 {
 539         RTL_W8(ChipCmd, 0x00);
 540         rtl8169_irq_mask_and_ack(ioaddr);
 541         RTL_R16(CPlusCmd);
 542 }
 543
 544 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
 545 {
 546         return RTL_R32(TBICSR) & TBIReset;
 547 }
 548
 549 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
 550 {
 551         return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET;
 552 }
 553
 554 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
 555 {
 556         return RTL_R32(TBICSR) & TBILinkOk;
 557 }
 558
 559 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
 560 {
 561         return RTL_R8(PHYstatus) & LinkStatus;
 562 }
 563
 564 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
 565 {
 566         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
 567 }
 568
 569 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
 570 {
 571         unsigned int val;
 572
 573         val = (mdio_read(ioaddr, MII_BMCR) | BMCR_RESET) & 0xffff;
 574         mdio_write(ioaddr, MII_BMCR, val);
 575 }
 576
 577 static void rtl8169_check_link_status(struct net_device *dev,
 578                                       struct rtl8169_private *tp, void __iomem *ioaddr)
 579 {
 580         unsigned long flags;
 581
 582         spin_lock_irqsave(&tp->lock, flags);
 583         if (tp->link_ok(ioaddr)) {
 584                 netif_carrier_on(dev);
 585                 if (netif_msg_ifup(tp))
 586                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
 587         } else {
 588                 if (netif_msg_ifdown(tp))
 589                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
 590                 netif_carrier_off(dev);
 591         }
 592         spin_unlock_irqrestore(&tp->lock, flags);
 593 }
 594
 595 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
 596 {
 597         struct {
 598                 u16 speed;
 599                 u8 duplex;
 600                 u8 autoneg;
 601                 u8 media;
 602         } link_settings[] = {
 603                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
 604                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
 605                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
 606                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
 607                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
 608                 /* Make TBI happy */
 609                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
 610         }, *p;
 611         unsigned char option;
 612
 613         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
 614
 615         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
 616                 printk(KERN_WARNING PFX "media option is deprecated.\n");
 617
 618         for (p = link_settings; p->media != 0xff; p++) {
 619                 if (p->media == option)
 620                         break;
 621         }
 622         *autoneg = p->autoneg;
 623         *speed = p->speed;
 624         *duplex = p->duplex;
 625 }
 626
 627 static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 628 {
 629         struct rtl8169_private *tp = netdev_priv(dev);
 630         void __iomem *ioaddr = tp->mmio_addr;
 631         u8 options;
 632
 633         wol->wolopts = 0;
 634
 635 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
 636         wol->supported = WAKE_ANY;
 637
 638         spin_lock_irq(&tp->lock);
 639
 640         options = RTL_R8(Config1);
 641         if (!(options & PMEnable))
 642                 goto out_unlock;
 643
 644         options = RTL_R8(Config3);
 645         if (options & LinkUp)
 646                 wol->wolopts |= WAKE_PHY;
 647         if (options & MagicPacket)
 648                 wol->wolopts |= WAKE_MAGIC;
 649
 650         options = RTL_R8(Config5);
 651         if (options & UWF)
 652                 wol->wolopts |= WAKE_UCAST;
 653         if (options & BWF)
 654                 wol->wolopts |= WAKE_BCAST;
 655         if (options & MWF)
 656                 wol->wolopts |= WAKE_MCAST;
 657
 658 out_unlock:
 659         spin_unlock_irq(&tp->lock);
 660 }
 661
 662 static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 663 {
 664         struct rtl8169_private *tp = netdev_priv(dev);
 665         void __iomem *ioaddr = tp->mmio_addr;
 666         int i;
 667         static struct {
 668                 u32 opt;
 669                 u16 reg;
 670                 u8  mask;
 671         } cfg[] = {
 672                 { WAKE_ANY,   Config1, PMEnable },
 673                 { WAKE_PHY,   Config3, LinkUp },
 674                 { WAKE_MAGIC, Config3, MagicPacket },
 675                 { WAKE_UCAST, Config5, UWF },
 676                 { WAKE_BCAST, Config5, BWF },
 677                 { WAKE_MCAST, Config5, MWF },
 678                 { WAKE_ANY,   Config5, LanWake }
 679         };
 680
 681         spin_lock_irq(&tp->lock);
 682
 683         RTL_W8(Cfg9346, Cfg9346_Unlock);
 684
 685         for (i = 0; i < ARRAY_SIZE(cfg); i++) {
 686                 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
 687                 if (wol->wolopts & cfg[i].opt)
 688                         options |= cfg[i].mask;
 689                 RTL_W8(cfg[i].reg, options);
 690         }
 691
 692         RTL_W8(Cfg9346, Cfg9346_Lock);
 693
 694         tp->wol_enabled = (wol->wolopts) ? 1 : 0;
 695
 696         spin_unlock_irq(&tp->lock);
 697
 698         return 0;
 699 }
 700
 701 static void rtl8169_get_drvinfo(struct net_device *dev,
 702                                 struct ethtool_drvinfo *info)
 703 {
 704         struct rtl8169_private *tp = netdev_priv(dev);
 705
 706         strcpy(info->driver, MODULENAME);
 707         strcpy(info->version, RTL8169_VERSION);
 708         strcpy(info->bus_info, pci_name(tp->pci_dev));
 709 }
 710
 711 static int rtl8169_get_regs_len(struct net_device *dev)
 712 {
 713         return R8169_REGS_SIZE;
 714 }
 715
 716 static int rtl8169_set_speed_tbi(struct net_device *dev,
 717                                  u8 autoneg, u16 speed, u8 duplex)
 718 {
 719         struct rtl8169_private *tp = netdev_priv(dev);
 720         void __iomem *ioaddr = tp->mmio_addr;
 721         int ret = 0;
 722         u32 reg;
 723
 724         reg = RTL_R32(TBICSR);
 725         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
 726             (duplex == DUPLEX_FULL)) {
 727                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
 728         } else if (autoneg == AUTONEG_ENABLE)
 729                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
 730         else {
 731                 if (netif_msg_link(tp)) {
 732                         printk(KERN_WARNING "%s: "
 733                                "incorrect speed setting refused in TBI mode\n",
 734                                dev->name);
 735                 }
 736                 ret = -EOPNOTSUPP;
 737         }
 738
 739         return ret;
 740 }
 741
 742 static int rtl8169_set_speed_xmii(struct net_device *dev,
 743                                   u8 autoneg, u16 speed, u8 duplex)
 744 {
 745         struct rtl8169_private *tp = netdev_priv(dev);
 746         void __iomem *ioaddr = tp->mmio_addr;
 747         int auto_nego, giga_ctrl;
 748
 749         auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
 750         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
 751                        ADVERTISE_100HALF | ADVERTISE_100FULL);
 752         giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
 753         giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 754
 755         if (autoneg == AUTONEG_ENABLE) {
 756                 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
 757                               ADVERTISE_100HALF | ADVERTISE_100FULL);
 758                 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 759         } else {
 760                 if (speed == SPEED_10)
 761                         auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 762                 else if (speed == SPEED_100)
 763                         auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 764                 else if (speed == SPEED_1000)
 765                         giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 766
 767                 if (duplex == DUPLEX_HALF)
 768                         auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
 769
 770                 if (duplex == DUPLEX_FULL)
 771                         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
 772
 773                 /* This tweak comes straight from Realtek's driver. */
 774                 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
 775                     (tp->mac_version == RTL_GIGA_MAC_VER_13)) {
 776                         auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
 777                 }
 778         }
 779
 780         /* The 8100e/8101e do Fast Ethernet only. */
 781         if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
 782             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
 783             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
 784                 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
 785                     netif_msg_link(tp)) {
 786                         printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
 787                                dev->name);
 788                 }
 789                 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 790         }
 791
 792         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 793
 794         tp->phy_auto_nego_reg = auto_nego;
 795         tp->phy_1000_ctrl_reg = giga_ctrl;
 796
 797         mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
 798         mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
 799         mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
 800         return 0;
 801 }
 802
 803 static int rtl8169_set_speed(struct net_device *dev,
 804                              u8 autoneg, u16 speed, u8 duplex)
 805 {
 806         struct rtl8169_private *tp = netdev_priv(dev);
 807         int ret;
 808
 809         ret = tp->set_speed(dev, autoneg, speed, duplex);
 810
 811         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
 812                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
 813
 814         return ret;
 815 }
 816
 817 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 818 {
 819         struct rtl8169_private *tp = netdev_priv(dev);
 820         unsigned long flags;
 821         int ret;
 822
 823         spin_lock_irqsave(&tp->lock, flags);
 824         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
 825         spin_unlock_irqrestore(&tp->lock, flags);
 826
 827         return ret;
 828 }
 829
 830 static u32 rtl8169_get_rx_csum(struct net_device *dev)
 831 {
 832         struct rtl8169_private *tp = netdev_priv(dev);
 833
 834         return tp->cp_cmd & RxChkSum;
 835 }
 836
 837 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
 838 {
 839         struct rtl8169_private *tp = netdev_priv(dev);
 840         void __iomem *ioaddr = tp->mmio_addr;
 841         unsigned long flags;
 842
 843         spin_lock_irqsave(&tp->lock, flags);
 844
 845         if (data)
 846                 tp->cp_cmd |= RxChkSum;
 847         else
 848                 tp->cp_cmd &= ~RxChkSum;
 849
 850         RTL_W16(CPlusCmd, tp->cp_cmd);
 851         RTL_R16(CPlusCmd);
 852
 853         spin_unlock_irqrestore(&tp->lock, flags);
 854
 855         return 0;
 856 }
 857
 858 #ifdef CONFIG_R8169_VLAN
 859
 860 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 861                                       struct sk_buff *skb)
 862 {
 863         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
 864                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
 865 }
 866
 867 static void rtl8169_vlan_rx_register(struct net_device *dev,
 868                                      struct vlan_group *grp)
 869 {
 870         struct rtl8169_private *tp = netdev_priv(dev);
 871         void __iomem *ioaddr = tp->mmio_addr;
 872         unsigned long flags;
 873
 874         spin_lock_irqsave(&tp->lock, flags);
 875         tp->vlgrp = grp;
 876         if (tp->vlgrp)
 877                 tp->cp_cmd |= RxVlan;
 878         else
 879                 tp->cp_cmd &= ~RxVlan;
 880         RTL_W16(CPlusCmd, tp->cp_cmd);
 881         RTL_R16(CPlusCmd);
 882         spin_unlock_irqrestore(&tp->lock, flags);
 883 }
 884
 885 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
 886 {
 887         struct rtl8169_private *tp = netdev_priv(dev);
 888         unsigned long flags;
 889
 890         spin_lock_irqsave(&tp->lock, flags);
 891         if (tp->vlgrp)
 892                 tp->vlgrp->vlan_devices[vid] = NULL;
 893         spin_unlock_irqrestore(&tp->lock, flags);
 894 }
 895
 896 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 897                                struct sk_buff *skb)
 898 {
 899         u32 opts2 = le32_to_cpu(desc->opts2);
 900         int ret;
 901
 902         if (tp->vlgrp && (opts2 & RxVlanTag)) {
 903                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
 904                                        swab16(opts2 & 0xffff));
 905                 ret = 0;
 906         } else
 907                 ret = -1;
 908         desc->opts2 = 0;
 909         return ret;
 910 }
 911
 912 #else /* !CONFIG_R8169_VLAN */
 913
 914 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 915                                       struct sk_buff *skb)
 916 {
 917         return 0;
 918 }
 919
 920 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 921                                struct sk_buff *skb)
 922 {
 923         return -1;
 924 }
 925
 926 #endif
 927
 928 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
 929 {
 930         struct rtl8169_private *tp = netdev_priv(dev);
 931         void __iomem *ioaddr = tp->mmio_addr;
 932         u32 status;
 933
 934         cmd->supported =
 935                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
 936         cmd->port = PORT_FIBRE;
 937         cmd->transceiver = XCVR_INTERNAL;
 938
 939         status = RTL_R32(TBICSR);
 940         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
 941         cmd->autoneg = !!(status & TBINwEnable);
 942
 943         cmd->speed = SPEED_1000;
 944         cmd->duplex = DUPLEX_FULL; /* Always set */
 945 }
 946
 947 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
 948 {
 949         struct rtl8169_private *tp = netdev_priv(dev);
 950         void __iomem *ioaddr = tp->mmio_addr;
 951         u8 status;
 952
 953         cmd->supported = SUPPORTED_10baseT_Half |
 954                          SUPPORTED_10baseT_Full |
 955                          SUPPORTED_100baseT_Half |
 956                          SUPPORTED_100baseT_Full |
 957                          SUPPORTED_1000baseT_Full |
 958                          SUPPORTED_Autoneg |
 959                          SUPPORTED_TP;
 960
 961         cmd->autoneg = 1;
 962         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
 963
 964         if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
 965                 cmd->advertising |= ADVERTISED_10baseT_Half;
 966         if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
 967                 cmd->advertising |= ADVERTISED_10baseT_Full;
 968         if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
 969                 cmd->advertising |= ADVERTISED_100baseT_Half;
 970         if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
 971                 cmd->advertising |= ADVERTISED_100baseT_Full;
 972         if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
 973                 cmd->advertising |= ADVERTISED_1000baseT_Full;
 974
 975         status = RTL_R8(PHYstatus);
 976
 977         if (status & _1000bpsF)
 978                 cmd->speed = SPEED_1000;
 979         else if (status & _100bps)
 980                 cmd->speed = SPEED_100;
 981         else if (status & _10bps)
 982                 cmd->speed = SPEED_10;
 983
 984         if (status & TxFlowCtrl)
 985                 cmd->advertising |= ADVERTISED_Asym_Pause;
 986         if (status & RxFlowCtrl)
 987                 cmd->advertising |= ADVERTISED_Pause;
 988
 989         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
 990                       DUPLEX_FULL : DUPLEX_HALF;
 991 }
 992
 993 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 994 {
 995         struct rtl8169_private *tp = netdev_priv(dev);
 996         unsigned long flags;
 997
 998         spin_lock_irqsave(&tp->lock, flags);
 999
1000         tp->get_settings(dev, cmd);
1001
1002         spin_unlock_irqrestore(&tp->lock, flags);
1003         return 0;
1004 }
1005
1006 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1007                              void *p)
1008 {
1009         struct rtl8169_private *tp = netdev_priv(dev);
1010         unsigned long flags;
1011
1012         if (regs->len > R8169_REGS_SIZE)
1013                 regs->len = R8169_REGS_SIZE;
1014
1015         spin_lock_irqsave(&tp->lock, flags);
1016         memcpy_fromio(p, tp->mmio_addr, regs->len);
1017         spin_unlock_irqrestore(&tp->lock, flags);
1018 }
1019
1020 static u32 rtl8169_get_msglevel(struct net_device *dev)
1021 {
1022         struct rtl8169_private *tp = netdev_priv(dev);
1023
1024         return tp->msg_enable;
1025 }
1026
1027 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1028 {
1029         struct rtl8169_private *tp = netdev_priv(dev);
1030
1031         tp->msg_enable = value;
1032 }
1033
1034 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1035         "tx_packets",
1036         "rx_packets",
1037         "tx_errors",
1038         "rx_errors",
1039         "rx_missed",
1040         "align_errors",
1041         "tx_single_collisions",
1042         "tx_multi_collisions",
1043         "unicast",
1044         "broadcast",
1045         "multicast",
1046         "tx_aborted",
1047         "tx_underrun",
1048 };
1049
1050 struct rtl8169_counters {
1051         u64     tx_packets;
1052         u64     rx_packets;
1053         u64     tx_errors;
1054         u32     rx_errors;
1055         u16     rx_missed;
1056         u16     align_errors;
1057         u32     tx_one_collision;
1058         u32     tx_multi_collision;
1059         u64     rx_unicast;
1060         u64     rx_broadcast;
1061         u32     rx_multicast;
1062         u16     tx_aborted;
1063         u16     tx_underun;
1064 };
1065
1066 static int rtl8169_get_stats_count(struct net_device *dev)
1067 {
1068         return ARRAY_SIZE(rtl8169_gstrings);
1069 }
1070
1071 static void rtl8169_get_ethtool_stats(struct net_device *dev,
1072                                       struct ethtool_stats *stats, u64 *data)
1073 {
1074         struct rtl8169_private *tp = netdev_priv(dev);
1075         void __iomem *ioaddr = tp->mmio_addr;
1076         struct rtl8169_counters *counters;
1077         dma_addr_t paddr;
1078         u32 cmd;
1079
1080         ASSERT_RTNL();
1081
1082         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
1083         if (!counters)
1084                 return;
1085
1086         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1087         cmd = (u64)paddr & DMA_32BIT_MASK;
1088         RTL_W32(CounterAddrLow, cmd);
1089         RTL_W32(CounterAddrLow, cmd | CounterDump);
1090
1091         while (RTL_R32(CounterAddrLow) & CounterDump) {
1092                 if (msleep_interruptible(1))
1093                         break;
1094         }
1095
1096         RTL_W32(CounterAddrLow, 0);
1097         RTL_W32(CounterAddrHigh, 0);
1098
1099         data[0] = le64_to_cpu(counters->tx_packets);
1100         data[1] = le64_to_cpu(counters->rx_packets);
1101         data[2] = le64_to_cpu(counters->tx_errors);
1102         data[3] = le32_to_cpu(counters->rx_errors);
1103         data[4] = le16_to_cpu(counters->rx_missed);
1104         data[5] = le16_to_cpu(counters->align_errors);
1105         data[6] = le32_to_cpu(counters->tx_one_collision);
1106         data[7] = le32_to_cpu(counters->tx_multi_collision);
1107         data[8] = le64_to_cpu(counters->rx_unicast);
1108         data[9] = le64_to_cpu(counters->rx_broadcast);
1109         data[10] = le32_to_cpu(counters->rx_multicast);
1110         data[11] = le16_to_cpu(counters->tx_aborted);
1111         data[12] = le16_to_cpu(counters->tx_underun);
1112
1113         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1114 }
1115
1116 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1117 {
1118         switch(stringset) {
1119         case ETH_SS_STATS:
1120                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1121                 break;
1122         }
1123 }
1124
1125
1126 static const struct ethtool_ops rtl8169_ethtool_ops = {
1127         .get_drvinfo            = rtl8169_get_drvinfo,
1128         .get_regs_len           = rtl8169_get_regs_len,
1129         .get_link               = ethtool_op_get_link,
1130         .get_settings           = rtl8169_get_settings,
1131         .set_settings           = rtl8169_set_settings,
1132         .get_msglevel           = rtl8169_get_msglevel,
1133         .set_msglevel           = rtl8169_set_msglevel,
1134         .get_rx_csum            = rtl8169_get_rx_csum,
1135         .set_rx_csum            = rtl8169_set_rx_csum,
1136         .get_tx_csum            = ethtool_op_get_tx_csum,
1137         .set_tx_csum            = ethtool_op_set_tx_csum,
1138         .get_sg                 = ethtool_op_get_sg,
1139         .set_sg                 = ethtool_op_set_sg,
1140         .get_tso                = ethtool_op_get_tso,
1141         .set_tso                = ethtool_op_set_tso,
1142         .get_regs               = rtl8169_get_regs,
1143         .get_wol                = rtl8169_get_wol,
1144         .set_wol                = rtl8169_set_wol,
1145         .get_strings            = rtl8169_get_strings,
1146         .get_stats_count        = rtl8169_get_stats_count,
1147         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1148         .get_perm_addr          = ethtool_op_get_perm_addr,
1149 };
1150
1151 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1152                                        int bitval)
1153 {
1154         int val;
1155
1156         val = mdio_read(ioaddr, reg);
1157         val = (bitval == 1) ?
1158                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1159         mdio_write(ioaddr, reg, val & 0xffff);
1160 }
1161
1162 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1163 {
1164         const struct {
1165                 u32 mask;
1166                 int mac_version;
1167         } mac_info[] = {
1168                 { 0x38800000,   RTL_GIGA_MAC_VER_15 },
1169                 { 0x38000000,   RTL_GIGA_MAC_VER_12 },
1170                 { 0x34000000,   RTL_GIGA_MAC_VER_13 },
1171                 { 0x30800000,   RTL_GIGA_MAC_VER_14 },
1172                 { 0x30000000,   RTL_GIGA_MAC_VER_11 },
1173                 { 0x18000000,   RTL_GIGA_MAC_VER_05 },
1174                 { 0x10000000,   RTL_GIGA_MAC_VER_04 },
1175                 { 0x04000000,   RTL_GIGA_MAC_VER_03 },
1176                 { 0x00800000,   RTL_GIGA_MAC_VER_02 },
1177                 { 0x00000000,   RTL_GIGA_MAC_VER_01 }   /* Catch-all */
1178         }, *p = mac_info;
1179         u32 reg;
1180
1181         reg = RTL_R32(TxConfig) & 0x7c800000;
1182         while ((reg & p->mask) != p->mask)
1183                 p++;
1184         tp->mac_version = p->mac_version;
1185 }
1186
1187 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1188 {
1189         dprintk("mac_version = 0x%02x\n", tp->mac_version);
1190 }
1191
1192 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1193 {
1194         const struct {
1195                 u16 mask;
1196                 u16 set;
1197                 int phy_version;
1198         } phy_info[] = {
1199                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1200                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1201                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1202                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1203         }, *p = phy_info;
1204         u16 reg;
1205
1206         reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff;
1207         while ((reg & p->mask) != p->set)
1208                 p++;
1209         tp->phy_version = p->phy_version;
1210 }
1211
1212 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1213 {
1214         struct {
1215                 int version;
1216                 char *msg;
1217                 u32 reg;
1218         } phy_print[] = {
1219                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1220                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1221                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1222                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1223                 { 0, NULL, 0x0000 }
1224         }, *p;
1225
1226         for (p = phy_print; p->msg; p++) {
1227                 if (tp->phy_version == p->version) {
1228                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1229                         return;
1230                 }
1231         }
1232         dprintk("phy_version == Unknown\n");
1233 }
1234
1235 static void rtl8169_hw_phy_config(struct net_device *dev)
1236 {
1237         struct rtl8169_private *tp = netdev_priv(dev);
1238         void __iomem *ioaddr = tp->mmio_addr;
1239         struct {
1240                 u16 regs[5]; /* Beware of bit-sign propagation */
1241         } phy_magic[5] = { {
1242                 { 0x0000,       //w 4 15 12 0
1243                   0x00a1,       //w 3 15 0 00a1
1244                   0x0008,       //w 2 15 0 0008
1245                   0x1020,       //w 1 15 0 1020
1246                   0x1000 } },{  //w 0 15 0 1000
1247                 { 0x7000,       //w 4 15 12 7
1248                   0xff41,       //w 3 15 0 ff41
1249                   0xde60,       //w 2 15 0 de60
1250                   0x0140,       //w 1 15 0 0140
1251                   0x0077 } },{  //w 0 15 0 0077
1252                 { 0xa000,       //w 4 15 12 a
1253                   0xdf01,       //w 3 15 0 df01
1254                   0xdf20,       //w 2 15 0 df20
1255                   0xff95,       //w 1 15 0 ff95
1256                   0xfa00 } },{  //w 0 15 0 fa00
1257                 { 0xb000,       //w 4 15 12 b
1258                   0xff41,       //w 3 15 0 ff41
1259                   0xde20,       //w 2 15 0 de20
1260                   0x0140,       //w 1 15 0 0140
1261                   0x00bb } },{  //w 0 15 0 00bb
1262                 { 0xf000,       //w 4 15 12 f
1263                   0xdf01,       //w 3 15 0 df01
1264                   0xdf20,       //w 2 15 0 df20
1265                   0xff95,       //w 1 15 0 ff95
1266                   0xbf00 }      //w 0 15 0 bf00
1267                 }
1268         }, *p = phy_magic;
1269         int i;
1270
1271         rtl8169_print_mac_version(tp);
1272         rtl8169_print_phy_version(tp);
1273
1274         if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
1275                 return;
1276         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1277                 return;
1278
1279         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1280         dprintk("Do final_reg2.cfg\n");
1281
1282         /* Shazam ! */
1283
1284         if (tp->mac_version == RTL_GIGA_MAC_VER_04) {
1285                 mdio_write(ioaddr, 31, 0x0001);
1286                 mdio_write(ioaddr,  9, 0x273a);
1287                 mdio_write(ioaddr, 14, 0x7bfb);
1288                 mdio_write(ioaddr, 27, 0x841e);
1289
1290                 mdio_write(ioaddr, 31, 0x0002);
1291                 mdio_write(ioaddr,  1, 0x90d0);
1292                 mdio_write(ioaddr, 31, 0x0000);
1293                 return;
1294         }
1295
1296         /* phy config for RTL8169s mac_version C chip */
1297         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1298         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1299         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1300         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1301
1302         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1303                 int val, pos = 4;
1304
1305                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1306                 mdio_write(ioaddr, pos, val);
1307                 while (--pos >= 0)
1308                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1309                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1310                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1311         }
1312         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1313 }
1314
1315 static void rtl8169_phy_timer(unsigned long __opaque)
1316 {
1317         struct net_device *dev = (struct net_device *)__opaque;
1318         struct rtl8169_private *tp = netdev_priv(dev);
1319         struct timer_list *timer = &tp->timer;
1320         void __iomem *ioaddr = tp->mmio_addr;
1321         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1322
1323         assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
1324         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1325
1326         if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
1327                 return;
1328
1329         spin_lock_irq(&tp->lock);
1330
1331         if (tp->phy_reset_pending(ioaddr)) {
1332                 /*
1333                  * A busy loop could burn quite a few cycles on nowadays CPU.
1334                  * Let's delay the execution of the timer for a few ticks.
1335                  */
1336                 timeout = HZ/10;
1337                 goto out_mod_timer;
1338         }
1339
1340         if (tp->link_ok(ioaddr))
1341                 goto out_unlock;
1342
1343         if (netif_msg_link(tp))
1344                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1345
1346         tp->phy_reset_enable(ioaddr);
1347
1348 out_mod_timer:
1349         mod_timer(timer, jiffies + timeout);
1350 out_unlock:
1351         spin_unlock_irq(&tp->lock);
1352 }
1353
1354 static inline void rtl8169_delete_timer(struct net_device *dev)
1355 {
1356         struct rtl8169_private *tp = netdev_priv(dev);
1357         struct timer_list *timer = &tp->timer;
1358
1359         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1360             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1361                 return;
1362
1363         del_timer_sync(timer);
1364 }
1365
1366 static inline void rtl8169_request_timer(struct net_device *dev)
1367 {
1368         struct rtl8169_private *tp = netdev_priv(dev);
1369         struct timer_list *timer = &tp->timer;
1370
1371         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1372             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1373                 return;
1374
1375         init_timer(timer);
1376         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1377         timer->data = (unsigned long)(dev);
1378         timer->function = rtl8169_phy_timer;
1379         add_timer(timer);
1380 }
1381
1382 #ifdef CONFIG_NET_POLL_CONTROLLER
1383 /*
1384  * Polling 'interrupt' - used by things like netconsole to send skbs
1385  * without having to re-enable interrupts. It's not called while
1386  * the interrupt routine is executing.
1387  */
1388 static void rtl8169_netpoll(struct net_device *dev)
1389 {
1390         struct rtl8169_private *tp = netdev_priv(dev);
1391         struct pci_dev *pdev = tp->pci_dev;
1392
1393         disable_irq(pdev->irq);
1394         rtl8169_interrupt(pdev->irq, dev);
1395         enable_irq(pdev->irq);
1396 }
1397 #endif
1398
1399 static void __rtl8169_set_mac_addr(struct net_device *dev, void __iomem *ioaddr)
1400 {
1401         unsigned int i, j;
1402
1403         RTL_W8(Cfg9346, Cfg9346_Unlock);
1404         for (i = 0; i < 2; i++) {
1405                 __le32 l = 0;
1406
1407                 for (j = 0; j < 4; j++) {
1408                         l <<= 8;
1409                         l |= dev->dev_addr[4*i + j];
1410                 }
1411                 RTL_W32(MAC0 + 4*i, cpu_to_be32(l));
1412         }
1413         RTL_W8(Cfg9346, Cfg9346_Lock);
1414 }
1415
1416 static int rtl8169_set_mac_addr(struct net_device *dev, void *p)
1417 {
1418         struct rtl8169_private *tp = netdev_priv(dev);
1419         struct sockaddr *addr = p;
1420
1421         if (!is_valid_ether_addr(addr->sa_data))
1422                 return -EINVAL;
1423
1424         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1425
1426         if (netif_running(dev)) {
1427                 spin_lock_irq(&tp->lock);
1428                 __rtl8169_set_mac_addr(dev, tp->mmio_addr);
1429                 spin_unlock_irq(&tp->lock);
1430         }
1431         return 0;
1432 }
1433
1434 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1435                                   void __iomem *ioaddr)
1436 {
1437         iounmap(ioaddr);
1438         pci_release_regions(pdev);
1439         pci_disable_device(pdev);
1440         free_netdev(dev);
1441 }
1442
1443 static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
1444 {
1445         void __iomem *ioaddr = tp->mmio_addr;
1446         static int board_idx = -1;
1447         u8 autoneg, duplex;
1448         u16 speed;
1449
1450         board_idx++;
1451
1452         rtl8169_hw_phy_config(dev);
1453
1454         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1455         RTL_W8(0x82, 0x01);
1456
1457         if (tp->mac_version < RTL_GIGA_MAC_VER_03) {
1458                 dprintk("Set PCI Latency=0x40\n");
1459                 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
1460         }
1461
1462         if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
1463                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1464                 RTL_W8(0x82, 0x01);
1465                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1466                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1467         }
1468
1469         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1470
1471         rtl8169_set_speed(dev, autoneg, speed, duplex);
1472
1473         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1474                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1475 }
1476
1477 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1478 {
1479         struct rtl8169_private *tp = netdev_priv(dev);
1480         struct mii_ioctl_data *data = if_mii(ifr);
1481
1482         if (!netif_running(dev))
1483                 return -ENODEV;
1484
1485         switch (cmd) {
1486         case SIOCGMIIPHY:
1487                 data->phy_id = 32; /* Internal PHY */
1488                 return 0;
1489
1490         case SIOCGMIIREG:
1491                 data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f);
1492                 return 0;
1493
1494         case SIOCSMIIREG:
1495                 if (!capable(CAP_NET_ADMIN))
1496                         return -EPERM;
1497                 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
1498                 return 0;
1499         }
1500         return -EOPNOTSUPP;
1501 }
1502
1503 static int __devinit
1504 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1505 {
1506         const unsigned int region = rtl_cfg_info[ent->driver_data].region;
1507         struct rtl8169_private *tp;
1508         struct net_device *dev;
1509         void __iomem *ioaddr;
1510         unsigned int i, pm_cap;
1511         int rc;
1512
1513         if (netif_msg_drv(&debug)) {
1514                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1515                        MODULENAME, RTL8169_VERSION);
1516         }
1517
1518         dev = alloc_etherdev(sizeof (*tp));
1519         if (!dev) {
1520                 if (netif_msg_drv(&debug))
1521                         dev_err(&pdev->dev, "unable to alloc new ethernet\n");
1522                 rc = -ENOMEM;
1523                 goto out;
1524         }
1525
1526         SET_MODULE_OWNER(dev);
1527         SET_NETDEV_DEV(dev, &pdev->dev);
1528         tp = netdev_priv(dev);
1529         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1530
1531         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1532         rc = pci_enable_device(pdev);
1533         if (rc < 0) {
1534                 if (netif_msg_probe(tp))
1535                         dev_err(&pdev->dev, "enable failure\n");
1536                 goto err_out_free_dev_1;
1537         }
1538
1539         rc = pci_set_mwi(pdev);
1540         if (rc < 0)
1541                 goto err_out_disable_2;
1542
1543         /* save power state before pci_enable_device overwrites it */
1544         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1545         if (pm_cap) {
1546                 u16 pwr_command, acpi_idle_state;
1547
1548                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1549                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1550         } else {
1551                 if (netif_msg_probe(tp)) {
1552                         dev_err(&pdev->dev,
1553                                 "PowerManagement capability not found.\n");
1554                 }
1555         }
1556
1557         /* make sure PCI base addr 1 is MMIO */
1558         if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
1559                 if (netif_msg_probe(tp)) {
1560                         dev_err(&pdev->dev,
1561                                 "region #%d not an MMIO resource, aborting\n",
1562                                 region);
1563                 }
1564                 rc = -ENODEV;
1565                 goto err_out_mwi_3;
1566         }
1567
1568         /* check for weird/broken PCI region reporting */
1569         if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
1570                 if (netif_msg_probe(tp)) {
1571                         dev_err(&pdev->dev,
1572                                 "Invalid PCI region size(s), aborting\n");
1573                 }
1574                 rc = -ENODEV;
1575                 goto err_out_mwi_3;
1576         }
1577
1578         rc = pci_request_regions(pdev, MODULENAME);
1579         if (rc < 0) {
1580                 if (netif_msg_probe(tp))
1581                         dev_err(&pdev->dev, "could not request regions.\n");
1582                 goto err_out_mwi_3;
1583         }
1584
1585         tp->cp_cmd = PCIMulRW | RxChkSum;
1586
1587         if ((sizeof(dma_addr_t) > 4) &&
1588             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1589                 tp->cp_cmd |= PCIDAC;
1590                 dev->features |= NETIF_F_HIGHDMA;
1591         } else {
1592                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1593                 if (rc < 0) {
1594                         if (netif_msg_probe(tp)) {
1595                                 dev_err(&pdev->dev,
1596                                         "DMA configuration failed.\n");
1597                         }
1598                         goto err_out_free_res_4;
1599                 }
1600         }
1601
1602         pci_set_master(pdev);
1603
1604         /* ioremap MMIO region */
1605         ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
1606         if (!ioaddr) {
1607                 if (netif_msg_probe(tp))
1608                         dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
1609                 rc = -EIO;
1610                 goto err_out_free_res_4;
1611         }
1612
1613         /* Unneeded ? Don't mess with Mrs. Murphy. */
1614         rtl8169_irq_mask_and_ack(ioaddr);
1615
1616         /* Soft reset the chip. */
1617         RTL_W8(ChipCmd, CmdReset);
1618
1619         /* Check that the chip has finished the reset. */
1620         for (i = 100; i > 0; i--) {
1621                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1622                         break;
1623                 msleep_interruptible(1);
1624         }
1625
1626         /* Identify chip attached to board */
1627         rtl8169_get_mac_version(tp, ioaddr);
1628         rtl8169_get_phy_version(tp, ioaddr);
1629
1630         rtl8169_print_mac_version(tp);
1631         rtl8169_print_phy_version(tp);
1632
1633         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1634                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1635                         break;
1636         }
1637         if (i < 0) {
1638                 /* Unknown chip: assume array element #0, original RTL-8169 */
1639                 if (netif_msg_probe(tp)) {
1640                         dev_printk(KERN_DEBUG, &pdev->dev,
1641                                 "unknown chip version, assuming %s\n",
1642                                 rtl_chip_info[0].name);
1643                 }
1644                 i++;
1645         }
1646         tp->chipset = i;
1647
1648         RTL_W8(Cfg9346, Cfg9346_Unlock);
1649         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1650         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1651         RTL_W8(Cfg9346, Cfg9346_Lock);
1652
1653         if (RTL_R8(PHYstatus) & TBI_Enable) {
1654                 tp->set_speed = rtl8169_set_speed_tbi;
1655                 tp->get_settings = rtl8169_gset_tbi;
1656                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1657                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1658                 tp->link_ok = rtl8169_tbi_link_ok;
1659
1660                 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
1661         } else {
1662                 tp->set_speed = rtl8169_set_speed_xmii;
1663                 tp->get_settings = rtl8169_gset_xmii;
1664                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1665                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1666                 tp->link_ok = rtl8169_xmii_link_ok;
1667
1668                 dev->do_ioctl = rtl8169_ioctl;
1669         }
1670
1671         /* Get MAC address.  FIXME: read EEPROM */
1672         for (i = 0; i < MAC_ADDR_LEN; i++)
1673                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1674         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1675
1676         dev->open = rtl8169_open;
1677         dev->hard_start_xmit = rtl8169_start_xmit;
1678         dev->get_stats = rtl8169_get_stats;
1679         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1680         dev->stop = rtl8169_close;
1681         dev->tx_timeout = rtl8169_tx_timeout;
1682         dev->set_multicast_list = rtl8169_set_rx_mode;
1683         dev->set_mac_address = rtl8169_set_mac_addr;
1684         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1685         dev->irq = pdev->irq;
1686         dev->base_addr = (unsigned long) ioaddr;
1687         dev->change_mtu = rtl8169_change_mtu;
1688
1689 #ifdef CONFIG_R8169_NAPI
1690         dev->poll = rtl8169_poll;
1691         dev->weight = R8169_NAPI_WEIGHT;
1692 #endif
1693
1694 #ifdef CONFIG_R8169_VLAN
1695         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1696         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1697         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1698 #endif
1699
1700 #ifdef CONFIG_NET_POLL_CONTROLLER
1701         dev->poll_controller = rtl8169_netpoll;
1702 #endif
1703
1704         tp->intr_mask = 0xffff;
1705         tp->pci_dev = pdev;
1706         tp->mmio_addr = ioaddr;
1707         tp->align = rtl_cfg_info[ent->driver_data].align;
1708
1709         spin_lock_init(&tp->lock);
1710
1711         rc = register_netdev(dev);
1712         if (rc < 0)
1713                 goto err_out_unmap_5;
1714
1715         pci_set_drvdata(pdev, dev);
1716
1717         if (netif_msg_probe(tp)) {
1718                 printk(KERN_INFO "%s: %s at 0x%lx, "
1719                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1720                        "IRQ %d\n",
1721                        dev->name,
1722                        rtl_chip_info[tp->chipset].name,
1723                        dev->base_addr,
1724                        dev->dev_addr[0], dev->dev_addr[1],
1725                        dev->dev_addr[2], dev->dev_addr[3],
1726                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1727         }
1728
1729         rtl8169_init_phy(dev, tp);
1730
1731 out:
1732         return rc;
1733
1734 err_out_unmap_5:
1735         iounmap(ioaddr);
1736 err_out_free_res_4:
1737         pci_release_regions(pdev);
1738 err_out_mwi_3:
1739         pci_clear_mwi(pdev);
1740 err_out_disable_2:
1741         pci_disable_device(pdev);
1742 err_out_free_dev_1:
1743         free_netdev(dev);
1744         goto out;
1745 }
1746
1747 static void __devexit
1748 rtl8169_remove_one(struct pci_dev *pdev)
1749 {
1750         struct net_device *dev = pci_get_drvdata(pdev);
1751         struct rtl8169_private *tp = netdev_priv(dev);
1752
1753         assert(dev != NULL);
1754         assert(tp != NULL);
1755
1756         unregister_netdev(dev);
1757         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1758         pci_set_drvdata(pdev, NULL);
1759 }
1760
1761 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1762                                   struct net_device *dev)
1763 {
1764         unsigned int mtu = dev->mtu;
1765
1766         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1767 }
1768
1769 static int rtl8169_open(struct net_device *dev)
1770 {
1771         struct rtl8169_private *tp = netdev_priv(dev);
1772         struct pci_dev *pdev = tp->pci_dev;
1773         int retval;
1774
1775         rtl8169_set_rxbufsize(tp, dev);
1776
1777         retval =
1778             request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev);
1779         if (retval < 0)
1780                 goto out;
1781
1782         retval = -ENOMEM;
1783
1784         /*
1785          * Rx and Tx desscriptors needs 256 bytes alignment.
1786          * pci_alloc_consistent provides more.
1787          */
1788         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1789                                                &tp->TxPhyAddr);
1790         if (!tp->TxDescArray)
1791                 goto err_free_irq;
1792
1793         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1794                                                &tp->RxPhyAddr);
1795         if (!tp->RxDescArray)
1796                 goto err_free_tx;
1797
1798         retval = rtl8169_init_ring(dev);
1799         if (retval < 0)
1800                 goto err_free_rx;
1801
1802         INIT_WORK(&tp->task, NULL, dev);
1803
1804         rtl8169_hw_start(dev);
1805
1806         rtl8169_request_timer(dev);
1807
1808         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1809 out:
1810         return retval;
1811
1812 err_free_rx:
1813         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1814                             tp->RxPhyAddr);
1815 err_free_tx:
1816         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1817                             tp->TxPhyAddr);
1818 err_free_irq:
1819         free_irq(dev->irq, dev);
1820         goto out;
1821 }
1822
1823 static void rtl8169_hw_reset(void __iomem *ioaddr)
1824 {
1825         /* Disable interrupts */
1826         rtl8169_irq_mask_and_ack(ioaddr);
1827
1828         /* Reset the chipset */
1829         RTL_W8(ChipCmd, CmdReset);
1830
1831         /* PCI commit */
1832         RTL_R8(ChipCmd);
1833 }
1834
1835 static void
1836 rtl8169_hw_start(struct net_device *dev)
1837 {
1838         struct rtl8169_private *tp = netdev_priv(dev);
1839         void __iomem *ioaddr = tp->mmio_addr;
1840         struct pci_dev *pdev = tp->pci_dev;
1841         u32 i;
1842
1843         /* Soft reset the chip. */
1844         RTL_W8(ChipCmd, CmdReset);
1845
1846         /* Check that the chip has finished the reset. */
1847         for (i = 100; i > 0; i--) {
1848                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1849                         break;
1850                 msleep_interruptible(1);
1851         }
1852
1853         if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
1854                 pci_write_config_word(pdev, 0x68, 0x00);
1855                 pci_write_config_word(pdev, 0x69, 0x08);
1856         }
1857
1858         /* Undocumented stuff. */
1859         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1860                 u16 cmd;
1861
1862                 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1863                 if ((RTL_R8(Config2) & 0x07) & 0x01)
1864                         RTL_W32(0x7c, 0x0007ffff);
1865
1866                 RTL_W32(0x7c, 0x0007ff00);
1867
1868                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1869                 cmd = cmd & 0xef;
1870                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1871         }
1872
1873
1874         RTL_W8(Cfg9346, Cfg9346_Unlock);
1875         RTL_W8(EarlyTxThres, EarlyTxThld);
1876
1877         /* Low hurts. Let's disable the filtering. */
1878         RTL_W16(RxMaxSize, 16383);
1879
1880         /* Set Rx Config register */
1881         i = rtl8169_rx_config |
1882                 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1883         RTL_W32(RxConfig, i);
1884
1885         /* Set DMA burst size and Interframe Gap Time */
1886         RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
1887                 (InterFrameGap << TxInterFrameGapShift));
1888
1889         tp->cp_cmd |= RTL_R16(CPlusCmd) | PCIMulRW;
1890
1891         if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1892             (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
1893                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1894                         "Bit-3 and bit-14 MUST be 1\n");
1895                 tp->cp_cmd |= (1 << 14);
1896         }
1897
1898         RTL_W16(CPlusCmd, tp->cp_cmd);
1899
1900         /*
1901          * Undocumented corner. Supposedly:
1902          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1903          */
1904         RTL_W16(IntrMitigate, 0x0000);
1905
1906         /*
1907          * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1908          * register to be written before TxDescAddrLow to work.
1909          * Switching from MMIO to I/O access fixes the issue as well.
1910          */
1911         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1912         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1913         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1914         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1915         RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1916         RTL_W8(Cfg9346, Cfg9346_Lock);
1917
1918         /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1919         RTL_R8(IntrMask);
1920
1921         RTL_W32(RxMissed, 0);
1922
1923         rtl8169_set_rx_mode(dev);
1924
1925         /* no early-rx interrupts */
1926         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1927
1928         /* Enable all known interrupts by setting the interrupt mask. */
1929         RTL_W16(IntrMask, rtl8169_intr_mask);
1930
1931         __rtl8169_set_mac_addr(dev, ioaddr);
1932
1933         netif_start_queue(dev);
1934 }
1935
1936 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1937 {
1938         struct rtl8169_private *tp = netdev_priv(dev);
1939         int ret = 0;
1940
1941         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1942                 return -EINVAL;
1943
1944         dev->mtu = new_mtu;
1945
1946         if (!netif_running(dev))
1947                 goto out;
1948
1949         rtl8169_down(dev);
1950
1951         rtl8169_set_rxbufsize(tp, dev);
1952
1953         ret = rtl8169_init_ring(dev);
1954         if (ret < 0)
1955                 goto out;
1956
1957         netif_poll_enable(dev);
1958
1959         rtl8169_hw_start(dev);
1960
1961         rtl8169_request_timer(dev);
1962
1963 out:
1964         return ret;
1965 }
1966
1967 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1968 {
1969         desc->addr = 0x0badbadbadbadbadull;
1970         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1971 }
1972
1973 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1974                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1975 {
1976         struct pci_dev *pdev = tp->pci_dev;
1977
1978         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1979                          PCI_DMA_FROMDEVICE);
1980         dev_kfree_skb(*sk_buff);
1981         *sk_buff = NULL;
1982         rtl8169_make_unusable_by_asic(desc);
1983 }
1984
1985 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1986 {
1987         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1988
1989         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1990 }
1991
1992 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1993                                        u32 rx_buf_sz)
1994 {
1995         desc->addr = cpu_to_le64(mapping);
1996         wmb();
1997         rtl8169_mark_to_asic(desc, rx_buf_sz);
1998 }
1999
2000 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
2001                                 struct RxDesc *desc, int rx_buf_sz,
2002                                 unsigned int align)
2003 {
2004         struct sk_buff *skb;
2005         dma_addr_t mapping;
2006         int ret = 0;
2007
2008         skb = dev_alloc_skb(rx_buf_sz + align);
2009         if (!skb)
2010                 goto err_out;
2011
2012         skb_reserve(skb, align);
2013         *sk_buff = skb;
2014
2015         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
2016                                  PCI_DMA_FROMDEVICE);
2017
2018         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
2019
2020 out:
2021         return ret;
2022
2023 err_out:
2024         ret = -ENOMEM;
2025         rtl8169_make_unusable_by_asic(desc);
2026         goto out;
2027 }
2028
2029 static void rtl8169_rx_clear(struct rtl8169_private *tp)
2030 {
2031         int i;
2032
2033         for (i = 0; i < NUM_RX_DESC; i++) {
2034                 if (tp->Rx_skbuff[i]) {
2035                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
2036                                             tp->RxDescArray + i);
2037                 }
2038         }
2039 }
2040
2041 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
2042                            u32 start, u32 end)
2043 {
2044         u32 cur;
2045
2046         for (cur = start; end - cur > 0; cur++) {
2047                 int ret, i = cur % NUM_RX_DESC;
2048
2049                 if (tp->Rx_skbuff[i])
2050                         continue;
2051
2052                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
2053                         tp->RxDescArray + i, tp->rx_buf_sz, tp->align);
2054                 if (ret < 0)
2055                         break;
2056         }
2057         return cur - start;
2058 }
2059
2060 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
2061 {
2062         desc->opts1 |= cpu_to_le32(RingEnd);
2063 }
2064
2065 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
2066 {
2067         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
2068 }
2069
2070 static int rtl8169_init_ring(struct net_device *dev)
2071 {
2072         struct rtl8169_private *tp = netdev_priv(dev);
2073
2074         rtl8169_init_ring_indexes(tp);
2075
2076         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
2077         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
2078
2079         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
2080                 goto err_out;
2081
2082         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
2083
2084         return 0;
2085
2086 err_out:
2087         rtl8169_rx_clear(tp);
2088         return -ENOMEM;
2089 }
2090
2091 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
2092                                  struct TxDesc *desc)
2093 {
2094         unsigned int len = tx_skb->len;
2095
2096         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
2097         desc->opts1 = 0x00;
2098         desc->opts2 = 0x00;
2099         desc->addr = 0x00;
2100         tx_skb->len = 0;
2101 }
2102
2103 static void rtl8169_tx_clear(struct rtl8169_private *tp)
2104 {
2105         unsigned int i;
2106
2107         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
2108                 unsigned int entry = i % NUM_TX_DESC;
2109                 struct ring_info *tx_skb = tp->tx_skb + entry;
2110                 unsigned int len = tx_skb->len;
2111
2112                 if (len) {
2113                         struct sk_buff *skb = tx_skb->skb;
2114
2115                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
2116                                              tp->TxDescArray + entry);
2117                         if (skb) {
2118                                 dev_kfree_skb(skb);
2119                                 tx_skb->skb = NULL;
2120                         }
2121                         tp->stats.tx_dropped++;
2122                 }
2123         }
2124         tp->cur_tx = tp->dirty_tx = 0;
2125 }
2126
2127 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
2128 {
2129         struct rtl8169_private *tp = netdev_priv(dev);
2130
2131         PREPARE_WORK(&tp->task, task, dev);
2132         schedule_delayed_work(&tp->task, 4);
2133 }
2134
2135 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2136 {
2137         struct rtl8169_private *tp = netdev_priv(dev);
2138         void __iomem *ioaddr = tp->mmio_addr;
2139
2140         synchronize_irq(dev->irq);
2141
2142         /* Wait for any pending NAPI task to complete */
2143         netif_poll_disable(dev);
2144
2145         rtl8169_irq_mask_and_ack(ioaddr);
2146
2147         netif_poll_enable(dev);
2148 }
2149
2150 static void rtl8169_reinit_task(void *_data)
2151 {
2152         struct net_device *dev = _data;
2153         int ret;
2154
2155         if (netif_running(dev)) {
2156                 rtl8169_wait_for_quiescence(dev);
2157                 rtl8169_close(dev);
2158         }
2159
2160         ret = rtl8169_open(dev);
2161         if (unlikely(ret < 0)) {
2162                 if (net_ratelimit()) {
2163                         struct rtl8169_private *tp = netdev_priv(dev);
2164
2165                         if (netif_msg_drv(tp)) {
2166                                 printk(PFX KERN_ERR
2167                                        "%s: reinit failure (status = %d)."
2168                                        " Rescheduling.\n", dev->name, ret);
2169                         }
2170                 }
2171                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2172         }
2173 }
2174
2175 static void rtl8169_reset_task(void *_data)
2176 {
2177         struct net_device *dev = _data;
2178         struct rtl8169_private *tp = netdev_priv(dev);
2179
2180         if (!netif_running(dev))
2181                 return;
2182
2183         rtl8169_wait_for_quiescence(dev);
2184
2185         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2186         rtl8169_tx_clear(tp);
2187
2188         if (tp->dirty_rx == tp->cur_rx) {
2189                 rtl8169_init_ring_indexes(tp);
2190                 rtl8169_hw_start(dev);
2191                 netif_wake_queue(dev);
2192         } else {
2193                 if (net_ratelimit()) {
2194                         struct rtl8169_private *tp = netdev_priv(dev);
2195
2196                         if (netif_msg_intr(tp)) {
2197                                 printk(PFX KERN_EMERG
2198                                        "%s: Rx buffers shortage\n", dev->name);
2199                         }
2200                 }
2201                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2202         }
2203 }
2204
2205 static void rtl8169_tx_timeout(struct net_device *dev)
2206 {
2207         struct rtl8169_private *tp = netdev_priv(dev);
2208
2209         rtl8169_hw_reset(tp->mmio_addr);
2210
2211         /* Let's wait a bit while any (async) irq lands on */
2212         rtl8169_schedule_work(dev, rtl8169_reset_task);
2213 }
2214
2215 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2216                               u32 opts1)
2217 {
2218         struct skb_shared_info *info = skb_shinfo(skb);
2219         unsigned int cur_frag, entry;
2220         struct TxDesc *txd;
2221
2222         entry = tp->cur_tx;
2223         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2224                 skb_frag_t *frag = info->frags + cur_frag;
2225                 dma_addr_t mapping;
2226                 u32 status, len;
2227                 void *addr;
2228
2229                 entry = (entry + 1) % NUM_TX_DESC;
2230
2231                 txd = tp->TxDescArray + entry;
2232                 len = frag->size;
2233                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2234                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2235
2236                 /* anti gcc 2.95.3 bugware (sic) */
2237                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2238
2239                 txd->opts1 = cpu_to_le32(status);
2240                 txd->addr = cpu_to_le64(mapping);
2241
2242                 tp->tx_skb[entry].len = len;
2243         }
2244
2245         if (cur_frag) {
2246                 tp->tx_skb[entry].skb = skb;
2247                 txd->opts1 |= cpu_to_le32(LastFrag);
2248         }
2249
2250         return cur_frag;
2251 }
2252
2253 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2254 {
2255         if (dev->features & NETIF_F_TSO) {
2256                 u32 mss = skb_shinfo(skb)->gso_size;
2257
2258                 if (mss)
2259                         return LargeSend | ((mss & MSSMask) << MSSShift);
2260         }
2261         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2262                 const struct iphdr *ip = skb->nh.iph;
2263
2264                 if (ip->protocol == IPPROTO_TCP)
2265                         return IPCS | TCPCS;
2266                 else if (ip->protocol == IPPROTO_UDP)
2267                         return IPCS | UDPCS;
2268                 WARN_ON(1);     /* we need a WARN() */
2269         }
2270         return 0;
2271 }
2272
2273 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2274 {
2275         struct rtl8169_private *tp = netdev_priv(dev);
2276         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2277         struct TxDesc *txd = tp->TxDescArray + entry;
2278         void __iomem *ioaddr = tp->mmio_addr;
2279         dma_addr_t mapping;
2280         u32 status, len;
2281         u32 opts1;
2282         int ret = NETDEV_TX_OK;
2283
2284         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2285                 if (netif_msg_drv(tp)) {
2286                         printk(KERN_ERR
2287                                "%s: BUG! Tx Ring full when queue awake!\n",
2288                                dev->name);
2289                 }
2290                 goto err_stop;
2291         }
2292
2293         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2294                 goto err_stop;
2295
2296         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2297
2298         frags = rtl8169_xmit_frags(tp, skb, opts1);
2299         if (frags) {
2300                 len = skb_headlen(skb);
2301                 opts1 |= FirstFrag;
2302         } else {
2303                 len = skb->len;
2304
2305                 if (unlikely(len < ETH_ZLEN)) {
2306                         if (skb_padto(skb, ETH_ZLEN))
2307                                 goto err_update_stats;
2308                         len = ETH_ZLEN;
2309                 }
2310
2311                 opts1 |= FirstFrag | LastFrag;
2312                 tp->tx_skb[entry].skb = skb;
2313         }
2314
2315         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2316
2317         tp->tx_skb[entry].len = len;
2318         txd->addr = cpu_to_le64(mapping);
2319         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2320
2321         wmb();
2322
2323         /* anti gcc 2.95.3 bugware (sic) */
2324         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2325         txd->opts1 = cpu_to_le32(status);
2326
2327         dev->trans_start = jiffies;
2328
2329         tp->cur_tx += frags + 1;
2330
2331         smp_wmb();
2332
2333         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2334
2335         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2336                 netif_stop_queue(dev);
2337                 smp_rmb();
2338                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2339                         netif_wake_queue(dev);
2340         }
2341
2342 out:
2343         return ret;
2344
2345 err_stop:
2346         netif_stop_queue(dev);
2347         ret = NETDEV_TX_BUSY;
2348 err_update_stats:
2349         tp->stats.tx_dropped++;
2350         goto out;
2351 }
2352
2353 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2354 {
2355         struct rtl8169_private *tp = netdev_priv(dev);
2356         struct pci_dev *pdev = tp->pci_dev;
2357         void __iomem *ioaddr = tp->mmio_addr;
2358         u16 pci_status, pci_cmd;
2359
2360         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2361         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2362
2363         if (netif_msg_intr(tp)) {
2364                 printk(KERN_ERR
2365                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2366                        dev->name, pci_cmd, pci_status);
2367         }
2368
2369         /*
2370          * The recovery sequence below admits a very elaborated explanation:
2371          * - it seems to work;
2372          * - I did not see what else could be done.
2373          *
2374          * Feel free to adjust to your needs.
2375          */
2376         pci_write_config_word(pdev, PCI_COMMAND,
2377                               pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2378
2379         pci_write_config_word(pdev, PCI_STATUS,
2380                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2381                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2382                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2383
2384         /* The infamous DAC f*ckup only happens at boot time */
2385         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2386                 if (netif_msg_intr(tp))
2387                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2388                 tp->cp_cmd &= ~PCIDAC;
2389                 RTL_W16(CPlusCmd, tp->cp_cmd);
2390                 dev->features &= ~NETIF_F_HIGHDMA;
2391                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2392         }
2393
2394         rtl8169_hw_reset(ioaddr);
2395 }
2396
2397 static void
2398 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2399                      void __iomem *ioaddr)
2400 {
2401         unsigned int dirty_tx, tx_left;
2402
2403         assert(dev != NULL);
2404         assert(tp != NULL);
2405         assert(ioaddr != NULL);
2406
2407         dirty_tx = tp->dirty_tx;
2408         smp_rmb();
2409         tx_left = tp->cur_tx - dirty_tx;
2410
2411         while (tx_left > 0) {
2412                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2413                 struct ring_info *tx_skb = tp->tx_skb + entry;
2414                 u32 len = tx_skb->len;
2415                 u32 status;
2416
2417                 rmb();
2418                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2419                 if (status & DescOwn)
2420                         break;
2421
2422                 tp->stats.tx_bytes += len;
2423                 tp->stats.tx_packets++;
2424
2425                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2426
2427                 if (status & LastFrag) {
2428                         dev_kfree_skb_irq(tx_skb->skb);
2429                         tx_skb->skb = NULL;
2430                 }
2431                 dirty_tx++;
2432                 tx_left--;
2433         }
2434
2435         if (tp->dirty_tx != dirty_tx) {
2436                 tp->dirty_tx = dirty_tx;
2437                 smp_wmb();
2438                 if (netif_queue_stopped(dev) &&
2439                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2440                         netif_wake_queue(dev);
2441                 }
2442         }
2443 }
2444
2445 static inline int rtl8169_fragmented_frame(u32 status)
2446 {
2447         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2448 }
2449
2450 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2451 {
2452         u32 opts1 = le32_to_cpu(desc->opts1);
2453         u32 status = opts1 & RxProtoMask;
2454
2455         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2456             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2457             ((status == RxProtoIP) && !(opts1 & IPFail)))
2458                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2459         else
2460                 skb->ip_summed = CHECKSUM_NONE;
2461 }
2462
2463 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2464                                       struct RxDesc *desc, int rx_buf_sz,
2465                                       unsigned int align)
2466 {
2467         int ret = -1;
2468
2469         if (pkt_size < rx_copybreak) {
2470                 struct sk_buff *skb;
2471
2472                 skb = dev_alloc_skb(pkt_size + align);
2473                 if (skb) {
2474                         skb_reserve(skb, align);
2475                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2476                         *sk_buff = skb;
2477                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2478                         ret = 0;
2479                 }
2480         }
2481         return ret;
2482 }
2483
2484 static int
2485 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2486                      void __iomem *ioaddr)
2487 {
2488         unsigned int cur_rx, rx_left;
2489         unsigned int delta, count;
2490
2491         assert(dev != NULL);
2492         assert(tp != NULL);
2493         assert(ioaddr != NULL);
2494
2495         cur_rx = tp->cur_rx;
2496         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2497         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2498
2499         for (; rx_left > 0; rx_left--, cur_rx++) {
2500                 unsigned int entry = cur_rx % NUM_RX_DESC;
2501                 struct RxDesc *desc = tp->RxDescArray + entry;
2502                 u32 status;
2503
2504                 rmb();
2505                 status = le32_to_cpu(desc->opts1);
2506
2507                 if (status & DescOwn)
2508                         break;
2509                 if (unlikely(status & RxRES)) {
2510                         if (netif_msg_rx_err(tp)) {
2511                                 printk(KERN_INFO
2512                                        "%s: Rx ERROR. status = %08x\n",
2513                                        dev->name, status);
2514                         }
2515                         tp->stats.rx_errors++;
2516                         if (status & (RxRWT | RxRUNT))
2517                                 tp->stats.rx_length_errors++;
2518                         if (status & RxCRC)
2519                                 tp->stats.rx_crc_errors++;
2520                         if (status & RxFOVF) {
2521                                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2522                                 tp->stats.rx_fifo_errors++;
2523                         }
2524                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2525                 } else {
2526                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2527                         int pkt_size = (status & 0x00001FFF) - 4;
2528                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2529                                 size_t, int) = pci_dma_sync_single_for_device;
2530
2531                         /*
2532                          * The driver does not support incoming fragmented
2533                          * frames. They are seen as a symptom of over-mtu
2534                          * sized frames.
2535                          */
2536                         if (unlikely(rtl8169_fragmented_frame(status))) {
2537                                 tp->stats.rx_dropped++;
2538                                 tp->stats.rx_length_errors++;
2539                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2540                                 continue;
2541                         }
2542
2543                         rtl8169_rx_csum(skb, desc);
2544
2545                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2546                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2547                                 PCI_DMA_FROMDEVICE);
2548
2549                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2550                                                 tp->rx_buf_sz, tp->align)) {
2551                                 pci_action = pci_unmap_single;
2552                                 tp->Rx_skbuff[entry] = NULL;
2553                         }
2554
2555                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2556                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2557
2558                         skb->dev = dev;
2559                         skb_put(skb, pkt_size);
2560                         skb->protocol = eth_type_trans(skb, dev);
2561
2562                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2563                                 rtl8169_rx_skb(skb);
2564
2565                         dev->last_rx = jiffies;
2566                         tp->stats.rx_bytes += pkt_size;
2567                         tp->stats.rx_packets++;
2568                 }
2569         }
2570
2571         count = cur_rx - tp->cur_rx;
2572         tp->cur_rx = cur_rx;
2573
2574         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2575         if (!delta && count && netif_msg_intr(tp))
2576                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2577         tp->dirty_rx += delta;
2578
2579         /*
2580          * FIXME: until there is periodic timer to try and refill the ring,
2581          * a temporary shortage may definitely kill the Rx process.
2582          * - disable the asic to try and avoid an overflow and kick it again
2583          *   after refill ?
2584          * - how do others driver handle this condition (Uh oh...).
2585          */
2586         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2587                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2588
2589         return count;
2590 }
2591
2592 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2593 static irqreturn_t
2594 rtl8169_interrupt(int irq, void *dev_instance)
2595 {
2596         struct net_device *dev = (struct net_device *) dev_instance;
2597         struct rtl8169_private *tp = netdev_priv(dev);
2598         int boguscnt = max_interrupt_work;
2599         void __iomem *ioaddr = tp->mmio_addr;
2600         int status;
2601         int handled = 0;
2602
2603         do {
2604                 status = RTL_R16(IntrStatus);
2605
2606                 /* hotplug/major error/no more work/shared irq */
2607                 if ((status == 0xFFFF) || !status)
2608                         break;
2609
2610                 handled = 1;
2611
2612                 if (unlikely(!netif_running(dev))) {
2613                         rtl8169_asic_down(ioaddr);
2614                         goto out;
2615                 }
2616
2617                 status &= tp->intr_mask;
2618                 RTL_W16(IntrStatus,
2619                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2620
2621                 if (!(status & rtl8169_intr_mask))
2622                         break;
2623
2624                 if (unlikely(status & SYSErr)) {
2625                         rtl8169_pcierr_interrupt(dev);
2626                         break;
2627                 }
2628
2629                 if (status & LinkChg)
2630                         rtl8169_check_link_status(dev, tp, ioaddr);
2631
2632 #ifdef CONFIG_R8169_NAPI
2633                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2634                 tp->intr_mask = ~rtl8169_napi_event;
2635
2636                 if (likely(netif_rx_schedule_prep(dev)))
2637                         __netif_rx_schedule(dev);
2638                 else if (netif_msg_intr(tp)) {
2639                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2640                                dev->name, status);
2641                 }
2642                 break;
2643 #else
2644                 /* Rx interrupt */
2645                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2646                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2647                 }
2648                 /* Tx interrupt */
2649                 if (status & (TxOK | TxErr))
2650                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2651 #endif
2652
2653                 boguscnt--;
2654         } while (boguscnt > 0);
2655
2656         if (boguscnt <= 0) {
2657                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2658                         printk(KERN_WARNING
2659                                "%s: Too much work at interrupt!\n", dev->name);
2660                 }
2661                 /* Clear all interrupt sources. */
2662                 RTL_W16(IntrStatus, 0xffff);
2663         }
2664 out:
2665         return IRQ_RETVAL(handled);
2666 }
2667
2668 #ifdef CONFIG_R8169_NAPI
2669 static int rtl8169_poll(struct net_device *dev, int *budget)
2670 {
2671         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2672         struct rtl8169_private *tp = netdev_priv(dev);
2673         void __iomem *ioaddr = tp->mmio_addr;
2674
2675         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2676         rtl8169_tx_interrupt(dev, tp, ioaddr);
2677
2678         *budget -= work_done;
2679         dev->quota -= work_done;
2680
2681         if (work_done < work_to_do) {
2682                 netif_rx_complete(dev);
2683                 tp->intr_mask = 0xffff;
2684                 /*
2685                  * 20040426: the barrier is not strictly required but the
2686                  * behavior of the irq handler could be less predictable
2687                  * without it. Btw, the lack of flush for the posted pci
2688                  * write is safe - FR
2689                  */
2690                 smp_wmb();
2691                 RTL_W16(IntrMask, rtl8169_intr_mask);
2692         }
2693
2694         return (work_done >= work_to_do);
2695 }
2696 #endif
2697
2698 static void rtl8169_down(struct net_device *dev)
2699 {
2700         struct rtl8169_private *tp = netdev_priv(dev);
2701         void __iomem *ioaddr = tp->mmio_addr;
2702         unsigned int poll_locked = 0;
2703
2704         rtl8169_delete_timer(dev);
2705
2706         netif_stop_queue(dev);
2707
2708         flush_scheduled_work();
2709
2710 core_down:
2711         spin_lock_irq(&tp->lock);
2712
2713         rtl8169_asic_down(ioaddr);
2714
2715         /* Update the error counts. */
2716         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2717         RTL_W32(RxMissed, 0);
2718
2719         spin_unlock_irq(&tp->lock);
2720
2721         synchronize_irq(dev->irq);
2722
2723         if (!poll_locked) {
2724                 netif_poll_disable(dev);
2725                 poll_locked++;
2726         }
2727
2728         /* Give a racing hard_start_xmit a few cycles to complete. */
2729         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2730
2731         /*
2732          * And now for the 50k$ question: are IRQ disabled or not ?
2733          *
2734          * Two paths lead here:
2735          * 1) dev->close
2736          *    -> netif_running() is available to sync the current code and the
2737          *       IRQ handler. See rtl8169_interrupt for details.
2738          * 2) dev->change_mtu
2739          *    -> rtl8169_poll can not be issued again and re-enable the
2740          *       interruptions. Let's simply issue the IRQ down sequence again.
2741          */
2742         if (RTL_R16(IntrMask))
2743                 goto core_down;
2744
2745         rtl8169_tx_clear(tp);
2746
2747         rtl8169_rx_clear(tp);
2748 }
2749
2750 static int rtl8169_close(struct net_device *dev)
2751 {
2752         struct rtl8169_private *tp = netdev_priv(dev);
2753         struct pci_dev *pdev = tp->pci_dev;
2754
2755         rtl8169_down(dev);
2756
2757         free_irq(dev->irq, dev);
2758
2759         netif_poll_enable(dev);
2760
2761         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2762                             tp->RxPhyAddr);
2763         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2764                             tp->TxPhyAddr);
2765         tp->TxDescArray = NULL;
2766         tp->RxDescArray = NULL;
2767
2768         return 0;
2769 }
2770
2771 static void
2772 rtl8169_set_rx_mode(struct net_device *dev)
2773 {
2774         struct rtl8169_private *tp = netdev_priv(dev);
2775         void __iomem *ioaddr = tp->mmio_addr;
2776         unsigned long flags;
2777         u32 mc_filter[2];       /* Multicast hash filter */
2778         int i, rx_mode;
2779         u32 tmp = 0;
2780
2781         if (dev->flags & IFF_PROMISC) {
2782                 /* Unconditionally log net taps. */
2783                 if (netif_msg_link(tp)) {
2784                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2785                                dev->name);
2786                 }
2787                 rx_mode =
2788                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2789                     AcceptAllPhys;
2790                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2791         } else if ((dev->mc_count > multicast_filter_limit)
2792                    || (dev->flags & IFF_ALLMULTI)) {
2793                 /* Too many to filter perfectly -- accept all multicasts. */
2794                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2795                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2796         } else {
2797                 struct dev_mc_list *mclist;
2798                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2799                 mc_filter[1] = mc_filter[0] = 0;
2800                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2801                      i++, mclist = mclist->next) {
2802                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2803                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2804                         rx_mode |= AcceptMulticast;
2805                 }
2806         }
2807
2808         spin_lock_irqsave(&tp->lock, flags);
2809
2810         tmp = rtl8169_rx_config | rx_mode |
2811               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2812
2813         if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
2814             (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
2815             (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
2816             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
2817             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
2818                 mc_filter[0] = 0xffffffff;
2819                 mc_filter[1] = 0xffffffff;
2820         }
2821
2822         RTL_W32(RxConfig, tmp);
2823         RTL_W32(MAR0 + 0, mc_filter[0]);
2824         RTL_W32(MAR0 + 4, mc_filter[1]);
2825
2826         spin_unlock_irqrestore(&tp->lock, flags);
2827 }
2828
2829 /**
2830  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2831  *  @dev: The Ethernet Device to get statistics for
2832  *
2833  *  Get TX/RX statistics for rtl8169
2834  */
2835 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2836 {
2837         struct rtl8169_private *tp = netdev_priv(dev);
2838         void __iomem *ioaddr = tp->mmio_addr;
2839         unsigned long flags;
2840
2841         if (netif_running(dev)) {
2842                 spin_lock_irqsave(&tp->lock, flags);
2843                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2844                 RTL_W32(RxMissed, 0);
2845                 spin_unlock_irqrestore(&tp->lock, flags);
2846         }
2847
2848         return &tp->stats;
2849 }
2850
2851 #ifdef CONFIG_PM
2852
2853 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2854 {
2855         struct net_device *dev = pci_get_drvdata(pdev);
2856         struct rtl8169_private *tp = netdev_priv(dev);
2857         void __iomem *ioaddr = tp->mmio_addr;
2858
2859         if (!netif_running(dev))
2860                 goto out;
2861
2862         netif_device_detach(dev);
2863         netif_stop_queue(dev);
2864
2865         spin_lock_irq(&tp->lock);
2866
2867         rtl8169_asic_down(ioaddr);
2868
2869         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2870         RTL_W32(RxMissed, 0);
2871
2872         spin_unlock_irq(&tp->lock);
2873
2874         pci_save_state(pdev);
2875         pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2876         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2877 out:
2878         return 0;
2879 }
2880
2881 static int rtl8169_resume(struct pci_dev *pdev)
2882 {
2883         struct net_device *dev = pci_get_drvdata(pdev);
2884
2885         if (!netif_running(dev))
2886                 goto out;
2887
2888         netif_device_attach(dev);
2889
2890         pci_set_power_state(pdev, PCI_D0);
2891         pci_restore_state(pdev);
2892         pci_enable_wake(pdev, PCI_D0, 0);
2893
2894         rtl8169_schedule_work(dev, rtl8169_reset_task);
2895 out:
2896         return 0;
2897 }
2898
2899 #endif /* CONFIG_PM */
2900
2901 static struct pci_driver rtl8169_pci_driver = {
2902         .name           = MODULENAME,
2903         .id_table       = rtl8169_pci_tbl,
2904         .probe          = rtl8169_init_one,
2905         .remove         = __devexit_p(rtl8169_remove_one),
2906 #ifdef CONFIG_PM
2907         .suspend        = rtl8169_suspend,
2908         .resume         = rtl8169_resume,
2909 #endif
2910 };
2911
2912 static int __init
2913 rtl8169_init_module(void)
2914 {
2915         return pci_register_driver(&rtl8169_pci_driver);
2916 }
2917
2918 static void __exit
2919 rtl8169_cleanup_module(void)
2920 {
2921         pci_unregister_driver(&rtl8169_pci_driver);
2922 }
2923
2924 module_init(rtl8169_init_module);
2925 module_exit(rtl8169_cleanup_module);