2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004-2005 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/thread_info.h>
20 #include <asm/uaccess.h>
21 #include <asm/unistd.h>
22 #include <asm/ptrace.h>
23 #include <asm/current.h>
24 #include <asm/pgtable.h>
26 #include <asm/signal.h>
27 #include <asm/tlbflush.h>
29 /* Unimplemented features. */
31 #undef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
32 #undef KERNEL_STACK_OVERFLOW_CHECK
33 #undef PREEMPTIBLE_KERNEL
34 #undef ALLOCA_EXCEPTION_IN_IRAM
42 * Macro to find first bit set in WINDOWBASE from the left + 1
49 .macro ffs_ws bit mask
52 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
53 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
57 _bltui \mask, 0x10000, 99f
59 extui \mask, \mask, 16, 16
62 99: _bltui \mask, 0x100, 99f
66 99: _bltui \mask, 0x10, 99f
69 99: _bltui \mask, 0x4, 99f
72 99: _bltui \mask, 0x2, 99f
79 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
82 * First-level exception handler for user exceptions.
83 * Save some special registers, extra states and all registers in the AR
84 * register file that were in use in the user task, and jump to the common
86 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
87 * save them for kernel exceptions).
89 * Entry condition for user_exception:
91 * a0: trashed, original value saved on stack (PT_AREG0)
93 * a2: new stack pointer, original value in depc
95 * depc: a2, original value saved on stack (PT_DEPC)
98 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
99 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
101 * Entry condition for _user_exception:
103 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
104 * excsave has been restored, and
105 * stack pointer (a1) has been set.
107 * Note: _user_exception might be at an odd adress. Don't use call0..call12
110 ENTRY(user_exception)
112 /* Save a2, a3, and depc, restore excsave_1 and set SP. */
116 s32i a1, a2, PT_AREG1
117 s32i a0, a2, PT_AREG2
118 s32i a3, a2, PT_AREG3
121 .globl _user_exception
124 /* Save SAR and turn off single stepping */
131 /* Rotate ws so that the current windowbase is at bit0. */
132 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
137 s32i a2, a1, PT_WINDOWBASE
138 s32i a3, a1, PT_WINDOWSTART
139 slli a2, a3, 32-WSBITS
141 srli a2, a2, 32-WSBITS
142 s32i a2, a1, PT_WMASK # needed for restoring registers
144 /* Save only live registers. */
147 s32i a4, a1, PT_AREG4
148 s32i a5, a1, PT_AREG5
149 s32i a6, a1, PT_AREG6
150 s32i a7, a1, PT_AREG7
152 s32i a8, a1, PT_AREG8
153 s32i a9, a1, PT_AREG9
154 s32i a10, a1, PT_AREG10
155 s32i a11, a1, PT_AREG11
157 s32i a12, a1, PT_AREG12
158 s32i a13, a1, PT_AREG13
159 s32i a14, a1, PT_AREG14
160 s32i a15, a1, PT_AREG15
161 _bnei a2, 1, 1f # only one valid frame?
163 /* Only one valid frame, skip saving regs. */
167 /* Save the remaining registers.
168 * We have to save all registers up to the first '1' from
169 * the right, except the current frame (bit 0).
170 * Assume a2 is: 001001000110001
171 * All regiser frames starting from the top fiel to the marked '1'
175 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
176 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
177 and a3, a3, a2 # max. only one bit is set
179 /* Find number of frames to save */
181 ffs_ws a0, a3 # number of frames to the '1' from left
183 /* Store information into WMASK:
184 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
185 * bits 4...: number of valid 4-register frames
188 slli a3, a0, 4 # number of frames to save in bits 8..4
189 extui a2, a2, 0, 4 # mask for the first 16 registers
191 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
193 /* Save 4 registers at a time */
196 s32i a0, a5, PT_AREG_END - 16
197 s32i a1, a5, PT_AREG_END - 12
198 s32i a2, a5, PT_AREG_END - 8
199 s32i a3, a5, PT_AREG_END - 4
204 /* WINDOWBASE still in SAR! */
206 rsr a2, SAR # original WINDOWBASE
210 wsr a3, WINDOWSTART # set corresponding WINDOWSTART bit
211 wsr a2, WINDOWBASE # and WINDOWSTART
214 /* We are back to the original stack pointer (a1) */
217 #if XCHAL_EXTRA_SA_SIZE
219 /* For user exceptions, save the extra state into the user's TCB.
220 * Note: We must assume that xchal_extra_store_funcbody destroys a2..a15
224 addi a2, a2, THREAD_CP_SAVE
225 xchal_extra_store_funcbody
228 /* Now, jump to the common exception handler. */
234 * First-level exit handler for kernel exceptions
235 * Save special registers and the live window frame.
236 * Note: Even though we changes the stack pointer, we don't have to do a
237 * MOVSP here, as we do that when we return from the exception.
238 * (See comment in the kernel exception exit code)
240 * Entry condition for kernel_exception:
242 * a0: trashed, original value saved on stack (PT_AREG0)
244 * a2: new stack pointer, original in DEPC
246 * depc: a2, original value saved on stack (PT_DEPC)
249 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
250 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
252 * Entry condition for _kernel_exception:
254 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
255 * excsave has been restored, and
256 * stack pointer (a1) has been set.
258 * Note: _kernel_exception might be at an odd adress. Don't use call0..call12
261 ENTRY(kernel_exception)
263 /* Save a0, a2, a3, DEPC and set SP. */
265 xsr a3, EXCSAVE_1 # restore a3, excsave_1
266 rsr a0, DEPC # get a2
267 s32i a1, a2, PT_AREG1
268 s32i a0, a2, PT_AREG2
269 s32i a3, a2, PT_AREG3
272 .globl _kernel_exception
275 /* Save SAR and turn off single stepping */
282 /* Rotate ws so that the current windowbase is at bit0. */
283 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
285 rsr a2, WINDOWBASE # don't need to save these, we only
286 rsr a3, WINDOWSTART # need shifted windowstart: windowmask
288 slli a2, a3, 32-WSBITS
290 srli a2, a2, 32-WSBITS
291 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
293 /* Save only the live window-frame */
296 s32i a4, a1, PT_AREG4
297 s32i a5, a1, PT_AREG5
298 s32i a6, a1, PT_AREG6
299 s32i a7, a1, PT_AREG7
301 s32i a8, a1, PT_AREG8
302 s32i a9, a1, PT_AREG9
303 s32i a10, a1, PT_AREG10
304 s32i a11, a1, PT_AREG11
306 s32i a12, a1, PT_AREG12
307 s32i a13, a1, PT_AREG13
308 s32i a14, a1, PT_AREG14
309 s32i a15, a1, PT_AREG15
313 #ifdef KERNEL_STACK_OVERFLOW_CHECK
315 /* Stack overflow check, for debugging */
316 extui a2, a1, TASK_SIZE_BITS,XX
318 _bge a2, a3, out_of_stack_panic
323 * This is the common exception handler.
324 * We get here from the user exception handler or simply by falling through
325 * from the kernel exception handler.
326 * Save the remaining special registers, switch to kernel mode, and jump
327 * to the second-level exception handler.
333 /* Save EXCVADDR, DEBUGCAUSE, and PC, and clear LCOUNT */
337 s32i a2, a1, PT_DEBUGCAUSE
342 s32i a3, a1, PT_EXCVADDR
344 s32i a2, a1, PT_LCOUNT
346 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
351 s32i a0, a1, PT_EXCCAUSE
352 s32i a3, a2, EXC_TABLE_FIXUP
354 /* All unrecoverable states are saved on stack, now, and a1 is valid,
355 * so we can allow exceptions and interrupts (*) again.
356 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
358 * (*) We only allow interrupts if PS.INTLEVEL was not set to 1 before
359 * (interrupts disabled) and if this exception is not an interrupt.
365 extui a3, a3, 0, 1 # a3 = PS.INTLEVEL[0]
366 moveqz a3, a2, a0 # a3 = 1 iff interrupt exception
367 movi a2, 1 << PS_WOE_BIT
372 s32i a3, a1, PT_PS # save ps
374 /* Save LBEG, LEND */
381 /* Go to second-level dispatcher. Set up parameters to pass to the
382 * exception handler and call the exception handler.
386 mov a6, a1 # pass stack frame
387 mov a7, a0 # pass EXCCAUSE
389 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
391 /* Call the second-level handler */
395 /* Jump here for exception exit */
397 common_exception_return:
399 /* Jump if we are returning from kernel exceptions. */
401 1: l32i a3, a1, PT_PS
402 _bbsi.l a3, PS_UM_BIT, 2f
403 j kernel_exception_exit
405 /* Specific to a user exception exit:
406 * We need to check some flags for signal handling and rescheduling,
407 * and have to restore WB and WS, extra states, and all registers
408 * in the register file that were in use in the user task.
411 2: wsr a3, PS /* disable interrupts */
413 /* Check for signals (keep interrupts disabled while we read TI_FLAGS)
414 * Note: PS.INTLEVEL = 0, PS.EXCM = 1
417 GET_THREAD_INFO(a2,a1)
418 l32i a4, a2, TI_FLAGS
420 /* Enable interrupts again.
421 * Note: When we get here, we certainly have handled any interrupts.
422 * (Hint: There is only one user exception frame on stack)
425 movi a3, 1 << PS_WOE_BIT
427 _bbsi.l a4, TIF_NEED_RESCHED, 3f
428 _bbci.l a4, TIF_SIGPENDING, 4f
430 #ifndef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
432 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
435 /* Reenable interrupts and call do_signal() */
438 movi a4, do_signal # int do_signal(struct pt_regs*, sigset_t*)
444 3: /* Reenable interrupts and reschedule */
447 movi a4, schedule # void schedule (void)
451 /* Restore the state of the task and return from the exception. */
454 /* If we are returning from a user exception, and the process
455 * to run next has PT_SINGLESTEP set, we want to setup
456 * ICOUNT and ICOUNTLEVEL to step one instruction.
457 * PT_SINGLESTEP is set by sys_ptrace (ptrace.c)
460 4: /* a2 holds GET_CURRENT(a2,a1) */
463 l32i a3, a3, TASK_PTRACE
464 bbci.l a3, PT_SINGLESTEP_BIT, 1f # jump if single-step flag is not set
466 movi a3, -2 # PT_SINGLESTEP flag is set,
467 movi a4, 1 # icountlevel of 1 means it won't
468 wsr a3, ICOUNT # start counting until after rfe
469 wsr a4, ICOUNTLEVEL # so setup icount & icountlevel.
474 #if XCHAL_EXTRA_SA_SIZE
476 /* For user exceptions, restore the extra state from the user's TCB. */
478 /* Note: a2 still contains GET_CURRENT(a2,a1) */
479 addi a2, a2, THREAD_CP_SAVE
480 xchal_extra_load_funcbody
482 /* We must assume that xchal_extra_store_funcbody destroys
483 * registers a2..a15. FIXME, this list can eventually be
484 * reduced once real register requirements of the macro are
487 #endif /* XCHAL_EXTRA_SA_SIZE */
490 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
492 l32i a2, a1, PT_WINDOWBASE
493 l32i a3, a1, PT_WINDOWSTART
494 wsr a1, DEPC # use DEPC as temp storage
495 wsr a3, WINDOWSTART # restore WINDOWSTART
496 ssr a2 # preserve user's WB in the SAR
497 wsr a2, WINDOWBASE # switch to user's saved WB
499 rsr a1, DEPC # restore stack pointer
500 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
501 rotw -1 # we restore a4..a7
502 _bltui a6, 16, 1f # only have to restore current window?
504 /* The working registers are a0 and a3. We are restoring to
505 * a4..a7. Be careful not to destroy what we have just restored.
506 * Note: wmask has the format YYYYM:
507 * Y: number of registers saved in groups of 4
508 * M: 4 bit mask of first 16 registers
514 2: rotw -1 # a0..a3 become a4..a7
515 addi a3, a7, -4*4 # next iteration
516 addi a2, a6, -16 # decrementing Y in WMASK
517 l32i a4, a3, PT_AREG_END + 0
518 l32i a5, a3, PT_AREG_END + 4
519 l32i a6, a3, PT_AREG_END + 8
520 l32i a7, a3, PT_AREG_END + 12
523 /* Clear unrestored registers (don't leak anything to user-land */
525 1: rsr a0, WINDOWBASE
529 extui a3, a3, 0, WBBITS
539 /* We are back were we were when we started.
540 * Note: a2 still contains WMASK (if we've returned to the original
541 * frame where we had loaded a2), or at least the lower 4 bits
542 * (if we have restored WSBITS-1 frames).
545 2: j common_exception_exit
547 /* This is the kernel exception exit.
548 * We avoided to do a MOVSP when we entered the exception, but we
549 * have to do it here.
552 kernel_exception_exit:
554 /* Disable interrupts (a3 holds PT_PS) */
558 #ifdef PREEMPTIBLE_KERNEL
560 #ifdef CONFIG_PREEMPT
563 * Note: We've just returned from a call4, so we have
564 * at least 4 addt'l regs.
567 /* Check current_thread_info->preempt_count */
570 l32i a3, a2, TI_PREEMPT
573 l32i a2, a2, TI_FLAGS
581 /* Check if we have to do a movsp.
583 * We only have to do a movsp if the previous window-frame has
584 * been spilled to the *temporary* exception stack instead of the
585 * task's stack. This is the case if the corresponding bit in
586 * WINDOWSTART for the previous window-frame was set before
587 * (not spilled) but is zero now (spilled).
588 * If this bit is zero, all other bits except the one for the
589 * current window frame are also zero. So, we can use a simple test:
590 * 'and' WINDOWSTART and WINDOWSTART-1:
592 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
594 * The result is zero only if one bit was set.
596 * (Note: We might have gone through several task switches before
597 * we come back to the current task, so WINDOWBASE might be
598 * different from the time the exception occurred.)
601 /* Test WINDOWSTART before and after the exception.
602 * We actually have WMASK, so we only have to test if it is 1 or not.
605 l32i a2, a1, PT_WMASK
606 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
608 /* Test WINDOWSTART now. If spilled, do the movsp */
613 _bnez a3, common_exception_exit
615 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
620 s32i a3, a1, PT_SIZE+0
621 s32i a4, a1, PT_SIZE+4
624 s32i a3, a1, PT_SIZE+8
625 s32i a4, a1, PT_SIZE+12
627 /* Common exception exit.
628 * We restore the special register and the current window frame, and
629 * return from the exception.
631 * Note: We expect a2 to hold PT_WMASK
634 common_exception_exit:
637 l32i a4, a1, PT_AREG4
638 l32i a5, a1, PT_AREG5
639 l32i a6, a1, PT_AREG6
640 l32i a7, a1, PT_AREG7
642 l32i a8, a1, PT_AREG8
643 l32i a9, a1, PT_AREG9
644 l32i a10, a1, PT_AREG10
645 l32i a11, a1, PT_AREG11
647 l32i a12, a1, PT_AREG12
648 l32i a13, a1, PT_AREG13
649 l32i a14, a1, PT_AREG14
650 l32i a15, a1, PT_AREG15
652 /* Restore PC, SAR */
654 1: l32i a2, a1, PT_PC
659 /* Restore LBEG, LEND, LCOUNT */
664 l32i a2, a1, PT_LCOUNT
668 /* Check if it was double exception. */
671 l32i a3, a1, PT_AREG3
672 l32i a2, a1, PT_AREG2
673 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
675 /* Restore a0...a3 and return */
677 l32i a0, a1, PT_AREG0
678 l32i a1, a1, PT_AREG1
682 l32i a0, a1, PT_AREG0
683 l32i a1, a1, PT_AREG1
687 * Debug exception handler.
689 * Currently, we don't support KGDB, so only user application can be debugged.
691 * When we get here, a0 is trashed and saved to excsave[debuglevel]
694 ENTRY(debug_exception)
696 rsr a0, EPS + XCHAL_DEBUGLEVEL
697 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
699 /* Set EPC_1 and EXCCAUSE */
701 wsr a2, DEPC # save a2 temporarily
702 rsr a2, EPC + XCHAL_DEBUGLEVEL
705 movi a2, EXCCAUSE_MAPPED_DEBUG
708 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
710 movi a2, 1 << PS_EXCM_BIT
712 movi a0, debug_exception # restore a3, debug jump vector
714 xsr a0, EXCSAVE + XCHAL_DEBUGLEVEL
716 /* Switch to kernel/user stack, restore jump vector, and save a0 */
718 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
720 addi a2, a1, -16-PT_SIZE # assume kernel stack
721 s32i a0, a2, PT_AREG0
723 s32i a1, a2, PT_AREG1
724 s32i a0, a2, PT_DEPC # mark it as a regular exception
726 s32i a3, a2, PT_AREG3
727 s32i a0, a2, PT_AREG2
732 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
733 s32i a0, a2, PT_AREG0
735 s32i a1, a2, PT_AREG1
738 s32i a3, a2, PT_AREG3
739 s32i a0, a2, PT_AREG2
743 /* Debug exception while in exception mode. */
748 * We get here in case of an unrecoverable exception.
749 * The only thing we can do is to be nice and print a panic message.
750 * We only produce a single stack frame for panic, so ???
755 * - a0 contains the caller address; original value saved in excsave1.
756 * - the original a0 contains a valid return address (backtrace) or 0.
757 * - a2 contains a valid stackpointer
761 * - If the stack pointer could be invalid, the caller has to setup a
762 * dummy stack pointer (e.g. the stack of the init_task)
764 * - If the return address could be invalid, the caller has to set it
765 * to 0, so the backtrace would stop.
770 .ascii "Unrecoverable error in exception handler\0"
772 ENTRY(unrecoverable_exception)
781 movi a1, (1 << PS_WOE_BIT) | 1
787 addi a1, a1, PT_REGS_OFFSET
790 movi a6, unrecoverable_text
797 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
800 * Fast-handler for alloca exceptions
802 * The ALLOCA handler is entered when user code executes the MOVSP
803 * instruction and the caller's frame is not in the register file.
804 * In this case, the caller frame's a0..a3 are on the stack just
805 * below sp (a1), and this handler moves them.
807 * For "MOVSP <ar>,<as>" without destination register a1, this routine
808 * simply moves the value from <as> to <ar> without moving the save area.
812 * a0: trashed, original value saved on stack (PT_AREG0)
814 * a2: new stack pointer, original in DEPC
816 * depc: a2, original value saved on stack (PT_DEPC)
819 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
820 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
824 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
825 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
827 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
828 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
833 /* We shouldn't be in a double exception. */
836 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
838 rsr a0, DEPC # get a2
839 s32i a4, a2, PT_AREG4 # save a4 and
840 s32i a0, a2, PT_AREG2 # a2 to stack
842 /* Exit critical section. */
845 s32i a0, a3, EXC_TABLE_FIXUP
847 /* Restore a3, excsave_1 */
849 xsr a3, EXCSAVE_1 # make sure excsave_1 is valid for dbl.
850 rsr a4, EPC_1 # get exception address
851 s32i a3, a2, PT_AREG3 # save a3 to stack
853 #ifdef ALLOCA_EXCEPTION_IN_IRAM
854 #error iram not supported
856 /* Note: l8ui not allowed in IRAM/IROM!! */
857 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
860 _EXTUI_MOVSP_SRC(a0) # extract source register number
866 movi a0, unrecoverable_exception
871 l32i a3, a2, PT_AREG0; _j 1f; .align 8
872 mov a3, a1; _j 1f; .align 8
873 l32i a3, a2, PT_AREG2; _j 1f; .align 8
874 l32i a3, a2, PT_AREG3; _j 1f; .align 8
875 l32i a3, a2, PT_AREG4; _j 1f; .align 8
876 mov a3, a5; _j 1f; .align 8
877 mov a3, a6; _j 1f; .align 8
878 mov a3, a7; _j 1f; .align 8
879 mov a3, a8; _j 1f; .align 8
880 mov a3, a9; _j 1f; .align 8
881 mov a3, a10; _j 1f; .align 8
882 mov a3, a11; _j 1f; .align 8
883 mov a3, a12; _j 1f; .align 8
884 mov a3, a13; _j 1f; .align 8
885 mov a3, a14; _j 1f; .align 8
886 mov a3, a15; _j 1f; .align 8
890 #ifdef ALLOCA_EXCEPTION_IN_IRAM
891 #error iram not supported
893 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
895 addi a4, a4, 3 # step over movsp
896 _EXTUI_MOVSP_DST(a0) # extract destination register
897 wsr a4, EPC_1 # save new epc_1
899 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
901 /* Move the save area. This implies the use of the L32E
902 * and S32E instructions, because this move must be done with
903 * the user's PS.RING privilege levels, not with ring 0
904 * (kernel's) privileges currently active with PS.EXCM
905 * set. Note that we have stil registered a fixup routine with the
906 * double exception vector in case a double exception occurs.
909 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
920 /* Restore stack-pointer and all the other saved registers. */
924 l32i a4, a2, PT_AREG4
925 l32i a3, a2, PT_AREG3
926 l32i a0, a2, PT_AREG0
927 l32i a2, a2, PT_AREG2
930 /* MOVSP <at>,<as> was invoked with <at> != a1.
931 * Because the stack pointer is not being modified,
932 * we should be able to just modify the pointer
933 * without moving any save area.
934 * The processor only traps these occurrences if the
935 * caller window isn't live, so unfortunately we can't
936 * use this as an alternate trap mechanism.
937 * So we just do the move. This requires that we
938 * resolve the destination register, not just the source,
939 * so there's some extra work.
940 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
943 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
945 1: movi a4, .Lmovsp_dst
951 s32i a3, a2, PT_AREG0; _j 1f; .align 8
952 mov a1, a3; _j 1f; .align 8
953 s32i a3, a2, PT_AREG2; _j 1f; .align 8
954 s32i a3, a2, PT_AREG3; _j 1f; .align 8
955 s32i a3, a2, PT_AREG4; _j 1f; .align 8
956 mov a5, a3; _j 1f; .align 8
957 mov a6, a3; _j 1f; .align 8
958 mov a7, a3; _j 1f; .align 8
959 mov a8, a3; _j 1f; .align 8
960 mov a9, a3; _j 1f; .align 8
961 mov a10, a3; _j 1f; .align 8
962 mov a11, a3; _j 1f; .align 8
963 mov a12, a3; _j 1f; .align 8
964 mov a13, a3; _j 1f; .align 8
965 mov a14, a3; _j 1f; .align 8
966 mov a15, a3; _j 1f; .align 8
968 1: l32i a4, a2, PT_AREG4
969 l32i a3, a2, PT_AREG3
970 l32i a0, a2, PT_AREG0
971 l32i a2, a2, PT_AREG2
978 * WARNING: The kernel doesn't save the entire user context before
979 * handling a fast system call. These functions are small and short,
980 * usually offering some functionality not available to user tasks.
982 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
986 * a0: trashed, original value saved on stack (PT_AREG0)
988 * a2: new stack pointer, original in DEPC
990 * depc: a2, original value saved on stack (PT_DEPC)
994 ENTRY(fast_syscall_kernel)
1002 l32i a0, a2, PT_DEPC
1003 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1005 rsr a0, DEPC # get syscall-nr
1006 _beqz a0, fast_syscall_spill_registers
1007 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1011 ENTRY(fast_syscall_user)
1019 l32i a0, a2, PT_DEPC
1020 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1022 rsr a0, DEPC # get syscall-nr
1023 _beqz a0, fast_syscall_spill_registers
1024 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1028 ENTRY(fast_syscall_unrecoverable)
1030 /* Restore all states. */
1032 l32i a0, a2, PT_AREG0 # restore a0
1033 xsr a2, DEPC # restore a2, depc
1037 movi a0, unrecoverable_exception
1043 * sysxtensa syscall handler
1045 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1046 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1047 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1048 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1053 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1055 * a2: new stack pointer, original in a0 and DEPC
1056 * a3: dispatch table, original in excsave_1
1057 * a4..a15: unchanged
1058 * depc: a2, original value saved on stack (PT_DEPC)
1061 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1062 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1064 * Note: we don't have to save a2; a2 holds the return value
1066 * We use the two macros TRY and CATCH:
1068 * TRY adds an entry to the __ex_table fixup table for the immediately
1069 * following instruction.
1071 * CATCH catches any exception that occurred at one of the preceeding TRY
1072 * statements and continues from there
1074 * Usage TRY l32i a0, a1, 0
1077 * CATCH <set return code>
1082 .section __ex_table, "a"; \
1090 ENTRY(fast_syscall_xtensa)
1092 xsr a3, EXCSAVE_1 # restore a3, excsave1
1094 s32i a7, a2, PT_AREG7 # we need an additional register
1095 movi a7, 4 # sizeof(unsigned int)
1096 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1098 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1
1099 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill
1100 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1102 /* Fall through for ATOMIC_CMP_SWP. */
1104 .Lswp: /* Atomic compare and swap */
1106 TRY l32i a0, a3, 0 # read old value
1107 bne a0, a4, 1f # same as old value? jump
1108 TRY s32i a5, a3, 0 # different, modify value
1109 l32i a7, a2, PT_AREG7 # restore a7
1110 l32i a0, a2, PT_AREG0 # restore a0
1111 movi a2, 1 # and return 1
1112 addi a6, a6, 1 # restore a6 (really necessary?)
1115 1: l32i a7, a2, PT_AREG7 # restore a7
1116 l32i a0, a2, PT_AREG0 # restore a0
1117 movi a2, 0 # return 0 (note that we cannot set
1118 addi a6, a6, 1 # restore a6 (really necessary?)
1121 .Lnswp: /* Atomic set, add, and exg_add. */
1123 TRY l32i a7, a3, 0 # orig
1124 add a0, a4, a7 # + arg
1125 moveqz a0, a4, a6 # set
1126 TRY s32i a0, a3, 0 # write new value
1130 l32i a7, a0, PT_AREG7 # restore a7
1131 l32i a0, a0, PT_AREG0 # restore a0
1132 addi a6, a6, 1 # restore a6 (really necessary?)
1136 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1137 l32i a0, a2, PT_AREG0 # restore a0
1141 .Lill: l32i a7, a2, PT_AREG0 # restore a7
1142 l32i a0, a2, PT_AREG0 # restore a0
1149 /* fast_syscall_spill_registers.
1153 * a0: trashed, original value saved on stack (PT_AREG0)
1155 * a2: new stack pointer, original in DEPC
1156 * a3: dispatch table
1157 * depc: a2, original value saved on stack (PT_DEPC)
1160 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1161 * Note: We don't need to save a2 in depc (return value)
1164 ENTRY(fast_syscall_spill_registers)
1166 /* Register a FIXUP handler (pass current wb as a parameter) */
1168 movi a0, fast_syscall_spill_registers_fixup
1169 s32i a0, a3, EXC_TABLE_FIXUP
1171 s32i a0, a3, EXC_TABLE_PARAM
1173 /* Save a3 and SAR on stack. */
1176 xsr a3, EXCSAVE_1 # restore a3 and excsave_1
1177 s32i a0, a2, PT_AREG4 # store SAR to PT_AREG4
1178 s32i a3, a2, PT_AREG3
1180 /* The spill routine might clobber a7, a11, and a15. */
1182 s32i a7, a2, PT_AREG5
1183 s32i a11, a2, PT_AREG6
1184 s32i a15, a2, PT_AREG7
1186 call0 _spill_registers # destroys a3, DEPC, and SAR
1188 /* Advance PC, restore registers and SAR, and return from exception. */
1190 l32i a3, a2, PT_AREG4
1191 l32i a0, a2, PT_AREG0
1193 l32i a3, a2, PT_AREG3
1195 /* Restore clobbered registers. */
1197 l32i a7, a2, PT_AREG5
1198 l32i a11, a2, PT_AREG6
1199 l32i a15, a2, PT_AREG7
1206 * We get here if the spill routine causes an exception, e.g. tlb miss.
1207 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1208 * we entered the spill routine and jump to the user exception handler.
1210 * a0: value of depc, original value in depc
1211 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1212 * a3: exctable, original value in excsave1
1215 fast_syscall_spill_registers_fixup:
1217 rsr a2, WINDOWBASE # get current windowbase (a2 is saved)
1218 xsr a0, DEPC # restore depc and a0
1219 ssl a2 # set shift (32 - WB)
1221 /* We need to make sure the current registers (a0-a3) are preserved.
1222 * To do this, we simply set the bit for the current window frame
1223 * in WS, so that the exception handlers save them to the task stack.
1226 rsr a3, EXCSAVE_1 # get spill-mask
1227 slli a2, a3, 1 # shift left by one
1229 slli a3, a2, 32-WSBITS
1230 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1231 wsr a2, WINDOWSTART # set corrected windowstart
1234 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1235 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1237 /* Return to the original (user task) WINDOWBASE.
1238 * We leave the following frame behind:
1240 * a3: trashed (saved in excsave_1)
1241 * depc: depc (we have to return to that address)
1248 /* We are now in the original frame when we entered _spill_registers:
1249 * a0: return address
1250 * a1: used, stack pointer
1251 * a2: kernel stack pointer
1252 * a3: available, saved in EXCSAVE_1
1253 * depc: exception address
1255 * Note: This frame might be the same as above.
1258 #ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
1259 /* Restore registers we precautiously saved.
1260 * We have the value of the 'right' a3
1263 l32i a7, a2, PT_AREG5
1264 l32i a11, a2, PT_AREG6
1265 l32i a15, a2, PT_AREG7
1268 /* Setup stack pointer. */
1270 addi a2, a2, -PT_USER_SIZE
1271 s32i a0, a2, PT_AREG0
1273 /* Make sure we return to this fixup handler. */
1275 movi a3, fast_syscall_spill_registers_fixup_return
1276 s32i a3, a2, PT_DEPC # setup depc
1278 /* Jump to the exception handler. */
1282 addx4 a0, a0, a3 # find entry in table
1283 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1286 fast_syscall_spill_registers_fixup_return:
1288 /* When we return here, all registers have been restored (a2: DEPC) */
1290 wsr a2, DEPC # exception address
1292 /* Restore fixup handler. */
1295 movi a2, fast_syscall_spill_registers_fixup
1296 s32i a2, a3, EXC_TABLE_FIXUP
1298 s32i a2, a3, EXC_TABLE_PARAM
1299 l32i a2, a3, EXC_TABLE_KSTK
1301 #ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
1302 /* Save registers again that might be clobbered. */
1304 s32i a7, a2, PT_AREG5
1305 s32i a11, a2, PT_AREG6
1306 s32i a15, a2, PT_AREG7
1309 /* Load WB at the time the exception occurred. */
1311 rsr a3, SAR # WB is still in SAR
1316 /* Restore a3 and return. */
1325 * spill all registers.
1327 * This is not a real function. The following conditions must be met:
1329 * - must be called with call0.
1330 * - uses DEPC, a3 and SAR.
1331 * - the last 'valid' register of each frame are clobbered.
1332 * - the caller must have registered a fixup handler
1333 * (or be inside a critical section)
1334 * - PS_EXCM must be set (PS_WOE cleared?)
1337 ENTRY(_spill_registers)
1340 * Rotate ws so that the current windowbase is at bit 0.
1341 * Assume ws = xxxwww1yy (www1 current window frame).
1342 * Rotate ws right so that a2 = yyxxxwww1.
1345 wsr a2, DEPC # preserve a2
1350 or a3, a3, a2 # a2 = xxxwww1yyxxxwww1yy
1353 /* We are done if there are no more than the current register frame. */
1355 extui a3, a3, 1, WSBITS-2 # a3 = 0yyxxxwww
1356 movi a2, (1 << (WSBITS-1))
1357 _beqz a3, .Lnospill # only one active frame? jump
1359 /* We want 1 at the top, so that we return to the current windowbase */
1361 or a3, a3, a2 # 1yyxxxwww
1363 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1365 wsr a3, WINDOWSTART # save shifted windowstart
1367 and a3, a2, a3 # first bit set from right: 000010000
1369 ffs_ws a2, a3 # a2: shifts to skip empty frames
1371 sub a2, a3, a2 # WSBITS-a2:number of 0-bits from right
1372 ssr a2 # save in SAR for later.
1376 rsr a2, DEPC # restore a2
1381 srl a3, a3 # shift windowstart
1383 /* WB is now just one frame below the oldest frame in the register
1384 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1385 and WS differ by one 4-register frame. */
1387 /* Save frames. Depending what call was used (call4, call8, call12),
1388 * we have to save 4,8. or 12 registers.
1394 /* Special case: we have a call12-frame starting at a4. */
1396 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1398 s32e a4, a1, -16 # a1 is valid with an empty spill area
1405 .Lloop: _bbsi.l a3, 1, .Lc4
1406 _bbci.l a3, 2, .Lc12
1408 .Lc8: s32e a4, a13, -16
1418 srli a11, a3, 2 # shift windowbase by 2
1422 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1434 .Lc4: s32e a4, a9, -16
1444 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1446 /* 12-register frame (call12) */
1452 .Lc12c: s32e a9, a8, -44
1461 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1462 * window, grab the stackpointer, and rotate back.
1463 * Alternatively, we could also use the following approach, but that
1464 * makes the fixup routine much more complicated:
1487 /* We get here because of an unrecoverable error in the window
1488 * registers. If we are in user space, we kill the application,
1489 * however, this condition is unrecoverable in kernel space.
1493 _bbci.l a0, PS_UM_BIT, 1f
1495 /* User space: Setup a dummy frame and kill application.
1496 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1509 l32i a1, a3, EXC_TABLE_KSTK
1512 movi a4, (1 << PS_WOE_BIT) | 1
1520 1: /* Kernel space: PANIC! */
1523 movi a0, unrecoverable_exception
1524 callx0 a0 # should not return
1528 * We should never get here. Bail out!
1531 ENTRY(fast_second_level_miss_double_kernel)
1533 1: movi a0, unrecoverable_exception
1534 callx0 a0 # should not return
1537 /* First-level entry handler for user, kernel, and double 2nd-level
1538 * TLB miss exceptions. Note that for now, user and kernel miss
1539 * exceptions share the same entry point and are handled identically.
1541 * An old, less-efficient C version of this function used to exist.
1542 * We include it below, interleaved as comments, for reference.
1546 * a0: trashed, original value saved on stack (PT_AREG0)
1548 * a2: new stack pointer, original in DEPC
1549 * a3: dispatch table
1550 * depc: a2, original value saved on stack (PT_DEPC)
1553 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1554 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1557 ENTRY(fast_second_level_miss)
1559 /* Save a1. Note: we don't expect a double exception. */
1561 s32i a1, a2, PT_AREG1
1563 /* We need to map the page of PTEs for the user task. Find
1564 * the pointer to that page. Also, it's possible for tsk->mm
1565 * to be NULL while tsk->active_mm is nonzero if we faulted on
1566 * a vmalloc address. In that rare case, we must use
1567 * active_mm instead to avoid a fault in this handler. See
1569 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1570 * (or search Internet on "mm vs. active_mm")
1573 * mm = tsk->active_mm;
1574 * pgd = pgd_offset (mm, regs->excvaddr);
1575 * pmd = pmd_offset (pgd, regs->excvaddr);
1580 l32i a0, a1, TASK_MM # tsk->mm
1583 8: rsr a1, EXCVADDR # fault address
1584 _PGD_OFFSET(a0, a1, a1)
1585 l32i a0, a0, 0 # read pmdval
1586 //beqi a0, _PAGE_USER, 2f
1589 /* Read ptevaddr and convert to top of page-table page.
1591 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1592 * vpnval += DTLB_WAY_PGTABLE;
1593 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1594 * write_dtlb_entry (pteval, vpnval);
1596 * The messy computation for 'pteval' above really simplifies
1597 * into the following:
1599 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_KERNEL
1602 movi a1, -PAGE_OFFSET
1603 add a0, a0, a1 # pmdval - PAGE_OFFSET
1604 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1608 movi a1, PAGE_DIRECTORY
1609 or a0, a0, a1 # ... | PAGE_DIRECTORY
1612 srli a1, a1, PAGE_SHIFT
1613 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1614 addi a1, a1, DTLB_WAY_PGD # ... + way_number
1619 /* Exit critical section. */
1622 s32i a0, a3, EXC_TABLE_FIXUP
1624 /* Restore the working registers, and return. */
1626 l32i a0, a2, PT_AREG0
1627 l32i a1, a2, PT_AREG1
1628 l32i a2, a2, PT_DEPC
1631 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1633 /* Restore excsave1 and return. */
1638 /* Return from double exception. */
1644 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1647 2: /* Invalid PGD, default exception handling */
1651 s32i a1, a2, PT_AREG2
1652 s32i a3, a2, PT_AREG3
1656 bbsi.l a2, PS_UM_BIT, 1f
1658 1: j _user_exception
1662 * StoreProhibitedException
1664 * Update the pte and invalidate the itlb mapping for this pte.
1668 * a0: trashed, original value saved on stack (PT_AREG0)
1670 * a2: new stack pointer, original in DEPC
1671 * a3: dispatch table
1672 * depc: a2, original value saved on stack (PT_DEPC)
1675 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1676 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1679 ENTRY(fast_store_prohibited)
1681 /* Save a1 and a4. */
1683 s32i a1, a2, PT_AREG1
1684 s32i a4, a2, PT_AREG4
1687 l32i a0, a1, TASK_MM # tsk->mm
1690 8: rsr a1, EXCVADDR # fault address
1691 _PGD_OFFSET(a0, a1, a4)
1693 //beqi a0, _PAGE_USER, 2f # FIXME use _PAGE_INVALID
1696 _PTE_OFFSET(a0, a1, a4)
1697 l32i a4, a0, 0 # read pteval
1698 movi a1, _PAGE_VALID | _PAGE_RW
1701 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_WRENABLE
1706 /* We need to flush the cache if we have page coloring. */
1707 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1712 idtlb a0 // FIXME do we need this?
1716 /* Exit critical section. */
1719 s32i a0, a3, EXC_TABLE_FIXUP
1721 /* Restore the working registers, and return. */
1723 l32i a4, a2, PT_AREG4
1724 l32i a1, a2, PT_AREG1
1725 l32i a0, a2, PT_AREG0
1726 l32i a2, a2, PT_DEPC
1728 /* Restore excsave1 and a3. */
1731 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1736 /* Double exception. Restore FIXUP handler and return. */
1742 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1745 2: /* If there was a problem, handle fault in C */
1747 rsr a4, DEPC # still holds a2
1749 s32i a4, a2, PT_AREG2
1750 s32i a3, a2, PT_AREG3
1751 l32i a4, a2, PT_AREG4
1755 bbsi.l a2, PS_UM_BIT, 1f
1757 1: j _user_exception
1760 #if XCHAL_EXTRA_SA_SIZE
1762 #warning fast_coprocessor untested
1767 * a0: trashed, original value saved on stack (PT_AREG0)
1769 * a2: new stack pointer, original in DEPC
1770 * a3: dispatch table
1771 * depc: a2, original value saved on stack (PT_DEPC)
1774 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1775 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1778 ENTRY(fast_coprocessor_double)
1780 movi a0, unrecoverable_exception
1783 ENTRY(fast_coprocessor)
1785 /* Fatal if we are in a double exception. */
1787 l32i a0, a2, PT_DEPC
1788 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_coprocessor_double
1790 /* Save some registers a1, a3, a4, SAR */
1793 s32i a3, a2, PT_AREG3
1795 s32i a4, a2, PT_AREG4
1796 s32i a1, a2, PT_AREG1
1797 s32i a5, a1, PT_AREG5
1801 /* Currently, the HAL macros only guarantee saving a0 and a1.
1802 * These can and will be refined in the future, but for now,
1803 * just save the remaining registers of a2...a15.
1805 s32i a6, a1, PT_AREG6
1806 s32i a7, a1, PT_AREG7
1807 s32i a8, a1, PT_AREG8
1808 s32i a9, a1, PT_AREG9
1809 s32i a10, a1, PT_AREG10
1810 s32i a11, a1, PT_AREG11
1811 s32i a12, a1, PT_AREG12
1812 s32i a13, a1, PT_AREG13
1813 s32i a14, a1, PT_AREG14
1814 s32i a15, a1, PT_AREG15
1816 /* Find coprocessor number. Subtract first CP EXCCAUSE from EXCCAUSE */
1819 addi a3, a0, -XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED
1821 /* Set corresponding CPENABLE bit */
1824 ssl a3 # SAR: 32 - coprocessor_number
1830 movi a5, coprocessor_info # list of owner and offset into cp_save
1831 addx8 a0, a4, a5 # entry for CP
1833 bne a4, a5, .Lload # bit wasn't set before, cp not in use
1835 /* Now compare the current task with the owner of the coprocessor.
1836 * If they are the same, there is no reason to save or restore any
1837 * coprocessor state. Having already enabled the coprocessor,
1838 * branch ahead to return.
1841 l32i a4, a0, COPROCESSOR_INFO_OWNER # a4: current owner for this CP
1844 /* Find location to dump current coprocessor state:
1845 * task_struct->task_cp_save_offset + coprocessor_offset[coprocessor]
1847 * Note: a0 pointer to the entry in the coprocessor owner table,
1848 * a3 coprocessor number,
1849 * a4 current owner of coprocessor.
1851 l32i a5, a0, COPROCESSOR_INFO_OFFSET
1852 addi a2, a4, THREAD_CP_SAVE
1855 /* Store current coprocessor states. (a5 still has CP number) */
1857 xchal_cpi_store_funcbody
1859 /* The macro might have destroyed a3 (coprocessor number), but
1860 * SAR still has 32 - coprocessor_number!
1866 .Lload: /* A new task now owns the corpocessors. Save its TCB pointer into
1867 * the coprocessor owner table.
1869 * Note: a0 pointer to the entry in the coprocessor owner table,
1870 * a3 coprocessor number.
1875 /* Find location from where to restore the current coprocessor state.*/
1877 l32i a5, a0, COPROCESSOR_INFO_OFFSET
1878 addi a2, a4, THREAD_CP_SAVE
1881 xchal_cpi_load_funcbody
1883 /* We must assume that the xchal_cpi_store_funcbody macro destroyed
1884 * registers a2..a15.
1887 .Ldone: l32i a15, a1, PT_AREG15
1888 l32i a14, a1, PT_AREG14
1889 l32i a13, a1, PT_AREG13
1890 l32i a12, a1, PT_AREG12
1891 l32i a11, a1, PT_AREG11
1892 l32i a10, a1, PT_AREG10
1893 l32i a9, a1, PT_AREG9
1894 l32i a8, a1, PT_AREG8
1895 l32i a7, a1, PT_AREG7
1896 l32i a6, a1, PT_AREG6
1897 l32i a5, a1, PT_AREG5
1898 l32i a4, a1, PT_AREG4
1899 l32i a3, a1, PT_AREG3
1900 l32i a2, a1, PT_AREG2
1901 l32i a0, a1, PT_AREG0
1902 l32i a1, a1, PT_AREG1
1906 #endif /* XCHAL_EXTRA_SA_SIZE */
1911 * void system_call (struct pt_regs* regs, int exccause)
1918 /* regs->syscall = regs->areg[2] */
1920 l32i a3, a2, PT_AREG2
1922 movi a4, do_syscall_trace_enter
1923 s32i a3, a2, PT_SYSCALL
1926 /* syscall = sys_call_table[syscall_nr] */
1928 movi a4, sys_call_table;
1929 movi a5, __NR_syscall_count
1935 movi a5, sys_ni_syscall;
1938 /* Load args: arg0 - arg5 are passed via regs. */
1940 l32i a6, a2, PT_AREG6
1941 l32i a7, a2, PT_AREG3
1942 l32i a8, a2, PT_AREG4
1943 l32i a9, a2, PT_AREG5
1944 l32i a10, a2, PT_AREG8
1945 l32i a11, a2, PT_AREG9
1947 /* Pass one additional argument to the syscall: pt_regs (on stack) */
1952 1: /* regs->areg[2] = return_value */
1954 s32i a6, a2, PT_AREG2
1955 movi a4, do_syscall_trace_leave
1962 * Create a kernel thread
1964 * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
1968 ENTRY(kernel_thread)
1971 mov a5, a2 # preserve fn over syscall
1972 mov a7, a3 # preserve args over syscall
1974 movi a3, _CLONE_VM | _CLONE_UNTRACED
1976 or a6, a4, a3 # arg0: flags
1977 mov a3, a1 # arg1: sp
1980 beq a3, a1, 1f # branch if parent
1982 callx4 a5 # fn(args)
1985 syscall # return value of fn(args) still in a6
1990 * Do a system call from kernel instead of calling sys_execve, so we end up
1991 * with proper pt_regs.
1993 * int kernel_execve(const char *fname, char *const argv[], charg *const envp[])
1997 ENTRY(kernel_execve)
1999 mov a6, a2 # arg0 is in a6
2000 movi a2, __NR_execve
2008 * struct task* _switch_to (struct task* prev, struct task* next)
2016 mov a4, a3 # preserve a3
2018 s32i a0, a2, THREAD_RA # save return address
2019 s32i a1, a2, THREAD_SP # save stack pointer
2021 /* Disable ints while we manipulate the stack pointer; spill regs. */
2023 movi a5, (1 << PS_EXCM_BIT) | LOCKLEVEL
2027 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
2029 call0 _spill_registers
2031 /* Set kernel stack (and leave critical section)
2032 * Note: It's save to set it here. The stack will not be overwritten
2033 * because the kernel stack will only be loaded again after
2034 * we return from kernel space.
2037 l32i a0, a4, TASK_THREAD_INFO
2038 rsr a3, EXCSAVE_1 # exc_table
2040 addi a0, a0, PT_REGS_OFFSET
2041 s32i a1, a3, EXC_TABLE_FIXUP
2042 s32i a0, a3, EXC_TABLE_KSTK
2044 /* restore context of the task that 'next' addresses */
2046 l32i a0, a4, THREAD_RA /* restore return address */
2047 l32i a1, a4, THREAD_SP /* restore stack pointer */
2055 ENTRY(ret_from_fork)
2057 /* void schedule_tail (struct task_struct *prev)
2058 * Note: prev is still in a6 (return value from fake call4 frame)
2060 movi a4, schedule_tail
2063 movi a4, do_syscall_trace_leave
2067 j common_exception_return
projects / linux-2.6 / blob