2 * mach-davinci/devices.c
4 * DaVinci platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
19 #include <asm/mach/map.h>
21 #include <mach/hardware.h>
23 #include <mach/irqs.h>
24 #include <mach/cputype.h>
26 #include <mach/edma.h>
28 #include <mach/time.h>
30 #define DAVINCI_I2C_BASE 0x01C21000
31 #define DAVINCI_MMCSD0_BASE 0x01E10000
32 #define DM355_MMCSD0_BASE 0x01E11000
33 #define DM355_MMCSD1_BASE 0x01E00000
35 static struct resource i2c_resources[] = {
37 .start = DAVINCI_I2C_BASE,
38 .end = DAVINCI_I2C_BASE + 0x40,
39 .flags = IORESOURCE_MEM,
43 .flags = IORESOURCE_IRQ,
47 static struct platform_device davinci_i2c_device = {
48 .name = "i2c_davinci",
50 .num_resources = ARRAY_SIZE(i2c_resources),
51 .resource = i2c_resources,
54 void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
56 if (cpu_is_davinci_dm644x())
57 davinci_cfg_reg(DM644X_I2C);
59 davinci_i2c_device.dev.platform_data = pdata;
60 (void) platform_device_register(&davinci_i2c_device);
63 #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
65 static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
67 static struct resource mmcsd0_resources[] = {
69 /* different on dm355 */
70 .start = DAVINCI_MMCSD0_BASE,
71 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
72 .flags = IORESOURCE_MEM,
74 /* IRQs: MMC/SD, then SDIO */
77 .flags = IORESOURCE_IRQ,
79 /* different on dm355 */
81 .flags = IORESOURCE_IRQ,
83 /* DMA channels: RX, then TX */
85 .start = DAVINCI_DMA_MMCRXEVT,
86 .flags = IORESOURCE_DMA,
88 .start = DAVINCI_DMA_MMCTXEVT,
89 .flags = IORESOURCE_DMA,
93 static struct platform_device davinci_mmcsd0_device = {
94 .name = "davinci_mmc",
97 .dma_mask = &mmcsd0_dma_mask,
98 .coherent_dma_mask = DMA_BIT_MASK(32),
100 .num_resources = ARRAY_SIZE(mmcsd0_resources),
101 .resource = mmcsd0_resources,
104 static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
106 static struct resource mmcsd1_resources[] = {
108 .start = DM355_MMCSD1_BASE,
109 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
110 .flags = IORESOURCE_MEM,
112 /* IRQs: MMC/SD, then SDIO */
114 .start = IRQ_DM355_MMCINT1,
115 .flags = IORESOURCE_IRQ,
117 .start = IRQ_DM355_SDIOINT1,
118 .flags = IORESOURCE_IRQ,
120 /* DMA channels: RX, then TX */
122 .start = 30, /* rx */
123 .flags = IORESOURCE_DMA,
125 .start = 31, /* tx */
126 .flags = IORESOURCE_DMA,
130 static struct platform_device davinci_mmcsd1_device = {
131 .name = "davinci_mmc",
134 .dma_mask = &mmcsd1_dma_mask,
135 .coherent_dma_mask = DMA_BIT_MASK(32),
137 .num_resources = ARRAY_SIZE(mmcsd1_resources),
138 .resource = mmcsd1_resources,
142 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
144 struct platform_device *pdev = NULL;
146 if (WARN_ON(cpu_is_davinci_dm646x()))
149 /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
150 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
152 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
153 * not handled right here ...
157 if (!cpu_is_davinci_dm355())
160 /* REVISIT we may not need all these pins if e.g. this
161 * is a hard-wired SDIO device...
163 davinci_cfg_reg(DM355_SD1_CMD);
164 davinci_cfg_reg(DM355_SD1_CLK);
165 davinci_cfg_reg(DM355_SD1_DATA0);
166 davinci_cfg_reg(DM355_SD1_DATA1);
167 davinci_cfg_reg(DM355_SD1_DATA2);
168 davinci_cfg_reg(DM355_SD1_DATA3);
170 pdev = &davinci_mmcsd1_device;
173 if (cpu_is_davinci_dm355()) {
174 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
175 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
176 mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
178 /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
179 davinci_cfg_reg(DM355_MMCSD0);
182 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
185 else if (cpu_is_davinci_dm644x()) {
186 /* REVISIT: should this be in board-init code? */
188 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
190 /* Power-on 3.3V IO cells */
191 __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
192 /*Set up the pull regiter for MMC */
193 davinci_cfg_reg(DM644X_MSTK);
196 pdev = &davinci_mmcsd0_device;
203 pdev->dev.platform_data = config;
204 platform_device_register(pdev);
209 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
215 /*-------------------------------------------------------------------------*/
217 static struct resource wdt_resources[] = {
219 .flags = IORESOURCE_MEM,
223 struct platform_device davinci_wdt_device = {
226 .num_resources = ARRAY_SIZE(wdt_resources),
227 .resource = wdt_resources,
230 static void davinci_init_wdt(void)
232 struct davinci_soc_info *soc_info = &davinci_soc_info;
234 wdt_resources[0].start = (resource_size_t)soc_info->wdt_base;
235 wdt_resources[0].end = (resource_size_t)soc_info->wdt_base + SZ_1K - 1;
237 platform_device_register(&davinci_wdt_device);
240 /*-------------------------------------------------------------------------*/
242 struct davinci_timer_instance davinci_timer_instance[2] = {
244 .base = IO_ADDRESS(DAVINCI_TIMER0_BASE),
245 .bottom_irq = IRQ_TINT0_TINT12,
246 .top_irq = IRQ_TINT0_TINT34,
249 .base = IO_ADDRESS(DAVINCI_TIMER1_BASE),
250 .bottom_irq = IRQ_TINT1_TINT12,
251 .top_irq = IRQ_TINT1_TINT34,
255 /*-------------------------------------------------------------------------*/
257 static int __init davinci_init_devices(void)
259 /* please keep these calls, and their implementations above,
260 * in alphabetical order so they're easier to sort through.
266 arch_initcall(davinci_init_devices);