2 * Video Capture Driver (Video for Linux 1/2)
3 * for the Matrox Marvel G200,G400 and Rainbow Runner-G series
5 * This module is an interface to the KS0127 video decoder chip.
7 * Copyright (C) 1999 Ryan Drake <stiletto@mediaone.net>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 *****************************************************************************
25 * Modified and extended by
26 * Mike Bernson <mike@mlb.org>
28 * Leon van Stuivenberg <l.vanstuivenberg@chello.nl>
29 * Gernot Ziegler <gz@lysator.liu.se>
32 * V1.0 Ryan Drake Initial version by Ryan Drake
33 * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard
36 #include <linux/init.h>
37 #include <linux/module.h>
38 #include <linux/delay.h>
39 #include <linux/errno.h>
40 #include <linux/kernel.h>
41 #include <linux/i2c.h>
42 #include <linux/video_decoder.h>
43 #include <media/v4l2-common.h>
44 #include <media/v4l2-i2c-drv-legacy.h>
47 MODULE_DESCRIPTION("KS0127 video decoder driver");
48 MODULE_AUTHOR("Ryan Drake");
49 MODULE_LICENSE("GPL");
51 #define KS_TYPE_UNKNOWN 0
52 #define KS_TYPE_0122S 1
53 #define KS_TYPE_0127 2
54 #define KS_TYPE_0127B 3
56 /* ks0127 control registers */
71 #define KS_PORTAB 0x0e
75 #define KS_CHROMA 0x12
76 #define KS_CHROMB 0x13
80 #define KS_VERTIA 0x17
81 #define KS_VERTIB 0x18
82 #define KS_VERTIC 0x19
89 #define KS_VBICTL 0x20
90 #define KS_CCDAT2 0x21
91 #define KS_CCDAT1 0x22
92 #define KS_VBIL30 0x23
93 #define KS_VBIL74 0x24
94 #define KS_VBIL118 0x25
95 #define KS_VBIL1512 0x26
96 #define KS_TTFRAM 0x27
98 #define KS_UVOFFH 0x29
99 #define KS_UVOFFL 0x2a
100 #define KS_UGAIN 0x2b
101 #define KS_VGAIN 0x2c
104 #define KS_CTRACK 0x2f
105 #define KS_POLCTL 0x30
106 #define KS_REFCOD 0x31
107 #define KS_INVALY 0x32
108 #define KS_INVALU 0x33
109 #define KS_INVALV 0x34
110 #define KS_UNUSEY 0x35
111 #define KS_UNUSEU 0x36
112 #define KS_UNUSEV 0x37
113 #define KS_USRSAV 0x38
114 #define KS_USREAV 0x39
115 #define KS_SHS1A 0x3a
116 #define KS_SHS1B 0x3b
117 #define KS_SHS1C 0x3c
119 #define KS_VSDEL 0x3e
121 #define KS_GAMMA0 0x40
122 #define KS_GAMMA1 0x41
123 #define KS_GAMMA2 0x42
124 #define KS_GAMMA3 0x43
125 #define KS_GAMMA4 0x44
126 #define KS_GAMMA5 0x45
127 #define KS_GAMMA6 0x46
128 #define KS_GAMMA7 0x47
129 #define KS_GAMMA8 0x48
130 #define KS_GAMMA9 0x49
131 #define KS_GAMMA10 0x4a
132 #define KS_GAMMA11 0x4b
133 #define KS_GAMMA12 0x4c
134 #define KS_GAMMA13 0x4d
135 #define KS_GAMMA14 0x4e
136 #define KS_GAMMA15 0x4f
137 #define KS_GAMMA16 0x50
138 #define KS_GAMMA17 0x51
139 #define KS_GAMMA18 0x52
140 #define KS_GAMMA19 0x53
141 #define KS_GAMMA20 0x54
142 #define KS_GAMMA21 0x55
143 #define KS_GAMMA22 0x56
144 #define KS_GAMMA23 0x57
145 #define KS_GAMMA24 0x58
146 #define KS_GAMMA25 0x59
147 #define KS_GAMMA26 0x5a
148 #define KS_GAMMA27 0x5b
149 #define KS_GAMMA28 0x5c
150 #define KS_GAMMA29 0x5d
151 #define KS_GAMMA30 0x5e
152 #define KS_GAMMA31 0x5f
153 #define KS_GAMMAD0 0x60
154 #define KS_GAMMAD1 0x61
155 #define KS_GAMMAD2 0x62
156 #define KS_GAMMAD3 0x63
157 #define KS_GAMMAD4 0x64
158 #define KS_GAMMAD5 0x65
159 #define KS_GAMMAD6 0x66
160 #define KS_GAMMAD7 0x67
161 #define KS_GAMMAD8 0x68
162 #define KS_GAMMAD9 0x69
163 #define KS_GAMMAD10 0x6a
164 #define KS_GAMMAD11 0x6b
165 #define KS_GAMMAD12 0x6c
166 #define KS_GAMMAD13 0x6d
167 #define KS_GAMMAD14 0x6e
168 #define KS_GAMMAD15 0x6f
169 #define KS_GAMMAD16 0x70
170 #define KS_GAMMAD17 0x71
171 #define KS_GAMMAD18 0x72
172 #define KS_GAMMAD19 0x73
173 #define KS_GAMMAD20 0x74
174 #define KS_GAMMAD21 0x75
175 #define KS_GAMMAD22 0x76
176 #define KS_GAMMAD23 0x77
177 #define KS_GAMMAD24 0x78
178 #define KS_GAMMAD25 0x79
179 #define KS_GAMMAD26 0x7a
180 #define KS_GAMMAD27 0x7b
181 #define KS_GAMMAD28 0x7c
182 #define KS_GAMMAD29 0x7d
183 #define KS_GAMMAD30 0x7e
184 #define KS_GAMMAD31 0x7f
187 /****************************************************************************
188 * mga_dev : represents one ks0127 chip.
189 ****************************************************************************/
210 static int debug; /* insmod parameter */
212 module_param(debug, int, 0);
213 MODULE_PARM_DESC(debug, "Debug output");
215 static u8 reg_defaults[64];
217 static void init_reg_defaults(void)
219 static int initialized;
220 u8 *table = reg_defaults;
226 table[KS_CMDA] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */
227 table[KS_CMDB] = 0x12; /* VALIGN=0, AGC control and input */
228 table[KS_CMDC] = 0x00; /* Test options */
229 /* clock & input select, write 1 to PORTA */
230 table[KS_CMDD] = 0x01;
231 table[KS_HAVB] = 0x00; /* HAV Start Control */
232 table[KS_HAVE] = 0x00; /* HAV End Control */
233 table[KS_HS1B] = 0x10; /* HS1 Start Control */
234 table[KS_HS1E] = 0x00; /* HS1 End Control */
235 table[KS_HS2B] = 0x00; /* HS2 Start Control */
236 table[KS_HS2E] = 0x00; /* HS2 End Control */
237 table[KS_AGC] = 0x53; /* Manual setting for AGC */
238 table[KS_HXTRA] = 0x00; /* Extra Bits for HAV and HS1/2 */
239 table[KS_CDEM] = 0x00; /* Chroma Demodulation Control */
240 table[KS_PORTAB] = 0x0f; /* port B is input, port A output GPPORT */
241 table[KS_LUMA] = 0x01; /* Luma control */
242 table[KS_CON] = 0x00; /* Contrast Control */
243 table[KS_BRT] = 0x00; /* Brightness Control */
244 table[KS_CHROMA] = 0x2a; /* Chroma control A */
245 table[KS_CHROMB] = 0x90; /* Chroma control B */
246 table[KS_DEMOD] = 0x00; /* Chroma Demodulation Control & Status */
247 table[KS_SAT] = 0x00; /* Color Saturation Control*/
248 table[KS_HUE] = 0x00; /* Hue Control */
249 table[KS_VERTIA] = 0x00; /* Vertical Processing Control A */
250 /* Vertical Processing Control B, luma 1 line delayed */
251 table[KS_VERTIB] = 0x12;
252 table[KS_VERTIC] = 0x0b; /* Vertical Processing Control C */
253 table[KS_HSCLL] = 0x00; /* Horizontal Scaling Ratio Low */
254 table[KS_HSCLH] = 0x00; /* Horizontal Scaling Ratio High */
255 table[KS_VSCLL] = 0x00; /* Vertical Scaling Ratio Low */
256 table[KS_VSCLH] = 0x00; /* Vertical Scaling Ratio High */
257 /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */
258 table[KS_OFMTA] = 0x30;
259 table[KS_OFMTB] = 0x00; /* Output Control B */
260 /* VBI Decoder Control; 4bit fmt: avoid Y overflow */
261 table[KS_VBICTL] = 0x5d;
262 table[KS_CCDAT2] = 0x00; /* Read Only register */
263 table[KS_CCDAT1] = 0x00; /* Read Only register */
264 table[KS_VBIL30] = 0xa8; /* VBI data decoding options */
265 table[KS_VBIL74] = 0xaa; /* VBI data decoding options */
266 table[KS_VBIL118] = 0x2a; /* VBI data decoding options */
267 table[KS_VBIL1512] = 0x00; /* VBI data decoding options */
268 table[KS_TTFRAM] = 0x00; /* Teletext frame alignment pattern */
269 table[KS_TESTA] = 0x00; /* test register, shouldn't be written */
270 table[KS_UVOFFH] = 0x00; /* UV Offset Adjustment High */
271 table[KS_UVOFFL] = 0x00; /* UV Offset Adjustment Low */
272 table[KS_UGAIN] = 0x00; /* U Component Gain Adjustment */
273 table[KS_VGAIN] = 0x00; /* V Component Gain Adjustment */
274 table[KS_VAVB] = 0x07; /* VAV Begin */
275 table[KS_VAVE] = 0x00; /* VAV End */
276 table[KS_CTRACK] = 0x00; /* Chroma Tracking Control */
277 table[KS_POLCTL] = 0x41; /* Timing Signal Polarity Control */
278 table[KS_REFCOD] = 0x80; /* Reference Code Insertion Control */
279 table[KS_INVALY] = 0x10; /* Invalid Y Code */
280 table[KS_INVALU] = 0x80; /* Invalid U Code */
281 table[KS_INVALV] = 0x80; /* Invalid V Code */
282 table[KS_UNUSEY] = 0x10; /* Unused Y Code */
283 table[KS_UNUSEU] = 0x80; /* Unused U Code */
284 table[KS_UNUSEV] = 0x80; /* Unused V Code */
285 table[KS_USRSAV] = 0x00; /* reserved */
286 table[KS_USREAV] = 0x00; /* reserved */
287 table[KS_SHS1A] = 0x00; /* User Defined SHS1 A */
288 /* User Defined SHS1 B, ALT656=1 on 0127B */
289 table[KS_SHS1B] = 0x80;
290 table[KS_SHS1C] = 0x00; /* User Defined SHS1 C */
291 table[KS_CMDE] = 0x00; /* Command Register E */
292 table[KS_VSDEL] = 0x00; /* VS Delay Control */
293 /* Command Register F, update -immediately- */
294 /* (there might come no vsync)*/
295 table[KS_CMDF] = 0x02;
299 /* We need to manually read because of a bug in the KS0127 chip.
301 * An explanation from kayork@mail.utexas.edu:
303 * During I2C reads, the KS0127 only samples for a stop condition
304 * during the place where the acknowledge bit should be. Any standard
305 * I2C implementation (correctly) throws in another clock transition
306 * at the 9th bit, and the KS0127 will not recognize the stop condition
307 * and will continue to clock out data.
309 * So we have to do the read ourself. Big deal.
310 * workaround in i2c-algo-bit
314 static u8 ks0127_read(struct i2c_client *c, u8 reg)
317 struct i2c_msg msgs[] = {
318 { c->addr, 0, sizeof(reg), ® },
319 { c->addr, I2C_M_RD | I2C_M_NO_RD_ACK, sizeof(val), &val }
323 ret = i2c_transfer(c->adapter, msgs, ARRAY_SIZE(msgs));
324 if (ret != ARRAY_SIZE(msgs))
325 v4l_dbg(1, debug, c, "read error\n");
331 static void ks0127_write(struct i2c_client *c, u8 reg, u8 val)
333 struct ks0127 *ks = i2c_get_clientdata(c);
334 char msg[] = { reg, val };
336 if (i2c_master_send(c, msg, sizeof(msg)) != sizeof(msg))
337 v4l_dbg(1, debug, c, "write error\n");
343 /* generic bit-twiddling */
344 static void ks0127_and_or(struct i2c_client *client, u8 reg, u8 and_v, u8 or_v)
346 struct ks0127 *ks = i2c_get_clientdata(client);
348 u8 val = ks->regs[reg];
349 val = (val & and_v) | or_v;
350 ks0127_write(client, reg, val);
355 /****************************************************************************
357 ****************************************************************************/
358 static void ks0127_reset(struct i2c_client *c)
360 struct ks0127 *ks = i2c_get_clientdata(c);
361 u8 *table = reg_defaults;
364 ks->ks_type = KS_TYPE_UNKNOWN;
366 v4l_dbg(1, debug, c, "reset\n");
369 /* initialize all registers to known values */
370 /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */
372 for (i = 1; i < 33; i++)
373 ks0127_write(c, i, table[i]);
375 for (i = 35; i < 40; i++)
376 ks0127_write(c, i, table[i]);
378 for (i = 41; i < 56; i++)
379 ks0127_write(c, i, table[i]);
381 for (i = 58; i < 64; i++)
382 ks0127_write(c, i, table[i]);
385 if ((ks0127_read(c, KS_STAT) & 0x80) == 0) {
386 ks->ks_type = KS_TYPE_0122S;
387 v4l_dbg(1, debug, c, "ks0122s found\n");
391 switch (ks0127_read(c, KS_CMDE) & 0x0f) {
393 ks->ks_type = KS_TYPE_0127;
394 v4l_dbg(1, debug, c, "ks0127 found\n");
398 ks->ks_type = KS_TYPE_0127B;
399 v4l_dbg(1, debug, c, "ks0127B Revision A found\n");
403 v4l_dbg(1, debug, c, "unknown revision\n");
408 static int ks0127_command(struct i2c_client *c, unsigned cmd, void *arg)
410 struct ks0127 *ks = i2c_get_clientdata(c);
411 int *iarg = (int *)arg;
419 v4l_dbg(1, debug, c, "DECODER_INIT\n");
423 case DECODER_SET_INPUT:
425 case KS_INPUT_COMPOSITE_1:
426 case KS_INPUT_COMPOSITE_2:
427 case KS_INPUT_COMPOSITE_3:
428 case KS_INPUT_COMPOSITE_4:
429 case KS_INPUT_COMPOSITE_5:
430 case KS_INPUT_COMPOSITE_6:
432 "DECODER_SET_INPUT %d: Composite\n", *iarg);
433 /* autodetect 50/60 Hz */
434 ks0127_and_or(c, KS_CMDA, 0xfc, 0x00);
436 ks0127_and_or(c, KS_CMDA, ~0x40, 0x00);
438 ks0127_and_or(c, KS_CMDB, 0xb0, *iarg);
439 /* non-freerunning mode */
440 ks0127_and_or(c, KS_CMDC, 0x70, 0x0a);
442 ks0127_and_or(c, KS_CMDD, 0x03, 0x00);
443 /* enable chroma demodulation */
444 ks0127_and_or(c, KS_CTRACK, 0xcf, 0x00);
445 /* chroma trap, HYBWR=1 */
446 ks0127_and_or(c, KS_LUMA, 0x00,
447 (reg_defaults[KS_LUMA])|0x0c);
448 /* scaler fullbw, luma comb off */
449 ks0127_and_or(c, KS_VERTIA, 0x08, 0x81);
450 /* manual chroma comb .25 .5 .25 */
451 ks0127_and_or(c, KS_VERTIC, 0x0f, 0x90);
453 /* chroma path delay */
454 ks0127_and_or(c, KS_CHROMB, 0x0f, 0x90);
456 ks0127_write(c, KS_UGAIN, reg_defaults[KS_UGAIN]);
457 ks0127_write(c, KS_VGAIN, reg_defaults[KS_VGAIN]);
458 ks0127_write(c, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
459 ks0127_write(c, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
462 case KS_INPUT_SVIDEO_1:
463 case KS_INPUT_SVIDEO_2:
464 case KS_INPUT_SVIDEO_3:
466 "DECODER_SET_INPUT %d: S-Video\n", *iarg);
467 /* autodetect 50/60 Hz */
468 ks0127_and_or(c, KS_CMDA, 0xfc, 0x00);
470 ks0127_and_or(c, KS_CMDA, ~0x40, 0x00);
472 ks0127_and_or(c, KS_CMDB, 0xb0, *iarg);
473 /* non-freerunning mode */
474 ks0127_and_or(c, KS_CMDC, 0x70, 0x0a);
476 ks0127_and_or(c, KS_CMDD, 0x03, 0x00);
477 /* enable chroma demodulation */
478 ks0127_and_or(c, KS_CTRACK, 0xcf, 0x00);
479 ks0127_and_or(c, KS_LUMA, 0x00,
480 reg_defaults[KS_LUMA]);
481 /* disable luma comb */
482 ks0127_and_or(c, KS_VERTIA, 0x08,
483 (reg_defaults[KS_VERTIA]&0xf0)|0x01);
484 ks0127_and_or(c, KS_VERTIC, 0x0f,
485 reg_defaults[KS_VERTIC]&0xf0);
487 ks0127_and_or(c, KS_CHROMB, 0x0f,
488 reg_defaults[KS_CHROMB]&0xf0);
490 ks0127_write(c, KS_UGAIN, reg_defaults[KS_UGAIN]);
491 ks0127_write(c, KS_VGAIN, reg_defaults[KS_VGAIN]);
492 ks0127_write(c, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
493 ks0127_write(c, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
496 case KS_INPUT_YUV656:
498 "DECODER_SET_INPUT 15: YUV656\n");
499 if (ks->norm == VIDEO_MODE_NTSC ||
500 ks->norm == KS_STD_PAL_M)
502 ks0127_and_or(c, KS_CMDA, 0xfc, 0x03);
505 ks0127_and_or(c, KS_CMDA, 0xfc, 0x02);
507 ks0127_and_or(c, KS_CMDA, 0xff, 0x40); /* VSE=1 */
508 /* set input line and VALIGN */
509 ks0127_and_or(c, KS_CMDB, 0xb0, (*iarg | 0x40));
510 /* freerunning mode, */
511 /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/
512 ks0127_and_or(c, KS_CMDC, 0x70, 0x87);
513 /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */
514 ks0127_and_or(c, KS_CMDD, 0x03, 0x08);
515 /* disable chroma demodulation */
516 ks0127_and_or(c, KS_CTRACK, 0xcf, 0x30);
517 /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */
518 ks0127_and_or(c, KS_LUMA, 0x00, 0x71);
519 ks0127_and_or(c, KS_VERTIC, 0x0f,
520 reg_defaults[KS_VERTIC]&0xf0);
522 /* scaler fullbw, luma comb off */
523 ks0127_and_or(c, KS_VERTIA, 0x08, 0x81);
525 ks0127_and_or(c, KS_CHROMB, 0x0f,
526 reg_defaults[KS_CHROMB]&0xf0);
528 ks0127_and_or(c, KS_CON, 0x00, 0x00);
529 ks0127_and_or(c, KS_BRT, 0x00, 32); /* spec: 34 */
531 ks0127_and_or(c, KS_SAT, 0x00, 0xe8);
532 ks0127_and_or(c, KS_HUE, 0x00, 0);
534 ks0127_and_or(c, KS_UGAIN, 0x00, 238);
535 ks0127_and_or(c, KS_VGAIN, 0x00, 0x00);
537 /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */
538 ks0127_and_or(c, KS_UVOFFH, 0x00, 0x4f);
539 ks0127_and_or(c, KS_UVOFFL, 0x00, 0x00);
544 "DECODER_SET_INPUT: Unknown input %d\n", *iarg);
548 /* hack: CDMLPF sometimes spontaneously switches on; */
550 ks0127_write(c, KS_DEMOD, reg_defaults[KS_DEMOD]);
553 case DECODER_SET_OUTPUT:
555 case KS_OUTPUT_YUV656E:
557 "DECODER_SET_OUTPUT: OUTPUT_YUV656E (Missing)\n");
562 "DECODER_SET_OUTPUT: OUTPUT_EXV\n");
563 ks0127_and_or(c, KS_OFMTA, 0xf0, 0x09);
568 case DECODER_SET_NORM: /* sam This block mixes old and new norm names... */
569 /* Set to automatic SECAM/Fsc mode */
570 ks0127_and_or(c, KS_DEMOD, 0xf0, 0x00);
574 /* this is untested !! */
575 /* It just detects PAL_N/NTSC_M (no special frequencies) */
576 /* And you have to set the standard a second time afterwards */
577 case VIDEO_MODE_AUTO:
579 "DECODER_SET_NORM: AUTO\n");
581 /* The chip determines the format */
582 /* based on the current field rate */
583 ks0127_and_or(c, KS_CMDA, 0xfc, 0x00);
584 ks0127_and_or(c, KS_CHROMA, 0x9f, 0x20);
585 /* This is wrong for PAL ! As I said, */
586 /* you need to set the standard once again !! */
587 ks->format_height = 240;
588 ks->format_width = 704;
591 case VIDEO_MODE_NTSC:
593 "DECODER_SET_NORM: NTSC_M\n");
594 ks0127_and_or(c, KS_CHROMA, 0x9f, 0x20);
595 ks->format_height = 240;
596 ks->format_width = 704;
601 "KS0127_SET_NORM: NTSC_N (fixme)\n");
602 ks0127_and_or(c, KS_CHROMA, 0x9f, 0x40);
603 ks->format_height = 240;
604 ks->format_width = 704;
609 "DECODER_SET_NORM: PAL_N\n");
610 ks0127_and_or(c, KS_CHROMA, 0x9f, 0x20);
611 ks->format_height = 290;
612 ks->format_width = 704;
617 "KS0127_SET_NORM: PAL_M (fixme)\n");
618 ks0127_and_or(c, KS_CHROMA, 0x9f, 0x40);
619 ks->format_height = 290;
620 ks->format_width = 704;
623 case VIDEO_MODE_SECAM:
625 "KS0127_SET_NORM: SECAM\n");
626 ks->format_height = 290;
627 ks->format_width = 704;
629 /* set to secam autodetection */
630 ks0127_and_or(c, KS_CHROMA, 0xdf, 0x20);
631 ks0127_and_or(c, KS_DEMOD, 0xf0, 0x00);
632 schedule_timeout_interruptible(HZ/10+1);
634 /* did it autodetect? */
635 if (ks0127_read(c, KS_DEMOD) & 0x40)
638 /* force to secam mode */
639 ks0127_and_or(c, KS_DEMOD, 0xf0, 0x0f);
644 "DECODER_SET_NORM: Unknown norm %d\n", *iarg);
649 case DECODER_SET_PICTURE:
651 "DECODER_SET_PICTURE: not yet supported\n");
654 /* sam todo: KS0127_SET_BRIGHTNESS: Merge into DECODER_SET_PICTURE */
655 /* sam todo: KS0127_SET_CONTRAST: Merge into DECODER_SET_PICTURE */
656 /* sam todo: KS0127_SET_HUE: Merge into DECODER_SET_PICTURE? */
657 /* sam todo: KS0127_SET_SATURATION: Merge into DECODER_SET_PICTURE */
658 /* sam todo: KS0127_SET_AGC_MODE: */
659 /* sam todo: KS0127_SET_AGC: */
660 /* sam todo: KS0127_SET_CHROMA_MODE: */
661 /* sam todo: KS0127_SET_PIXCLK_MODE: */
662 /* sam todo: KS0127_SET_GAMMA_MODE: */
663 /* sam todo: KS0127_SET_UGAIN: */
664 /* sam todo: KS0127_SET_VGAIN: */
665 /* sam todo: KS0127_SET_INVALY: */
666 /* sam todo: KS0127_SET_INVALU: */
667 /* sam todo: KS0127_SET_INVALV: */
668 /* sam todo: KS0127_SET_UNUSEY: */
669 /* sam todo: KS0127_SET_UNUSEU: */
670 /* sam todo: KS0127_SET_UNUSEV: */
671 /* sam todo: KS0127_SET_VSALIGN_MODE: */
673 case DECODER_ENABLE_OUTPUT:
678 enable = (*iarg != 0);
681 "DECODER_ENABLE_OUTPUT on\n");
682 /* All output pins on */
683 ks0127_and_or(c, KS_OFMTA, 0xcf, 0x30);
684 /* Obey the OEN pin */
685 ks0127_and_or(c, KS_CDEM, 0x7f, 0x00);
688 "DECODER_ENABLE_OUTPUT off\n");
689 /* Video output pins off */
690 ks0127_and_or(c, KS_OFMTA, 0xcf, 0x00);
691 /* Ignore the OEN pin */
692 ks0127_and_or(c, KS_CDEM, 0x7f, 0x80);
697 /* sam todo: KS0127_SET_OUTPUT_MODE: */
698 /* sam todo: KS0127_SET_WIDTH: */
699 /* sam todo: KS0127_SET_HEIGHT: */
700 /* sam todo: KS0127_SET_HSCALE: */
702 case DECODER_GET_STATUS:
703 v4l_dbg(1, debug, c, "DECODER_GET_STATUS\n");
705 status = ks0127_read(c, KS_STAT);
706 if (!(status & 0x20)) /* NOVID not set */
707 *iarg = (*iarg | DECODER_STATUS_GOOD);
708 if ((status & 0x01)) /* CLOCK set */
709 *iarg = (*iarg | DECODER_STATUS_COLOR);
710 if ((status & 0x08)) /* PALDET set */
711 *iarg = (*iarg | DECODER_STATUS_PAL);
713 *iarg = (*iarg | DECODER_STATUS_NTSC);
716 /* Catch any unknown command */
718 v4l_dbg(1, debug, c, "unknown: 0x%08x\n", cmd);
725 /* Addresses to scan */
726 #define I2C_KS0127_ADDON 0xD8
727 #define I2C_KS0127_ONBOARD 0xDA
729 static unsigned short normal_i2c[] = {
730 I2C_KS0127_ADDON >> 1,
731 I2C_KS0127_ONBOARD >> 1,
737 static int ks0127_probe(struct i2c_client *c, const struct i2c_device_id *id)
741 v4l_info(c, "%s chip found @ 0x%x (%s)\n",
742 c->addr == (I2C_KS0127_ADDON >> 1) ? "addon" : "on-board",
743 c->addr << 1, c->adapter->name);
745 ks = kzalloc(sizeof(*ks), GFP_KERNEL);
749 i2c_set_clientdata(c, ks);
751 ks->ks_type = KS_TYPE_UNKNOWN;
755 ks0127_write(c, KS_CMDA, 0x2c);
758 /* reset the device */
763 static int ks0127_remove(struct i2c_client *c)
765 struct ks0127 *ks = i2c_get_clientdata(c);
767 ks0127_write(c, KS_OFMTA, 0x20); /* tristate */
768 ks0127_write(c, KS_CMDA, 0x2c | 0x80); /* power down */
774 static int ks0127_legacy_probe(struct i2c_adapter *adapter)
776 return adapter->id == I2C_HW_B_ZR36067;
779 static const struct i2c_device_id ks0127_id[] = {
783 MODULE_DEVICE_TABLE(i2c, ks0127_id);
785 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
787 .driverid = I2C_DRIVERID_KS0127,
788 .command = ks0127_command,
789 .probe = ks0127_probe,
790 .remove = ks0127_remove,
791 .legacy_probe = ks0127_legacy_probe,
792 .id_table = ks0127_id,