2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
53 #include <asm/clock.h>
54 #include <asm/sh_bios.h>
64 struct uart_port port;
69 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
70 unsigned int irqs[SCIx_NR_IRQS];
72 /* Port enable callback */
73 void (*enable)(struct uart_port *port);
75 /* Port disable callback */
76 void (*disable)(struct uart_port *port);
79 struct timer_list break_timer;
82 #ifdef CONFIG_HAVE_CLK
88 struct list_head node;
93 struct list_head ports;
95 #ifdef CONFIG_HAVE_CLK
96 struct notifier_block clk_nb;
100 /* Function prototypes */
101 static void sci_stop_tx(struct uart_port *port);
103 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
105 static struct sci_port sci_ports[SCI_NPORTS];
106 static struct uart_driver sci_uart_driver;
108 static inline struct sci_port *
109 to_sci_port(struct uart_port *uart)
111 return container_of(uart, struct sci_port, port);
114 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
116 #ifdef CONFIG_CONSOLE_POLL
117 static inline void handle_error(struct uart_port *port)
119 /* Clear error flags */
120 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
123 static int sci_poll_get_char(struct uart_port *port)
125 unsigned short status;
129 status = sci_in(port, SCxSR);
130 if (status & SCxSR_ERRORS(port)) {
134 } while (!(status & SCxSR_RDxF(port)));
136 c = sci_in(port, SCxRDR);
140 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
146 static void sci_poll_put_char(struct uart_port *port, unsigned char c)
148 unsigned short status;
151 status = sci_in(port, SCxSR);
152 } while (!(status & SCxSR_TDxE(port)));
154 sci_in(port, SCxSR); /* Dummy read */
155 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
156 sci_out(port, SCxTDR, c);
158 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
160 #if defined(__H8300S__)
161 enum { sci_disable, sci_enable };
163 static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
165 volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
166 int ch = (port->mapbase - SMR0) >> 3;
167 unsigned char mask = 1 << (ch+1);
169 if (ctrl == sci_disable)
175 static void h8300_sci_enable(struct uart_port *port)
177 h8300_sci_config(port, sci_enable);
180 static void h8300_sci_disable(struct uart_port *port)
182 h8300_sci_config(port, sci_disable);
186 #if defined(__H8300H__) || defined(__H8300S__)
187 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
189 int ch = (port->mapbase - SMR0) >> 3;
192 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
193 h8300_sci_pins[ch].rx,
195 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
196 h8300_sci_pins[ch].tx,
200 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
202 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
203 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
205 if (port->mapbase == 0xA4400000) {
206 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
207 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
208 } else if (port->mapbase == 0xA4410000)
209 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
211 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
212 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
216 if (cflag & CRTSCTS) {
218 if (port->mapbase == 0xa4430000) { /* SCIF0 */
219 /* Clear PTCR bit 9-2; enable all scif pins but sck */
220 data = __raw_readw(PORT_PTCR);
221 __raw_writew((data & 0xfc03), PORT_PTCR);
222 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
223 /* Clear PVCR bit 9-2 */
224 data = __raw_readw(PORT_PVCR);
225 __raw_writew((data & 0xfc03), PORT_PVCR);
228 if (port->mapbase == 0xa4430000) { /* SCIF0 */
229 /* Clear PTCR bit 5-2; enable only tx and rx */
230 data = __raw_readw(PORT_PTCR);
231 __raw_writew((data & 0xffc3), PORT_PTCR);
232 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
233 /* Clear PVCR bit 5-2 */
234 data = __raw_readw(PORT_PVCR);
235 __raw_writew((data & 0xffc3), PORT_PVCR);
239 #elif defined(CONFIG_CPU_SH3)
240 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
241 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
245 /* We need to set SCPCR to enable RTS/CTS */
246 data = __raw_readw(SCPCR);
247 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
248 __raw_writew(data & 0x0fcf, SCPCR);
250 if (!(cflag & CRTSCTS)) {
251 /* We need to set SCPCR to enable RTS/CTS */
252 data = __raw_readw(SCPCR);
253 /* Clear out SCP7MD1,0, SCP4MD1,0,
254 Set SCP6MD1,0 = {01} (output) */
255 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
257 data = ctrl_inb(SCPDR);
258 /* Set /RTS2 (bit6) = 0 */
259 ctrl_outb(data & 0xbf, SCPDR);
262 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
263 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
267 if (port->mapbase == 0xffe00000) {
268 data = __raw_readw(PSCR);
270 if (!(cflag & CRTSCTS))
273 __raw_writew(data, PSCR);
276 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
277 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
278 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
279 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
280 defined(CONFIG_CPU_SUBTYPE_SHX3)
281 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
283 if (!(cflag & CRTSCTS))
284 __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
286 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
287 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
289 if (!(cflag & CRTSCTS))
290 __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
293 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
299 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
300 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
301 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
302 defined(CONFIG_CPU_SUBTYPE_SH7786)
303 static inline int scif_txroom(struct uart_port *port)
305 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
308 static inline int scif_rxroom(struct uart_port *port)
310 return sci_in(port, SCRFDR) & 0xff;
312 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
313 static inline int scif_txroom(struct uart_port *port)
315 if ((port->mapbase == 0xffe00000) ||
316 (port->mapbase == 0xffe08000)) {
318 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
321 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
325 static inline int scif_rxroom(struct uart_port *port)
327 if ((port->mapbase == 0xffe00000) ||
328 (port->mapbase == 0xffe08000)) {
330 return sci_in(port, SCRFDR) & 0xff;
333 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
337 static inline int scif_txroom(struct uart_port *port)
339 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
342 static inline int scif_rxroom(struct uart_port *port)
344 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
348 static inline int sci_txroom(struct uart_port *port)
350 return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
353 static inline int sci_rxroom(struct uart_port *port)
355 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
358 /* ********************************************************************** *
359 * the interrupt related routines *
360 * ********************************************************************** */
362 static void sci_transmit_chars(struct uart_port *port)
364 struct circ_buf *xmit = &port->info->xmit;
365 unsigned int stopped = uart_tx_stopped(port);
366 unsigned short status;
370 status = sci_in(port, SCxSR);
371 if (!(status & SCxSR_TDxE(port))) {
372 ctrl = sci_in(port, SCSCR);
373 if (uart_circ_empty(xmit))
374 ctrl &= ~SCI_CTRL_FLAGS_TIE;
376 ctrl |= SCI_CTRL_FLAGS_TIE;
377 sci_out(port, SCSCR, ctrl);
381 if (port->type == PORT_SCI)
382 count = sci_txroom(port);
384 count = scif_txroom(port);
392 } else if (!uart_circ_empty(xmit) && !stopped) {
393 c = xmit->buf[xmit->tail];
394 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
399 sci_out(port, SCxTDR, c);
402 } while (--count > 0);
404 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
406 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
407 uart_write_wakeup(port);
408 if (uart_circ_empty(xmit)) {
411 ctrl = sci_in(port, SCSCR);
413 if (port->type != PORT_SCI) {
414 sci_in(port, SCxSR); /* Dummy read */
415 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
418 ctrl |= SCI_CTRL_FLAGS_TIE;
419 sci_out(port, SCSCR, ctrl);
423 /* On SH3, SCIF may read end-of-break as a space->mark char */
424 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
426 static inline void sci_receive_chars(struct uart_port *port)
428 struct sci_port *sci_port = to_sci_port(port);
429 struct tty_struct *tty = port->info->port.tty;
430 int i, count, copied = 0;
431 unsigned short status;
434 status = sci_in(port, SCxSR);
435 if (!(status & SCxSR_RDxF(port)))
439 if (port->type == PORT_SCI)
440 count = sci_rxroom(port);
442 count = scif_rxroom(port);
444 /* Don't copy more bytes than there is room for in the buffer */
445 count = tty_buffer_request_room(tty, count);
447 /* If for any reason we can't copy more data, we're done! */
451 if (port->type == PORT_SCI) {
452 char c = sci_in(port, SCxRDR);
453 if (uart_handle_sysrq_char(port, c) ||
454 sci_port->break_flag)
457 tty_insert_flip_char(tty, c, TTY_NORMAL);
459 for (i = 0; i < count; i++) {
460 char c = sci_in(port, SCxRDR);
461 status = sci_in(port, SCxSR);
462 #if defined(CONFIG_CPU_SH3)
463 /* Skip "chars" during break */
464 if (sci_port->break_flag) {
466 (status & SCxSR_FER(port))) {
471 /* Nonzero => end-of-break */
472 dev_dbg(port->dev, "debounce<%02x>\n", c);
473 sci_port->break_flag = 0;
480 #endif /* CONFIG_CPU_SH3 */
481 if (uart_handle_sysrq_char(port, c)) {
486 /* Store data and status */
487 if (status&SCxSR_FER(port)) {
489 dev_notice(port->dev, "frame error\n");
490 } else if (status&SCxSR_PER(port)) {
492 dev_notice(port->dev, "parity error\n");
496 tty_insert_flip_char(tty, c, flag);
500 sci_in(port, SCxSR); /* dummy read */
501 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
504 port->icount.rx += count;
508 /* Tell the rest of the system the news. New characters! */
509 tty_flip_buffer_push(tty);
511 sci_in(port, SCxSR); /* dummy read */
512 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
516 #define SCI_BREAK_JIFFIES (HZ/20)
517 /* The sci generates interrupts during the break,
518 * 1 per millisecond or so during the break period, for 9600 baud.
519 * So dont bother disabling interrupts.
520 * But dont want more than 1 break event.
521 * Use a kernel timer to periodically poll the rx line until
522 * the break is finished.
524 static void sci_schedule_break_timer(struct sci_port *port)
526 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
527 add_timer(&port->break_timer);
529 /* Ensure that two consecutive samples find the break over. */
530 static void sci_break_timer(unsigned long data)
532 struct sci_port *port = (struct sci_port *)data;
534 if (sci_rxd_in(&port->port) == 0) {
535 port->break_flag = 1;
536 sci_schedule_break_timer(port);
537 } else if (port->break_flag == 1) {
539 port->break_flag = 2;
540 sci_schedule_break_timer(port);
542 port->break_flag = 0;
545 static inline int sci_handle_errors(struct uart_port *port)
548 unsigned short status = sci_in(port, SCxSR);
549 struct tty_struct *tty = port->info->port.tty;
551 if (status & SCxSR_ORER(port)) {
553 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
556 dev_notice(port->dev, "overrun error");
559 if (status & SCxSR_FER(port)) {
560 if (sci_rxd_in(port) == 0) {
561 /* Notify of BREAK */
562 struct sci_port *sci_port = to_sci_port(port);
564 if (!sci_port->break_flag) {
565 sci_port->break_flag = 1;
566 sci_schedule_break_timer(sci_port);
568 /* Do sysrq handling. */
569 if (uart_handle_break(port))
572 dev_dbg(port->dev, "BREAK detected\n");
574 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
580 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
583 dev_notice(port->dev, "frame error\n");
587 if (status & SCxSR_PER(port)) {
589 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
592 dev_notice(port->dev, "parity error");
596 tty_flip_buffer_push(tty);
601 static inline int sci_handle_fifo_overrun(struct uart_port *port)
603 struct tty_struct *tty = port->info->port.tty;
606 if (port->type != PORT_SCIF)
609 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
610 sci_out(port, SCLSR, 0);
612 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
613 tty_flip_buffer_push(tty);
615 dev_notice(port->dev, "overrun error\n");
622 static inline int sci_handle_breaks(struct uart_port *port)
625 unsigned short status = sci_in(port, SCxSR);
626 struct tty_struct *tty = port->info->port.tty;
627 struct sci_port *s = to_sci_port(port);
629 if (uart_handle_break(port))
632 if (!s->break_flag && status & SCxSR_BRK(port)) {
633 #if defined(CONFIG_CPU_SH3)
637 /* Notify of BREAK */
638 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
641 dev_dbg(port->dev, "BREAK detected\n");
645 tty_flip_buffer_push(tty);
647 copied += sci_handle_fifo_overrun(port);
652 static irqreturn_t sci_rx_interrupt(int irq, void *port)
654 /* I think sci_receive_chars has to be called irrespective
655 * of whether the I_IXOFF is set, otherwise, how is the interrupt
658 sci_receive_chars(port);
663 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
665 struct uart_port *port = ptr;
667 spin_lock_irq(&port->lock);
668 sci_transmit_chars(port);
669 spin_unlock_irq(&port->lock);
674 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
676 struct uart_port *port = ptr;
679 if (port->type == PORT_SCI) {
680 if (sci_handle_errors(port)) {
681 /* discard character in rx buffer */
683 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
686 sci_handle_fifo_overrun(port);
687 sci_rx_interrupt(irq, ptr);
690 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
692 /* Kick the transmission */
693 sci_tx_interrupt(irq, ptr);
698 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
700 struct uart_port *port = ptr;
703 sci_handle_breaks(port);
704 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
709 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
711 unsigned short ssr_status, scr_status;
712 struct uart_port *port = ptr;
713 irqreturn_t ret = IRQ_NONE;
715 ssr_status = sci_in(port, SCxSR);
716 scr_status = sci_in(port, SCSCR);
719 if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE))
720 ret = sci_tx_interrupt(irq, ptr);
722 if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE))
723 ret = sci_rx_interrupt(irq, ptr);
724 /* Error Interrupt */
725 if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE))
726 ret = sci_er_interrupt(irq, ptr);
727 /* Break Interrupt */
728 if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE))
729 ret = sci_br_interrupt(irq, ptr);
734 #ifdef CONFIG_HAVE_CLK
736 * Here we define a transistion notifier so that we can update all of our
737 * ports' baud rate when the peripheral clock changes.
739 static int sci_notifier(struct notifier_block *self,
740 unsigned long phase, void *p)
742 struct sh_sci_priv *priv = container_of(self,
743 struct sh_sci_priv, clk_nb);
744 struct sci_port *sci_port;
747 if ((phase == CPUFREQ_POSTCHANGE) ||
748 (phase == CPUFREQ_RESUMECHANGE)) {
749 spin_lock_irqsave(&priv->lock, flags);
750 list_for_each_entry(sci_port, &priv->ports, node)
751 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
753 spin_unlock_irqrestore(&priv->lock, flags);
759 static void sci_clk_enable(struct uart_port *port)
761 struct sci_port *sci_port = to_sci_port(port);
763 clk_enable(sci_port->dclk);
764 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
767 clk_enable(sci_port->iclk);
770 static void sci_clk_disable(struct uart_port *port)
772 struct sci_port *sci_port = to_sci_port(port);
775 clk_disable(sci_port->iclk);
777 clk_disable(sci_port->dclk);
781 static int sci_request_irq(struct sci_port *port)
784 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
785 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
788 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
789 "SCI Transmit Data Empty", "SCI Break" };
791 if (port->irqs[0] == port->irqs[1]) {
792 if (unlikely(!port->irqs[0]))
795 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
796 IRQF_DISABLED, "sci", port)) {
797 dev_err(port->port.dev, "Can't allocate IRQ\n");
801 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
802 if (unlikely(!port->irqs[i]))
805 if (request_irq(port->irqs[i], handlers[i],
806 IRQF_DISABLED, desc[i], port)) {
807 dev_err(port->port.dev, "Can't allocate IRQ\n");
816 static void sci_free_irq(struct sci_port *port)
820 if (port->irqs[0] == port->irqs[1])
821 free_irq(port->irqs[0], port);
823 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
827 free_irq(port->irqs[i], port);
832 static unsigned int sci_tx_empty(struct uart_port *port)
838 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
840 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
841 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
842 /* If you have signals for DTR and DCD, please implement here. */
845 static unsigned int sci_get_mctrl(struct uart_port *port)
847 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
850 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
853 static void sci_start_tx(struct uart_port *port)
857 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
858 ctrl = sci_in(port, SCSCR);
859 ctrl |= SCI_CTRL_FLAGS_TIE;
860 sci_out(port, SCSCR, ctrl);
863 static void sci_stop_tx(struct uart_port *port)
867 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
868 ctrl = sci_in(port, SCSCR);
869 ctrl &= ~SCI_CTRL_FLAGS_TIE;
870 sci_out(port, SCSCR, ctrl);
873 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
877 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
878 ctrl = sci_in(port, SCSCR);
879 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
880 sci_out(port, SCSCR, ctrl);
883 static void sci_stop_rx(struct uart_port *port)
887 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
888 ctrl = sci_in(port, SCSCR);
889 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
890 sci_out(port, SCSCR, ctrl);
893 static void sci_enable_ms(struct uart_port *port)
895 /* Nothing here yet .. */
898 static void sci_break_ctl(struct uart_port *port, int break_state)
900 /* Nothing here yet .. */
903 static int sci_startup(struct uart_port *port)
905 struct sci_port *s = to_sci_port(port);
912 sci_start_rx(port, 1);
917 static void sci_shutdown(struct uart_port *port)
919 struct sci_port *s = to_sci_port(port);
929 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
930 struct ktermios *old)
932 unsigned int status, baud, smr_val;
935 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
937 t = SCBRR_VALUE(baud, port->uartclk);
940 status = sci_in(port, SCxSR);
941 } while (!(status & SCxSR_TEND(port)));
943 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
945 if (port->type != PORT_SCI)
946 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
948 smr_val = sci_in(port, SCSMR) & 3;
949 if ((termios->c_cflag & CSIZE) == CS7)
951 if (termios->c_cflag & PARENB)
953 if (termios->c_cflag & PARODD)
955 if (termios->c_cflag & CSTOPB)
958 uart_update_timeout(port, termios->c_cflag, baud);
960 sci_out(port, SCSMR, smr_val);
964 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
967 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
969 sci_out(port, SCBRR, t);
970 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
973 sci_init_pins(port, termios->c_cflag);
974 sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
976 sci_out(port, SCSCR, SCSCR_INIT(port));
978 if ((termios->c_cflag & CREAD) != 0)
979 sci_start_rx(port, 0);
982 static const char *sci_type(struct uart_port *port)
984 switch (port->type) {
998 static void sci_release_port(struct uart_port *port)
1000 /* Nothing here yet .. */
1003 static int sci_request_port(struct uart_port *port)
1005 /* Nothing here yet .. */
1009 static void sci_config_port(struct uart_port *port, int flags)
1011 struct sci_port *s = to_sci_port(port);
1013 port->type = s->type;
1018 if (port->flags & UPF_IOREMAP) {
1019 port->membase = ioremap_nocache(port->mapbase, 0x40);
1021 if (IS_ERR(port->membase))
1022 dev_err(port->dev, "can't remap port#%d\n", port->line);
1025 * For the simple (and majority of) cases where we don't
1026 * need to do any remapping, just cast the cookie
1029 port->membase = (void __iomem *)port->mapbase;
1033 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1035 struct sci_port *s = to_sci_port(port);
1037 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1039 if (ser->baud_base < 2400)
1040 /* No paper tape reader for Mitch.. */
1046 static struct uart_ops sci_uart_ops = {
1047 .tx_empty = sci_tx_empty,
1048 .set_mctrl = sci_set_mctrl,
1049 .get_mctrl = sci_get_mctrl,
1050 .start_tx = sci_start_tx,
1051 .stop_tx = sci_stop_tx,
1052 .stop_rx = sci_stop_rx,
1053 .enable_ms = sci_enable_ms,
1054 .break_ctl = sci_break_ctl,
1055 .startup = sci_startup,
1056 .shutdown = sci_shutdown,
1057 .set_termios = sci_set_termios,
1059 .release_port = sci_release_port,
1060 .request_port = sci_request_port,
1061 .config_port = sci_config_port,
1062 .verify_port = sci_verify_port,
1063 #ifdef CONFIG_CONSOLE_POLL
1064 .poll_get_char = sci_poll_get_char,
1065 .poll_put_char = sci_poll_put_char,
1069 static void __devinit sci_init_single(struct platform_device *dev,
1070 struct sci_port *sci_port,
1072 struct plat_sci_port *p)
1074 sci_port->port.ops = &sci_uart_ops;
1075 sci_port->port.iotype = UPIO_MEM;
1076 sci_port->port.line = index;
1077 sci_port->port.fifosize = 1;
1079 #if defined(__H8300H__) || defined(__H8300S__)
1081 sci_port->enable = h8300_sci_enable;
1082 sci_port->disable = h8300_sci_disable;
1084 sci_port->port.uartclk = CONFIG_CPU_CLOCK;
1085 #elif defined(CONFIG_HAVE_CLK)
1086 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
1087 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
1088 sci_port->enable = sci_clk_enable;
1089 sci_port->disable = sci_clk_disable;
1091 #error "Need a valid uartclk"
1094 sci_port->break_timer.data = (unsigned long)sci_port;
1095 sci_port->break_timer.function = sci_break_timer;
1096 init_timer(&sci_port->break_timer);
1098 sci_port->port.mapbase = p->mapbase;
1099 sci_port->port.membase = p->membase;
1101 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
1102 sci_port->port.flags = p->flags;
1103 sci_port->port.dev = &dev->dev;
1104 sci_port->type = sci_port->port.type = p->type;
1106 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1110 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1111 static struct tty_driver *serial_console_device(struct console *co, int *index)
1113 struct uart_driver *p = &sci_uart_driver;
1115 return p->tty_driver;
1118 static void serial_console_putchar(struct uart_port *port, int ch)
1120 sci_poll_put_char(port, ch);
1124 * Print a string to the serial port trying not to disturb
1125 * any possible real use of the port...
1127 static void serial_console_write(struct console *co, const char *s,
1130 struct uart_port *port = co->data;
1131 struct sci_port *sci_port = to_sci_port(port);
1132 unsigned short bits;
1134 if (sci_port->enable)
1135 sci_port->enable(port);
1137 uart_console_write(port, s, count, serial_console_putchar);
1139 /* wait until fifo is empty and last bit has been transmitted */
1140 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1141 while ((sci_in(port, SCxSR) & bits) != bits)
1144 if (sci_port->disable);
1145 sci_port->disable(port);
1148 static int __init serial_console_setup(struct console *co, char *options)
1150 struct sci_port *sci_port;
1151 struct uart_port *port;
1159 * Check whether an invalid uart number has been specified, and
1160 * if so, search for the first available port that does have
1163 if (co->index >= SCI_NPORTS)
1166 sci_port = &sci_ports[co->index];
1167 port = &sci_port->port;
1171 * Also need to check port->type, we don't actually have any
1172 * UPIO_PORT ports, but uart_report_port() handily misreports
1173 * it anyways if we don't have a port available by the time this is
1179 sci_config_port(port, 0);
1181 if (sci_port->enable)
1182 sci_port->enable(port);
1185 uart_parse_options(options, &baud, &parity, &bits, &flow);
1187 ret = uart_set_options(port, co, baud, parity, bits, flow);
1188 #if defined(__H8300H__) || defined(__H8300S__)
1189 /* disable rx interrupt */
1193 /* TODO: disable clock */
1197 static struct console serial_console = {
1199 .device = serial_console_device,
1200 .write = serial_console_write,
1201 .setup = serial_console_setup,
1202 .flags = CON_PRINTBUFFER,
1206 static int __init sci_console_init(void)
1208 register_console(&serial_console);
1211 console_initcall(sci_console_init);
1212 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1214 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1215 #define SCI_CONSOLE (&serial_console)
1217 #define SCI_CONSOLE 0
1220 static char banner[] __initdata =
1221 KERN_INFO "SuperH SCI(F) driver initialized\n";
1223 static struct uart_driver sci_uart_driver = {
1224 .owner = THIS_MODULE,
1225 .driver_name = "sci",
1226 .dev_name = "ttySC",
1228 .minor = SCI_MINOR_START,
1230 .cons = SCI_CONSOLE,
1234 static int sci_remove(struct platform_device *dev)
1236 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1238 unsigned long flags;
1240 #ifdef CONFIG_HAVE_CLK
1241 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1244 spin_lock_irqsave(&priv->lock, flags);
1245 list_for_each_entry(p, &priv->ports, node)
1246 uart_remove_one_port(&sci_uart_driver, &p->port);
1248 spin_unlock_irqrestore(&priv->lock, flags);
1254 static int __devinit sci_probe_single(struct platform_device *dev,
1256 struct plat_sci_port *p,
1257 struct sci_port *sciport)
1259 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1260 unsigned long flags;
1264 if (unlikely(index >= SCI_NPORTS)) {
1265 dev_notice(&dev->dev, "Attempting to register port "
1266 "%d when only %d are available.\n",
1267 index+1, SCI_NPORTS);
1268 dev_notice(&dev->dev, "Consider bumping "
1269 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1273 sci_init_single(dev, sciport, index, p);
1275 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1279 INIT_LIST_HEAD(&sciport->node);
1281 spin_lock_irqsave(&priv->lock, flags);
1282 list_add(&sciport->node, &priv->ports);
1283 spin_unlock_irqrestore(&priv->lock, flags);
1289 * Register a set of serial devices attached to a platform device. The
1290 * list is terminated with a zero flags entry, which means we expect
1291 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1292 * remapping (such as sh64) should also set UPF_IOREMAP.
1294 static int __devinit sci_probe(struct platform_device *dev)
1296 struct plat_sci_port *p = dev->dev.platform_data;
1297 struct sh_sci_priv *priv;
1298 int i, ret = -EINVAL;
1300 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1304 INIT_LIST_HEAD(&priv->ports);
1305 spin_lock_init(&priv->lock);
1306 platform_set_drvdata(dev, priv);
1308 #ifdef CONFIG_HAVE_CLK
1309 priv->clk_nb.notifier_call = sci_notifier;
1310 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1313 if (dev->id != -1) {
1314 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1318 for (i = 0; p && p->flags != 0; p++, i++) {
1319 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1325 #ifdef CONFIG_SH_STANDARD_BIOS
1326 sh_bios_gdb_detach();
1336 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1338 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1340 unsigned long flags;
1342 spin_lock_irqsave(&priv->lock, flags);
1343 list_for_each_entry(p, &priv->ports, node)
1344 uart_suspend_port(&sci_uart_driver, &p->port);
1346 spin_unlock_irqrestore(&priv->lock, flags);
1351 static int sci_resume(struct platform_device *dev)
1353 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1355 unsigned long flags;
1357 spin_lock_irqsave(&priv->lock, flags);
1358 list_for_each_entry(p, &priv->ports, node)
1359 uart_resume_port(&sci_uart_driver, &p->port);
1361 spin_unlock_irqrestore(&priv->lock, flags);
1366 static struct platform_driver sci_driver = {
1368 .remove = __devexit_p(sci_remove),
1369 .suspend = sci_suspend,
1370 .resume = sci_resume,
1373 .owner = THIS_MODULE,
1377 static int __init sci_init(void)
1383 ret = uart_register_driver(&sci_uart_driver);
1384 if (likely(ret == 0)) {
1385 ret = platform_driver_register(&sci_driver);
1387 uart_unregister_driver(&sci_uart_driver);
1393 static void __exit sci_exit(void)
1395 platform_driver_unregister(&sci_driver);
1396 uart_unregister_driver(&sci_uart_driver);
1399 module_init(sci_init);
1400 module_exit(sci_exit);
1402 MODULE_LICENSE("GPL");
1403 MODULE_ALIAS("platform:sh-sci");