2 * cx18 interrupt handling
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 #include "cx18-driver.h"
24 #include "cx18-firmware.h"
25 #include "cx18-fileops.h"
26 #include "cx18-queue.h"
28 #include "cx18-ioctl.h"
29 #include "cx18-mailbox.h"
33 static void epu_dma_done(struct cx18 *cx, struct cx18_mailbox *mb)
35 u32 handle = mb->args[0];
36 struct cx18_stream *s = NULL;
37 struct cx18_buffer *buf;
42 for (i = 0; i < CX18_MAX_STREAMS; i++) {
44 if ((handle == s->handle) && (s->dvb.enabled))
46 if (s->v4l2dev && handle == s->handle)
49 if (i == CX18_MAX_STREAMS) {
50 CX18_WARN("Got DMA done notification for unknown/inactive"
51 " handle %d\n", handle);
52 mb->error = CXERR_NOT_OPEN;
60 CX18_WARN("Ack struct = %d for %s\n",
61 mb->args[2], s->name);
62 id = cx18_read_enc(cx, off);
63 buf = cx18_queue_get_buf_irq(s, id, cx18_read_enc(cx, off + 4));
64 CX18_DEBUG_HI_DMA("DMA DONE for %s (buffer %d)\n", s->name, id);
66 cx18_buf_sync_for_cpu(s, buf);
67 if (s->type == CX18_ENC_STREAM_TYPE_TS && s->dvb.enabled) {
68 /* process the buffer here */
69 CX18_DEBUG_HI_DMA("TS recv and sent bytesused=%d\n",
72 dvb_dmx_swfilter(&s->dvb.demux, buf->buf,
75 cx18_buf_sync_for_device(s, buf);
76 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
77 (void __iomem *)&cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
78 1, buf->id, s->buf_size);
80 set_bit(CX18_F_B_NEED_BUF_SWAP, &buf->b_flags);
82 CX18_WARN("Could not find buf %d for stream %s\n",
83 cx18_read_enc(cx, off), s->name);
88 wake_up(&cx->dma_waitq);
93 static void epu_debug(struct cx18 *cx, struct cx18_mailbox *mb)
95 char str[256] = { 0 };
99 cx18_setup_page(cx, mb->args[1]);
100 cx18_memcpy_fromio(cx, str, cx->enc_mem + mb->args[1], 252);
104 CX18_DEBUG_INFO("%x %s\n", mb->args[0], str);
105 p = strchr(str, '.');
106 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags) && p && p > str)
107 CX18_INFO("FW version: %s\n", p - 1);
110 static void epu_cmd(struct cx18 *cx, u32 sw1)
112 struct cx18_mailbox mb;
114 if (sw1 & IRQ_CPU_TO_EPU) {
115 cx18_memcpy_fromio(cx, &mb, &cx->scb->cpu2epu_mb, sizeof(mb));
119 case CX18_EPU_DMA_DONE:
120 epu_dma_done(cx, &mb);
126 CX18_WARN("Unknown CPU_TO_EPU mailbox command %#08x\n",
132 if (sw1 & IRQ_APU_TO_EPU) {
133 cx18_memcpy_fromio(cx, &mb, &cx->scb->apu2epu_mb, sizeof(mb));
134 CX18_WARN("Unknown APU_TO_EPU mailbox command %#08x\n", mb.cmd);
137 if (sw1 & IRQ_HPU_TO_EPU) {
138 cx18_memcpy_fromio(cx, &mb, &cx->scb->hpu2epu_mb, sizeof(mb));
139 CX18_WARN("Unknown HPU_TO_EPU mailbox command %#08x\n", mb.cmd);
143 static void xpu_ack(struct cx18 *cx, u32 sw2)
145 if (sw2 & IRQ_CPU_TO_EPU_ACK)
146 wake_up(&cx->mb_cpu_waitq);
147 if (sw2 & IRQ_APU_TO_EPU_ACK)
148 wake_up(&cx->mb_apu_waitq);
149 if (sw2 & IRQ_HPU_TO_EPU_ACK)
150 wake_up(&cx->mb_hpu_waitq);
153 irqreturn_t cx18_irq_handler(int irq, void *dev_id)
155 struct cx18 *cx = (struct cx18 *)dev_id;
160 sw1_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
161 sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & sw1_mask;
162 sw2_mask = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
163 sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & sw2_mask;
164 hw2_mask = cx18_read_reg(cx, HW2_INT_MASK5_PCI);
165 hw2 = cx18_read_reg(cx, HW2_INT_CLR_STATUS) & hw2_mask;
168 cx18_write_reg_expect(cx, sw1, SW1_INT_STATUS, ~sw1, sw1);
170 cx18_write_reg_expect(cx, sw2, SW2_INT_STATUS, ~sw2, sw2);
172 cx18_write_reg_expect(cx, hw2, HW2_INT_CLR_STATUS, ~hw2, hw2);
174 if (sw1 || sw2 || hw2)
175 CX18_DEBUG_HI_IRQ("SW1: %x SW2: %x HW2: %x\n", sw1, sw2, hw2);
177 /* To do: interrupt-based I2C handling
178 if (hw2 & (HW2_I2C1_INT|HW2_I2C2_INT)) {
188 return (sw1 || sw2 || hw2) ? IRQ_HANDLED : IRQ_NONE;