git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rtl818x/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/usb.h>
  25 #include <linux/delay.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/eeprom_93cx6.h>
  28 #include <net/mac80211.h>
  29
  30 #include "rtl8187.h"
  31 #include "rtl8187_rtl8225.h"
  32 #ifdef CONFIG_RTL8187_LEDS
  33 #include "rtl8187_leds.h"
  34 #endif
  35
  36 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  37 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  38 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  39 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  40 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  41 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  42 MODULE_LICENSE("GPL");
  43
  44 static struct usb_device_id rtl8187_table[] __devinitdata = {
  45         /* Asus */
  46         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  47         /* Belkin */
  48         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  49         /* Realtek */
  50         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  51         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  52         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  53         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  54         /* Surecom */
  55         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  56         /* Logitech */
  57         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  58         /* Netgear */
  59         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  60         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  61         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  62         /* HP */
  63         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  64         /* Sitecom */
  65         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  66         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  67         /* Sphairon Access Systems GmbH */
  68         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  69         /* Dick Smith Electronics */
  70         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  71         /* Abocom */
  72         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  73         /* Qcom */
  74         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  75         /* AirLive */
  76         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  77         {}
  78 };
  79
  80 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  81
  82 static const struct ieee80211_rate rtl818x_rates[] = {
  83         { .bitrate = 10, .hw_value = 0, },
  84         { .bitrate = 20, .hw_value = 1, },
  85         { .bitrate = 55, .hw_value = 2, },
  86         { .bitrate = 110, .hw_value = 3, },
  87         { .bitrate = 60, .hw_value = 4, },
  88         { .bitrate = 90, .hw_value = 5, },
  89         { .bitrate = 120, .hw_value = 6, },
  90         { .bitrate = 180, .hw_value = 7, },
  91         { .bitrate = 240, .hw_value = 8, },
  92         { .bitrate = 360, .hw_value = 9, },
  93         { .bitrate = 480, .hw_value = 10, },
  94         { .bitrate = 540, .hw_value = 11, },
  95 };
  96
  97 static const struct ieee80211_channel rtl818x_channels[] = {
  98         { .center_freq = 2412 },
  99         { .center_freq = 2417 },
 100         { .center_freq = 2422 },
 101         { .center_freq = 2427 },
 102         { .center_freq = 2432 },
 103         { .center_freq = 2437 },
 104         { .center_freq = 2442 },
 105         { .center_freq = 2447 },
 106         { .center_freq = 2452 },
 107         { .center_freq = 2457 },
 108         { .center_freq = 2462 },
 109         { .center_freq = 2467 },
 110         { .center_freq = 2472 },
 111         { .center_freq = 2484 },
 112 };
 113
 114 static void rtl8187_iowrite_async_cb(struct urb *urb)
 115 {
 116         kfree(urb->context);
 117 }
 118
 119 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 120                                   void *data, u16 len)
 121 {
 122         struct usb_ctrlrequest *dr;
 123         struct urb *urb;
 124         struct rtl8187_async_write_data {
 125                 u8 data[4];
 126                 struct usb_ctrlrequest dr;
 127         } *buf;
 128         int rc;
 129
 130         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 131         if (!buf)
 132                 return;
 133
 134         urb = usb_alloc_urb(0, GFP_ATOMIC);
 135         if (!urb) {
 136                 kfree(buf);
 137                 return;
 138         }
 139
 140         dr = &buf->dr;
 141
 142         dr->bRequestType = RTL8187_REQT_WRITE;
 143         dr->bRequest = RTL8187_REQ_SET_REG;
 144         dr->wValue = addr;
 145         dr->wIndex = 0;
 146         dr->wLength = cpu_to_le16(len);
 147
 148         memcpy(buf, data, len);
 149
 150         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 151                              (unsigned char *)dr, buf, len,
 152                              rtl8187_iowrite_async_cb, buf);
 153         usb_anchor_urb(urb, &priv->anchored);
 154         rc = usb_submit_urb(urb, GFP_ATOMIC);
 155         if (rc < 0) {
 156                 kfree(buf);
 157                 usb_unanchor_urb(urb);
 158         }
 159         usb_free_urb(urb);
 160 }
 161
 162 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 163                                            __le32 *addr, u32 val)
 164 {
 165         __le32 buf = cpu_to_le32(val);
 166
 167         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 168                               &buf, sizeof(buf));
 169 }
 170
 171 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 172 {
 173         struct rtl8187_priv *priv = dev->priv;
 174
 175         data <<= 8;
 176         data |= addr | 0x80;
 177
 178         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 179         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 180         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 181         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 182 }
 183
 184 static void rtl8187_tx_cb(struct urb *urb)
 185 {
 186         struct sk_buff *skb = (struct sk_buff *)urb->context;
 187         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 188         struct ieee80211_hw *hw = info->rate_driver_data[0];
 189         struct rtl8187_priv *priv = hw->priv;
 190
 191         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 192                                           sizeof(struct rtl8187_tx_hdr));
 193         ieee80211_tx_info_clear_status(info);
 194
 195         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 196                 if (priv->is_rtl8187b) {
 197                         skb_queue_tail(&priv->b_tx_status.queue, skb);
 198
 199                         /* queue is "full", discard last items */
 200                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 201                                 struct sk_buff *old_skb;
 202
 203                                 dev_dbg(&priv->udev->dev,
 204                                         "transmit status queue full\n");
 205
 206                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 207                                 ieee80211_tx_status_irqsafe(hw, old_skb);
 208                         }
 209                         return;
 210                 } else {
 211                         info->flags |= IEEE80211_TX_STAT_ACK;
 212                 }
 213         }
 214         if (priv->is_rtl8187b)
 215                 ieee80211_tx_status_irqsafe(hw, skb);
 216         else {
 217                 /* Retry information for the RTI8187 is only available by
 218                  * reading a register in the device. We are in interrupt mode
 219                  * here, thus queue the skb and finish on a work queue. */
 220                 skb_queue_tail(&priv->b_tx_status.queue, skb);
 221                 queue_delayed_work(hw->workqueue, &priv->work, 0);
 222         }
 223 }
 224
 225 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 226 {
 227         struct rtl8187_priv *priv = dev->priv;
 228         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 229         unsigned int ep;
 230         void *buf;
 231         struct urb *urb;
 232         __le16 rts_dur = 0;
 233         u32 flags;
 234         int rc;
 235
 236         urb = usb_alloc_urb(0, GFP_ATOMIC);
 237         if (!urb) {
 238                 kfree_skb(skb);
 239                 return NETDEV_TX_OK;
 240         }
 241
 242         flags = skb->len;
 243         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 244
 245         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 246         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 247                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 248         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 249                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 250                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 251                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 252                                                  skb->len, info);
 253         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 254                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 255                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 256         }
 257
 258         if (!priv->is_rtl8187b) {
 259                 struct rtl8187_tx_hdr *hdr =
 260                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 261                 hdr->flags = cpu_to_le32(flags);
 262                 hdr->len = 0;
 263                 hdr->rts_duration = rts_dur;
 264                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 265                 buf = hdr;
 266
 267                 ep = 2;
 268         } else {
 269                 /* fc needs to be calculated before skb_push() */
 270                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 271                 struct ieee80211_hdr *tx_hdr =
 272                         (struct ieee80211_hdr *)(skb->data);
 273                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 274
 275                 struct rtl8187b_tx_hdr *hdr =
 276                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 277                 struct ieee80211_rate *txrate =
 278                         ieee80211_get_tx_rate(dev, info);
 279                 memset(hdr, 0, sizeof(*hdr));
 280                 hdr->flags = cpu_to_le32(flags);
 281                 hdr->rts_duration = rts_dur;
 282                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 283                 hdr->tx_duration =
 284                         ieee80211_generic_frame_duration(dev, priv->vif,
 285                                                          skb->len, txrate);
 286                 buf = hdr;
 287
 288                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 289                         ep = 12;
 290                 else
 291                         ep = epmap[skb_get_queue_mapping(skb)];
 292         }
 293
 294         info->rate_driver_data[0] = dev;
 295         info->rate_driver_data[1] = urb;
 296
 297         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 298                           buf, skb->len, rtl8187_tx_cb, skb);
 299         urb->transfer_flags |= URB_ZERO_PACKET;
 300         usb_anchor_urb(urb, &priv->anchored);
 301         rc = usb_submit_urb(urb, GFP_ATOMIC);
 302         if (rc < 0) {
 303                 usb_unanchor_urb(urb);
 304                 kfree_skb(skb);
 305         }
 306         usb_free_urb(urb);
 307
 308         return NETDEV_TX_OK;
 309 }
 310
 311 static void rtl8187_rx_cb(struct urb *urb)
 312 {
 313         struct sk_buff *skb = (struct sk_buff *)urb->context;
 314         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 315         struct ieee80211_hw *dev = info->dev;
 316         struct rtl8187_priv *priv = dev->priv;
 317         struct ieee80211_rx_status rx_status = { 0 };
 318         int rate, signal;
 319         u32 flags;
 320         u32 quality;
 321         unsigned long f;
 322
 323         spin_lock_irqsave(&priv->rx_queue.lock, f);
 324         __skb_unlink(skb, &priv->rx_queue);
 325         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 326         skb_put(skb, urb->actual_length);
 327
 328         if (unlikely(urb->status)) {
 329                 dev_kfree_skb_irq(skb);
 330                 return;
 331         }
 332
 333         if (!priv->is_rtl8187b) {
 334                 struct rtl8187_rx_hdr *hdr =
 335                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 336                 flags = le32_to_cpu(hdr->flags);
 337                 /* As with the RTL8187B below, the AGC is used to calculate
 338                  * signal strength and quality. In this case, the scaling
 339                  * constants are derived from the output of p54usb.
 340                  */
 341                 quality = 130 - ((41 * hdr->agc) >> 6);
 342                 signal = -4 - ((27 * hdr->agc) >> 6);
 343                 rx_status.antenna = (hdr->signal >> 7) & 1;
 344                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 345         } else {
 346                 struct rtl8187b_rx_hdr *hdr =
 347                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 348                 /* The Realtek datasheet for the RTL8187B shows that the RX
 349                  * header contains the following quantities: signal quality,
 350                  * RSSI, AGC, the received power in dB, and the measured SNR.
 351                  * In testing, none of these quantities show qualitative
 352                  * agreement with AP signal strength, except for the AGC,
 353                  * which is inversely proportional to the strength of the
 354                  * signal. In the following, the quality and signal strength
 355                  * are derived from the AGC. The arbitrary scaling constants
 356                  * are chosen to make the results close to the values obtained
 357                  * for a BCM4312 using b43 as the driver. The noise is ignored
 358                  * for now.
 359                  */
 360                 flags = le32_to_cpu(hdr->flags);
 361                 quality = 170 - hdr->agc;
 362                 signal = 14 - hdr->agc / 2;
 363                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 364                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 365         }
 366
 367         if (quality > 100)
 368                 quality = 100;
 369         rx_status.qual = quality;
 370         priv->quality = quality;
 371         rx_status.signal = signal;
 372         priv->signal = signal;
 373         rate = (flags >> 20) & 0xF;
 374         skb_trim(skb, flags & 0x0FFF);
 375         rx_status.rate_idx = rate;
 376         rx_status.freq = dev->conf.channel->center_freq;
 377         rx_status.band = dev->conf.channel->band;
 378         rx_status.flag |= RX_FLAG_TSFT;
 379         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 380                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 381         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 382
 383         skb = dev_alloc_skb(RTL8187_MAX_RX);
 384         if (unlikely(!skb)) {
 385                 /* TODO check rx queue length and refill *somewhere* */
 386                 return;
 387         }
 388
 389         info = (struct rtl8187_rx_info *)skb->cb;
 390         info->urb = urb;
 391         info->dev = dev;
 392         urb->transfer_buffer = skb_tail_pointer(skb);
 393         urb->context = skb;
 394         skb_queue_tail(&priv->rx_queue, skb);
 395
 396         usb_anchor_urb(urb, &priv->anchored);
 397         if (usb_submit_urb(urb, GFP_ATOMIC)) {
 398                 usb_unanchor_urb(urb);
 399                 skb_unlink(skb, &priv->rx_queue);
 400                 dev_kfree_skb_irq(skb);
 401         }
 402 }
 403
 404 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 405 {
 406         struct rtl8187_priv *priv = dev->priv;
 407         struct urb *entry = NULL;
 408         struct sk_buff *skb;
 409         struct rtl8187_rx_info *info;
 410         int ret = 0;
 411
 412         while (skb_queue_len(&priv->rx_queue) < 16) {
 413                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 414                 if (!skb) {
 415                         ret = -ENOMEM;
 416                         goto err;
 417                 }
 418                 entry = usb_alloc_urb(0, GFP_KERNEL);
 419                 if (!entry) {
 420                         ret = -ENOMEM;
 421                         goto err;
 422                 }
 423                 usb_fill_bulk_urb(entry, priv->udev,
 424                                   usb_rcvbulkpipe(priv->udev,
 425                                   priv->is_rtl8187b ? 3 : 1),
 426                                   skb_tail_pointer(skb),
 427                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 428                 info = (struct rtl8187_rx_info *)skb->cb;
 429                 info->urb = entry;
 430                 info->dev = dev;
 431                 skb_queue_tail(&priv->rx_queue, skb);
 432                 usb_anchor_urb(entry, &priv->anchored);
 433                 ret = usb_submit_urb(entry, GFP_KERNEL);
 434                 if (ret) {
 435                         skb_unlink(skb, &priv->rx_queue);
 436                         usb_unanchor_urb(entry);
 437                         goto err;
 438                 }
 439                 usb_free_urb(entry);
 440         }
 441         return ret;
 442
 443 err:
 444         usb_free_urb(entry);
 445         kfree_skb(skb);
 446         usb_kill_anchored_urbs(&priv->anchored);
 447         return ret;
 448 }
 449
 450 static void rtl8187b_status_cb(struct urb *urb)
 451 {
 452         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 453         struct rtl8187_priv *priv = hw->priv;
 454         u64 val;
 455         unsigned int cmd_type;
 456
 457         if (unlikely(urb->status))
 458                 return;
 459
 460         /*
 461          * Read from status buffer:
 462          *
 463          * bits [30:31] = cmd type:
 464          * - 0 indicates tx beacon interrupt
 465          * - 1 indicates tx close descriptor
 466          *
 467          * In the case of tx beacon interrupt:
 468          * [0:9] = Last Beacon CW
 469          * [10:29] = reserved
 470          * [30:31] = 00b
 471          * [32:63] = Last Beacon TSF
 472          *
 473          * If it's tx close descriptor:
 474          * [0:7] = Packet Retry Count
 475          * [8:14] = RTS Retry Count
 476          * [15] = TOK
 477          * [16:27] = Sequence No
 478          * [28] = LS
 479          * [29] = FS
 480          * [30:31] = 01b
 481          * [32:47] = unused (reserved?)
 482          * [48:63] = MAC Used Time
 483          */
 484         val = le64_to_cpu(priv->b_tx_status.buf);
 485
 486         cmd_type = (val >> 30) & 0x3;
 487         if (cmd_type == 1) {
 488                 unsigned int pkt_rc, seq_no;
 489                 bool tok;
 490                 struct sk_buff *skb;
 491                 struct ieee80211_hdr *ieee80211hdr;
 492                 unsigned long flags;
 493
 494                 pkt_rc = val & 0xFF;
 495                 tok = val & (1 << 15);
 496                 seq_no = (val >> 16) & 0xFFF;
 497
 498                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 499                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 500                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 501
 502                         /*
 503                          * While testing, it was discovered that the seq_no
 504                          * doesn't actually contains the sequence number.
 505                          * Instead of returning just the 12 bits of sequence
 506                          * number, hardware is returning entire sequence control
 507                          * (fragment number plus sequence number) in a 12 bit
 508                          * only field overflowing after some time. As a
 509                          * workaround, just consider the lower bits, and expect
 510                          * it's unlikely we wrongly ack some sent data
 511                          */
 512                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 513                             & 0xFFF) == seq_no)
 514                                 break;
 515                 }
 516                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 517                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 518
 519                         __skb_unlink(skb, &priv->b_tx_status.queue);
 520                         if (tok)
 521                                 info->flags |= IEEE80211_TX_STAT_ACK;
 522                         info->status.rates[0].count = pkt_rc + 1;
 523
 524                         ieee80211_tx_status_irqsafe(hw, skb);
 525                 }
 526                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 527         }
 528
 529         usb_anchor_urb(urb, &priv->anchored);
 530         if (usb_submit_urb(urb, GFP_ATOMIC))
 531                 usb_unanchor_urb(urb);
 532 }
 533
 534 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 535 {
 536         struct rtl8187_priv *priv = dev->priv;
 537         struct urb *entry;
 538         int ret = 0;
 539
 540         entry = usb_alloc_urb(0, GFP_KERNEL);
 541         if (!entry)
 542                 return -ENOMEM;
 543
 544         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 545                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 546                           rtl8187b_status_cb, dev);
 547
 548         usb_anchor_urb(entry, &priv->anchored);
 549         ret = usb_submit_urb(entry, GFP_KERNEL);
 550         if (ret)
 551                 usb_unanchor_urb(entry);
 552         usb_free_urb(entry);
 553
 554         return ret;
 555 }
 556
 557 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 558 {
 559         struct rtl8187_priv *priv = dev->priv;
 560         u8 reg;
 561         int i;
 562
 563         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 564         reg &= (1 << 1);
 565         reg |= RTL818X_CMD_RESET;
 566         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 567
 568         i = 10;
 569         do {
 570                 msleep(2);
 571                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 572                       RTL818X_CMD_RESET))
 573                         break;
 574         } while (--i);
 575
 576         if (!i) {
 577                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 578                 return -ETIMEDOUT;
 579         }
 580
 581         /* reload registers from eeprom */
 582         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 583
 584         i = 10;
 585         do {
 586                 msleep(4);
 587                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 588                       RTL818X_EEPROM_CMD_CONFIG))
 589                         break;
 590         } while (--i);
 591
 592         if (!i) {
 593                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 594                        wiphy_name(dev->wiphy));
 595                 return -ETIMEDOUT;
 596         }
 597
 598         return 0;
 599 }
 600
 601 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 602 {
 603         struct rtl8187_priv *priv = dev->priv;
 604         u8 reg;
 605         int res;
 606
 607         /* reset */
 608         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 609                          RTL818X_EEPROM_CMD_CONFIG);
 610         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 611         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 612                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 613         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 614                           RTL8187_RTL8225_ANAPARAM_ON);
 615         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 616                           RTL8187_RTL8225_ANAPARAM2_ON);
 617         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 618                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 619         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 620                          RTL818X_EEPROM_CMD_NORMAL);
 621
 622         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 623
 624         msleep(200);
 625         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 626         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 627         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 628         msleep(200);
 629
 630         res = rtl8187_cmd_reset(dev);
 631         if (res)
 632                 return res;
 633
 634         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 635         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 636         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 637                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 638         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 639                           RTL8187_RTL8225_ANAPARAM_ON);
 640         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 641                           RTL8187_RTL8225_ANAPARAM2_ON);
 642         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 643                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 644         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 645
 646         /* setup card */
 647         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 648         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 649
 650         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 651         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 652         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 653
 654         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 655
 656         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 657         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 658         reg &= 0x3F;
 659         reg |= 0x80;
 660         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 661
 662         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 663
 664         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 665         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 666         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 667
 668         // TODO: set RESP_RATE and BRSR properly
 669         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 670         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 671
 672         /* host_usb_init */
 673         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 674         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 675         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 676         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 677         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 678         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 679         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 680         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 681         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 682         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 683         msleep(100);
 684
 685         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 686         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 687         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 688         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 689                          RTL818X_EEPROM_CMD_CONFIG);
 690         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 691         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 692                          RTL818X_EEPROM_CMD_NORMAL);
 693         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 694         msleep(100);
 695
 696         priv->rf->init(dev);
 697
 698         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 699         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 700         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 701         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 702         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 703         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 704         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 705
 706         return 0;
 707 }
 708
 709 static const u8 rtl8187b_reg_table[][3] = {
 710         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 711         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 712         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 713         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 714
 715         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 716         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 717         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 718         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 719         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 720         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 721
 722         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 723         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 724         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 725         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 726         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 727         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 728         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 729         {0x73, 0x9A, 2},
 730
 731         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 732         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 733         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 734         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 735         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 736
 737         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 738         {0x8F, 0x00, 0}
 739 };
 740
 741 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 742 {
 743         struct rtl8187_priv *priv = dev->priv;
 744         int res, i;
 745         u8 reg;
 746
 747         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 748                          RTL818X_EEPROM_CMD_CONFIG);
 749
 750         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 751         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 752         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 753         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 754                           RTL8187B_RTL8225_ANAPARAM2_ON);
 755         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 756                           RTL8187B_RTL8225_ANAPARAM_ON);
 757         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 758                          RTL8187B_RTL8225_ANAPARAM3_ON);
 759
 760         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 761         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 762         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 763         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 764
 765         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 766         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 767         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 768
 769         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 770                          RTL818X_EEPROM_CMD_NORMAL);
 771
 772         res = rtl8187_cmd_reset(dev);
 773         if (res)
 774                 return res;
 775
 776         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 777         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 778         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 779         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 780         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 781         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 782                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 783         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 784
 785         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 786
 787         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 788         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 789         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 790
 791         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 792                          RTL818X_EEPROM_CMD_CONFIG);
 793         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 794         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 795         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 796                          RTL818X_EEPROM_CMD_NORMAL);
 797
 798         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 799         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 800                 rtl818x_iowrite8_idx(priv,
 801                                      (u8 *)(uintptr_t)
 802                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 803                                      rtl8187b_reg_table[i][1],
 804                                      rtl8187b_reg_table[i][2]);
 805         }
 806
 807         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 808         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 809
 810         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 811         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 812         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 813
 814         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 815
 816         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 817
 818         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 819                          RTL818X_EEPROM_CMD_CONFIG);
 820         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 821         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 822         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 823         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 824                          RTL818X_EEPROM_CMD_NORMAL);
 825
 826         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 827         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 828         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 829         msleep(100);
 830
 831         priv->rf->init(dev);
 832
 833         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 834         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 835         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 836
 837         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 838         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 839         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 840         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 841         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 842         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 843         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 844
 845         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 846         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 847         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 848         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 849         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 850         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 851         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 852         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 853         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 854         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 855         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 856         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 857         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 858
 859         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 860
 861         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 862
 863         priv->slot_time = 0x9;
 864         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 865         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 866         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 867         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 868         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 869
 870         return 0;
 871 }
 872
 873 static void rtl8187_work(struct work_struct *work)
 874 {
 875         /* The RTL8187 returns the retry count through register 0xFFFA. In
 876          * addition, it appears to be a cumulative retry count, not the
 877          * value for the current TX packet. When multiple TX entries are
 878          * queued, the retry count will be valid for the last one in the queue.
 879          * The "error" should not matter for purposes of rate setting. */
 880         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 881                                     work.work);
 882         struct ieee80211_tx_info *info;
 883         struct ieee80211_hw *dev = priv->dev;
 884         static u16 retry;
 885         u16 tmp;
 886
 887         mutex_lock(&priv->conf_mutex);
 888         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 889         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 890                 struct sk_buff *old_skb;
 891
 892                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 893                 info = IEEE80211_SKB_CB(old_skb);
 894                 info->status.rates[0].count = tmp - retry + 1;
 895                 ieee80211_tx_status_irqsafe(dev, old_skb);
 896         }
 897         retry = tmp;
 898         mutex_unlock(&priv->conf_mutex);
 899 }
 900
 901 static int rtl8187_start(struct ieee80211_hw *dev)
 902 {
 903         struct rtl8187_priv *priv = dev->priv;
 904         u32 reg;
 905         int ret;
 906
 907         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 908                                      rtl8187b_init_hw(dev);
 909         if (ret)
 910                 return ret;
 911
 912         mutex_lock(&priv->conf_mutex);
 913
 914         init_usb_anchor(&priv->anchored);
 915         priv->dev = dev;
 916
 917         if (priv->is_rtl8187b) {
 918                 reg = RTL818X_RX_CONF_MGMT |
 919                       RTL818X_RX_CONF_DATA |
 920                       RTL818X_RX_CONF_BROADCAST |
 921                       RTL818X_RX_CONF_NICMAC |
 922                       RTL818X_RX_CONF_BSSID |
 923                       (7 << 13 /* RX FIFO threshold NONE */) |
 924                       (7 << 10 /* MAX RX DMA */) |
 925                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 926                       RTL818X_RX_CONF_ONLYERLPKT |
 927                       RTL818X_RX_CONF_MULTICAST;
 928                 priv->rx_conf = reg;
 929                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 930
 931                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 932                                   RTL818X_TX_CONF_HW_SEQNUM |
 933                                   RTL818X_TX_CONF_DISREQQSIZE |
 934                                   (7 << 8  /* short retry limit */) |
 935                                   (7 << 0  /* long retry limit */) |
 936                                   (7 << 21 /* MAX TX DMA */));
 937                 rtl8187_init_urbs(dev);
 938                 rtl8187b_init_status_urb(dev);
 939                 mutex_unlock(&priv->conf_mutex);
 940                 return 0;
 941         }
 942
 943         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 944
 945         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 946         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 947
 948         rtl8187_init_urbs(dev);
 949
 950         reg = RTL818X_RX_CONF_ONLYERLPKT |
 951               RTL818X_RX_CONF_RX_AUTORESETPHY |
 952               RTL818X_RX_CONF_BSSID |
 953               RTL818X_RX_CONF_MGMT |
 954               RTL818X_RX_CONF_DATA |
 955               (7 << 13 /* RX FIFO threshold NONE */) |
 956               (7 << 10 /* MAX RX DMA */) |
 957               RTL818X_RX_CONF_BROADCAST |
 958               RTL818X_RX_CONF_NICMAC;
 959
 960         priv->rx_conf = reg;
 961         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 962
 963         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 964         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 965         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 966         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 967
 968         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 969         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 970         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 971         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 972         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 973
 974         reg  = RTL818X_TX_CONF_CW_MIN |
 975                (7 << 21 /* MAX TX DMA */) |
 976                RTL818X_TX_CONF_NO_ICV;
 977         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 978
 979         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 980         reg |= RTL818X_CMD_TX_ENABLE;
 981         reg |= RTL818X_CMD_RX_ENABLE;
 982         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 983         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
 984         mutex_unlock(&priv->conf_mutex);
 985
 986         return 0;
 987 }
 988
 989 static void rtl8187_stop(struct ieee80211_hw *dev)
 990 {
 991         struct rtl8187_priv *priv = dev->priv;
 992         struct sk_buff *skb;
 993         u32 reg;
 994
 995         mutex_lock(&priv->conf_mutex);
 996         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 997
 998         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 999         reg &= ~RTL818X_CMD_TX_ENABLE;
1000         reg &= ~RTL818X_CMD_RX_ENABLE;
1001         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1002
1003         priv->rf->stop(dev);
1004
1005         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1006         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1007         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1008         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1009
1010         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1011                 dev_kfree_skb_any(skb);
1012
1013         usb_kill_anchored_urbs(&priv->anchored);
1014         if (!priv->is_rtl8187b)
1015                 cancel_delayed_work_sync(&priv->work);
1016         mutex_unlock(&priv->conf_mutex);
1017 }
1018
1019 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1020                                  struct ieee80211_if_init_conf *conf)
1021 {
1022         struct rtl8187_priv *priv = dev->priv;
1023         int i;
1024         int ret = -EOPNOTSUPP;
1025
1026         mutex_lock(&priv->conf_mutex);
1027         if (priv->mode != NL80211_IFTYPE_MONITOR)
1028                 goto exit;
1029
1030         switch (conf->type) {
1031         case NL80211_IFTYPE_STATION:
1032                 priv->mode = conf->type;
1033                 break;
1034         default:
1035                 goto exit;
1036         }
1037
1038         ret = 0;
1039         priv->vif = conf->vif;
1040
1041         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1042         for (i = 0; i < ETH_ALEN; i++)
1043                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1044                                  ((u8 *)conf->mac_addr)[i]);
1045         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1046
1047 exit:
1048         mutex_unlock(&priv->conf_mutex);
1049         return ret;
1050 }
1051
1052 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1053                                      struct ieee80211_if_init_conf *conf)
1054 {
1055         struct rtl8187_priv *priv = dev->priv;
1056         mutex_lock(&priv->conf_mutex);
1057         priv->mode = NL80211_IFTYPE_MONITOR;
1058         priv->vif = NULL;
1059         mutex_unlock(&priv->conf_mutex);
1060 }
1061
1062 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1063 {
1064         struct rtl8187_priv *priv = dev->priv;
1065         struct ieee80211_conf *conf = &dev->conf;
1066         u32 reg;
1067
1068         mutex_lock(&priv->conf_mutex);
1069         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1070         /* Enable TX loopback on MAC level to avoid TX during channel
1071          * changes, as this has be seen to causes problems and the
1072          * card will stop work until next reset
1073          */
1074         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1075                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1076         priv->rf->set_chan(dev, conf);
1077         msleep(10);
1078         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1079
1080         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1081         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1082         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1083         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1084         mutex_unlock(&priv->conf_mutex);
1085         return 0;
1086 }
1087
1088 /*
1089  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1090  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1091  */
1092 static __le32 *rtl8187b_ac_addr[4] = {
1093         (__le32 *) 0xFFF0, /* AC_VO */
1094         (__le32 *) 0xFFF4, /* AC_VI */
1095         (__le32 *) 0xFFFC, /* AC_BK */
1096         (__le32 *) 0xFFF8, /* AC_BE */
1097 };
1098
1099 #define SIFS_TIME 0xa
1100
1101 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1102                              bool use_short_preamble)
1103 {
1104         if (priv->is_rtl8187b) {
1105                 u8 difs, eifs;
1106                 u16 ack_timeout;
1107                 int queue;
1108
1109                 if (use_short_slot) {
1110                         priv->slot_time = 0x9;
1111                         difs = 0x1c;
1112                         eifs = 0x53;
1113                 } else {
1114                         priv->slot_time = 0x14;
1115                         difs = 0x32;
1116                         eifs = 0x5b;
1117                 }
1118                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1119                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1120                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1121
1122                 /*
1123                  * BRSR+1 on 8187B is in fact EIFS register
1124                  * Value in units of 4 us
1125                  */
1126                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1127
1128                 /*
1129                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1130                  * register. In units of 4 us like eifs register
1131                  * ack_timeout = ack duration + plcp + difs + preamble
1132                  */
1133                 ack_timeout = 112 + 48 + difs;
1134                 if (use_short_preamble)
1135                         ack_timeout += 72;
1136                 else
1137                         ack_timeout += 144;
1138                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1139                                  DIV_ROUND_UP(ack_timeout, 4));
1140
1141                 for (queue = 0; queue < 4; queue++)
1142                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1143                                          priv->aifsn[queue] * priv->slot_time +
1144                                          SIFS_TIME);
1145         } else {
1146                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1147                 if (use_short_slot) {
1148                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1149                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1150                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1151                 } else {
1152                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1153                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1154                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1155                 }
1156         }
1157 }
1158
1159 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1160                                      struct ieee80211_vif *vif,
1161                                      struct ieee80211_bss_conf *info,
1162                                      u32 changed)
1163 {
1164         struct rtl8187_priv *priv = dev->priv;
1165         int i;
1166         u8 reg;
1167
1168         if (changed & BSS_CHANGED_BSSID) {
1169                 mutex_lock(&priv->conf_mutex);
1170                 for (i = 0; i < ETH_ALEN; i++)
1171                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1172                                          info->bssid[i]);
1173
1174                 if (is_valid_ether_addr(info->bssid)) {
1175                         reg = RTL818X_MSR_INFRA;
1176                         if (priv->is_rtl8187b)
1177                                 reg |= RTL818X_MSR_ENEDCA;
1178                         rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1179                 } else {
1180                         reg = RTL818X_MSR_NO_LINK;
1181                         rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1182                 }
1183
1184                 mutex_unlock(&priv->conf_mutex);
1185         }
1186
1187         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1188                 rtl8187_conf_erp(priv, info->use_short_slot,
1189                                  info->use_short_preamble);
1190 }
1191
1192 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1193                                      unsigned int changed_flags,
1194                                      unsigned int *total_flags,
1195                                      int mc_count, struct dev_addr_list *mclist)
1196 {
1197         struct rtl8187_priv *priv = dev->priv;
1198
1199         if (changed_flags & FIF_FCSFAIL)
1200                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1201         if (changed_flags & FIF_CONTROL)
1202                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1203         if (changed_flags & FIF_OTHER_BSS)
1204                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1205         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
1206                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1207         else
1208                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1209
1210         *total_flags = 0;
1211
1212         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1213                 *total_flags |= FIF_FCSFAIL;
1214         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1215                 *total_flags |= FIF_CONTROL;
1216         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1217                 *total_flags |= FIF_OTHER_BSS;
1218         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1219                 *total_flags |= FIF_ALLMULTI;
1220
1221         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1222 }
1223
1224 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1225                            const struct ieee80211_tx_queue_params *params)
1226 {
1227         struct rtl8187_priv *priv = dev->priv;
1228         u8 cw_min, cw_max;
1229
1230         if (queue > 3)
1231                 return -EINVAL;
1232
1233         cw_min = fls(params->cw_min);
1234         cw_max = fls(params->cw_max);
1235
1236         if (priv->is_rtl8187b) {
1237                 priv->aifsn[queue] = params->aifs;
1238
1239                 /*
1240                  * This is the structure of AC_*_PARAM registers in 8187B:
1241                  * - TXOP limit field, bit offset = 16
1242                  * - ECWmax, bit offset = 12
1243                  * - ECWmin, bit offset = 8
1244                  * - AIFS, bit offset = 0
1245                  */
1246                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1247                                   (params->txop << 16) | (cw_max << 12) |
1248                                   (cw_min << 8) | (params->aifs *
1249                                   priv->slot_time + SIFS_TIME));
1250         } else {
1251                 if (queue != 0)
1252                         return -EINVAL;
1253
1254                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1255                                  cw_min | (cw_max << 4));
1256         }
1257         return 0;
1258 }
1259
1260 static const struct ieee80211_ops rtl8187_ops = {
1261         .tx                     = rtl8187_tx,
1262         .start                  = rtl8187_start,
1263         .stop                   = rtl8187_stop,
1264         .add_interface          = rtl8187_add_interface,
1265         .remove_interface       = rtl8187_remove_interface,
1266         .config                 = rtl8187_config,
1267         .bss_info_changed       = rtl8187_bss_info_changed,
1268         .configure_filter       = rtl8187_configure_filter,
1269         .conf_tx                = rtl8187_conf_tx
1270 };
1271
1272 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1273 {
1274         struct ieee80211_hw *dev = eeprom->data;
1275         struct rtl8187_priv *priv = dev->priv;
1276         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1277
1278         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1279         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1280         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1281         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1282 }
1283
1284 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1285 {
1286         struct ieee80211_hw *dev = eeprom->data;
1287         struct rtl8187_priv *priv = dev->priv;
1288         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1289
1290         if (eeprom->reg_data_in)
1291                 reg |= RTL818X_EEPROM_CMD_WRITE;
1292         if (eeprom->reg_data_out)
1293                 reg |= RTL818X_EEPROM_CMD_READ;
1294         if (eeprom->reg_data_clock)
1295                 reg |= RTL818X_EEPROM_CMD_CK;
1296         if (eeprom->reg_chip_select)
1297                 reg |= RTL818X_EEPROM_CMD_CS;
1298
1299         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1300         udelay(10);
1301 }
1302
1303 static int __devinit rtl8187_probe(struct usb_interface *intf,
1304                                    const struct usb_device_id *id)
1305 {
1306         struct usb_device *udev = interface_to_usbdev(intf);
1307         struct ieee80211_hw *dev;
1308         struct rtl8187_priv *priv;
1309         struct eeprom_93cx6 eeprom;
1310         struct ieee80211_channel *channel;
1311         const char *chip_name;
1312         u16 txpwr, reg;
1313         int err, i;
1314
1315         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1316         if (!dev) {
1317                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1318                 return -ENOMEM;
1319         }
1320
1321         priv = dev->priv;
1322         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1323
1324         /* allocate "DMA aware" buffer for register accesses */
1325         priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1326         if (!priv->io_dmabuf) {
1327                 err = -ENOMEM;
1328                 goto err_free_dev;
1329         }
1330         mutex_init(&priv->io_mutex);
1331
1332         SET_IEEE80211_DEV(dev, &intf->dev);
1333         usb_set_intfdata(intf, dev);
1334         priv->udev = udev;
1335
1336         usb_get_dev(udev);
1337
1338         skb_queue_head_init(&priv->rx_queue);
1339
1340         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1341         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1342
1343         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1344         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1345         priv->map = (struct rtl818x_csr *)0xFF00;
1346
1347         priv->band.band = IEEE80211_BAND_2GHZ;
1348         priv->band.channels = priv->channels;
1349         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1350         priv->band.bitrates = priv->rates;
1351         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1352         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1353
1354
1355         priv->mode = NL80211_IFTYPE_MONITOR;
1356         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1357                      IEEE80211_HW_SIGNAL_DBM |
1358                      IEEE80211_HW_RX_INCLUDES_FCS;
1359
1360         eeprom.data = dev;
1361         eeprom.register_read = rtl8187_eeprom_register_read;
1362         eeprom.register_write = rtl8187_eeprom_register_write;
1363         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1364                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1365         else
1366                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1367
1368         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1369         udelay(10);
1370
1371         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1372                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1373         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1374                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1375                        "generated MAC address\n");
1376                 random_ether_addr(dev->wiphy->perm_addr);
1377         }
1378
1379         channel = priv->channels;
1380         for (i = 0; i < 3; i++) {
1381                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1382                                   &txpwr);
1383                 (*channel++).hw_value = txpwr & 0xFF;
1384                 (*channel++).hw_value = txpwr >> 8;
1385         }
1386         for (i = 0; i < 2; i++) {
1387                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1388                                   &txpwr);
1389                 (*channel++).hw_value = txpwr & 0xFF;
1390                 (*channel++).hw_value = txpwr >> 8;
1391         }
1392
1393         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1394                           &priv->txpwr_base);
1395
1396         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1397         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1398         /* 0 means asic B-cut, we should use SW 3 wire
1399          * bit-by-bit banging for radio. 1 means we can use
1400          * USB specific request to write radio registers */
1401         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1402         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1403         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1404
1405         if (!priv->is_rtl8187b) {
1406                 u32 reg32;
1407                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1408                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1409                 switch (reg32) {
1410                 case RTL818X_TX_CONF_R8187vD_B:
1411                         /* Some RTL8187B devices have a USB ID of 0x8187
1412                          * detect them here */
1413                         chip_name = "RTL8187BvB(early)";
1414                         priv->is_rtl8187b = 1;
1415                         priv->hw_rev = RTL8187BvB;
1416                         break;
1417                 case RTL818X_TX_CONF_R8187vD:
1418                         chip_name = "RTL8187vD";
1419                         break;
1420                 default:
1421                         chip_name = "RTL8187vB (default)";
1422                 }
1423        } else {
1424                 /*
1425                  * Force USB request to write radio registers for 8187B, Realtek
1426                  * only uses it in their sources
1427                  */
1428                 /*if (priv->asic_rev == 0) {
1429                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1430                                "requests to write to radio registers\n");
1431                         priv->asic_rev = 1;
1432                 }*/
1433                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1434                 case RTL818X_R8187B_B:
1435                         chip_name = "RTL8187BvB";
1436                         priv->hw_rev = RTL8187BvB;
1437                         break;
1438                 case RTL818X_R8187B_D:
1439                         chip_name = "RTL8187BvD";
1440                         priv->hw_rev = RTL8187BvD;
1441                         break;
1442                 case RTL818X_R8187B_E:
1443                         chip_name = "RTL8187BvE";
1444                         priv->hw_rev = RTL8187BvE;
1445                         break;
1446                 default:
1447                         chip_name = "RTL8187BvB (default)";
1448                         priv->hw_rev = RTL8187BvB;
1449                 }
1450         }
1451
1452         if (!priv->is_rtl8187b) {
1453                 for (i = 0; i < 2; i++) {
1454                         eeprom_93cx6_read(&eeprom,
1455                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1456                                           &txpwr);
1457                         (*channel++).hw_value = txpwr & 0xFF;
1458                         (*channel++).hw_value = txpwr >> 8;
1459                 }
1460         } else {
1461                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1462                                   &txpwr);
1463                 (*channel++).hw_value = txpwr & 0xFF;
1464
1465                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1466                 (*channel++).hw_value = txpwr & 0xFF;
1467
1468                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1469                 (*channel++).hw_value = txpwr & 0xFF;
1470                 (*channel++).hw_value = txpwr >> 8;
1471         }
1472
1473         /*
1474          * XXX: Once this driver supports anything that requires
1475          *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1476          */
1477         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1478
1479         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1480                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1481                        " info!\n");
1482
1483         priv->rf = rtl8187_detect_rf(dev);
1484         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1485                                   sizeof(struct rtl8187_tx_hdr) :
1486                                   sizeof(struct rtl8187b_tx_hdr);
1487         if (!priv->is_rtl8187b)
1488                 dev->queues = 1;
1489         else
1490                 dev->queues = 4;
1491
1492         err = ieee80211_register_hw(dev);
1493         if (err) {
1494                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1495                 goto err_free_dmabuf;
1496         }
1497         mutex_init(&priv->conf_mutex);
1498         skb_queue_head_init(&priv->b_tx_status.queue);
1499
1500         printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1501                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1502                chip_name, priv->asic_rev, priv->rf->name);
1503
1504 #ifdef CONFIG_RTL8187_LEDS
1505         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1506         reg &= 0xFF;
1507         rtl8187_leds_init(dev, reg);
1508 #endif
1509
1510         return 0;
1511
1512  err_free_dmabuf:
1513         kfree(priv->io_dmabuf);
1514  err_free_dev:
1515         ieee80211_free_hw(dev);
1516         usb_set_intfdata(intf, NULL);
1517         usb_put_dev(udev);
1518         return err;
1519 }
1520
1521 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1522 {
1523         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1524         struct rtl8187_priv *priv;
1525
1526         if (!dev)
1527                 return;
1528
1529 #ifdef CONFIG_RTL8187_LEDS
1530         rtl8187_leds_exit(dev);
1531 #endif
1532         ieee80211_unregister_hw(dev);
1533
1534         priv = dev->priv;
1535         usb_reset_device(priv->udev);
1536         usb_put_dev(interface_to_usbdev(intf));
1537         kfree(priv->io_dmabuf);
1538         ieee80211_free_hw(dev);
1539 }
1540
1541 static struct usb_driver rtl8187_driver = {
1542         .name           = KBUILD_MODNAME,
1543         .id_table       = rtl8187_table,
1544         .probe          = rtl8187_probe,
1545         .disconnect     = __devexit_p(rtl8187_disconnect),
1546 };
1547
1548 static int __init rtl8187_init(void)
1549 {
1550         return usb_register(&rtl8187_driver);
1551 }
1552
1553 static void __exit rtl8187_exit(void)
1554 {
1555         usb_deregister(&rtl8187_driver);
1556 }
1557
1558 module_init(rtl8187_init);
1559 module_exit(rtl8187_exit);