2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
55 #include <asm/uaccess.h>
57 #include <acpi/acpi_bus.h>
58 #include <acpi/processor.h>
60 #define ACPI_PROCESSOR_COMPONENT 0x01000000
61 #define ACPI_PROCESSOR_CLASS "processor"
62 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
63 ACPI_MODULE_NAME("processor_idle");
64 #define ACPI_PROCESSOR_FILE_POWER "power"
65 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
66 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
67 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
68 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
69 static void (*pm_idle_save) (void) __read_mostly;
70 module_param(max_cstate, uint, 0644);
72 static unsigned int nocst __read_mostly;
73 module_param(nocst, uint, 0000);
76 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
77 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
78 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
79 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
80 * reduce history for more aggressive entry into C3
82 static unsigned int bm_history __read_mostly =
83 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
84 module_param(bm_history, uint, 0644);
85 /* --------------------------------------------------------------------------
87 -------------------------------------------------------------------------- */
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
93 * To skip this limit, boot/load with a large max_cstate limit.
95 static int set_max_cstate(struct dmi_system_id *id)
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
104 max_cstate = (long)id->driver_data;
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "IBM ThinkPad R40e", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
114 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
115 { set_max_cstate, "IBM ThinkPad R40e", {
116 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
117 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
118 { set_max_cstate, "IBM ThinkPad R40e", {
119 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
120 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
121 { set_max_cstate, "IBM ThinkPad R40e", {
122 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
123 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
124 { set_max_cstate, "IBM ThinkPad R40e", {
125 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
126 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
127 { set_max_cstate, "IBM ThinkPad R40e", {
128 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
129 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
130 { set_max_cstate, "IBM ThinkPad R40e", {
131 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
132 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
133 { set_max_cstate, "IBM ThinkPad R40e", {
134 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
135 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
136 { set_max_cstate, "IBM ThinkPad R40e", {
137 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
138 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
139 { set_max_cstate, "IBM ThinkPad R40e", {
140 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
141 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
142 { set_max_cstate, "IBM ThinkPad R40e", {
143 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
144 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
145 { set_max_cstate, "IBM ThinkPad R40e", {
146 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
147 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
148 { set_max_cstate, "IBM ThinkPad R40e", {
149 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
150 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
151 { set_max_cstate, "IBM ThinkPad R40e", {
152 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
153 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
154 { set_max_cstate, "IBM ThinkPad R40e", {
155 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
156 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
157 { set_max_cstate, "IBM ThinkPad R40e", {
158 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
159 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
160 { set_max_cstate, "Medion 41700", {
161 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
162 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
163 { set_max_cstate, "Clevo 5600D", {
164 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
165 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
170 static inline u32 ticks_elapsed(u32 t1, u32 t2)
174 else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
175 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
177 return ((0xFFFFFFFF - t1) + t2);
181 acpi_processor_power_activate(struct acpi_processor *pr,
182 struct acpi_processor_cx *new)
184 struct acpi_processor_cx *old;
189 old = pr->power.state;
192 old->promotion.count = 0;
193 new->demotion.count = 0;
195 /* Cleanup from old state. */
199 /* Disable bus master reload */
200 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
206 /* Prepare to use new state. */
209 /* Enable bus master reload */
210 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
211 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
215 pr->power.state = new;
220 static void acpi_safe_halt(void)
222 current_thread_info()->status &= ~TS_POLLING;
224 * TS_POLLING-cleared state must be visible before we
230 current_thread_info()->status |= TS_POLLING;
233 static atomic_t c3_cpu_count;
235 /* Common C-state entry for C2, C3, .. */
236 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
238 if (cstate->space_id == ACPI_CSTATE_FFH) {
239 /* Call into architectural FFH based C-state */
240 acpi_processor_ffh_cstate_enter(cstate);
243 /* IO port based C-state */
244 inb(cstate->address);
245 /* Dummy wait op - must do something useless after P_LVL2 read
246 because chipsets cannot guarantee that STPCLK# signal
247 gets asserted in time to freeze execution properly. */
248 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
252 #ifdef ARCH_APICTIMER_STOPS_ON_C3
255 * Some BIOS implementations switch to C3 in the published C2 state.
256 * This seems to be a common problem on AMD boxen, but other vendors
257 * are affected too. We pick the most conservative approach: we assume
258 * that the local APIC stops in both C2 and C3.
260 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
261 struct acpi_processor_cx *cx)
263 struct acpi_processor_power *pwr = &pr->power;
264 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
267 * Check, if one of the previous states already marked the lapic
270 if (pwr->timer_broadcast_on_state < state)
273 if (cx->type >= type)
274 pr->power.timer_broadcast_on_state = state;
277 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
279 #ifdef CONFIG_GENERIC_CLOCKEVENTS
280 unsigned long reason;
282 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
283 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
285 clockevents_notify(reason, &pr->id);
287 cpumask_t mask = cpumask_of_cpu(pr->id);
289 if (pr->power.timer_broadcast_on_state < INT_MAX)
290 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
292 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
296 /* Power(C) State timer broadcast control */
297 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
298 struct acpi_processor_cx *cx,
301 #ifdef CONFIG_GENERIC_CLOCKEVENTS
303 int state = cx - pr->power.states;
305 if (state >= pr->power.timer_broadcast_on_state) {
306 unsigned long reason;
308 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
309 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
310 clockevents_notify(reason, &pr->id);
317 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
318 struct acpi_processor_cx *cstate) { }
319 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
320 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
321 struct acpi_processor_cx *cx,
329 * Suspend / resume control
331 static int acpi_idle_suspend;
333 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
335 acpi_idle_suspend = 1;
339 int acpi_processor_resume(struct acpi_device * device)
341 acpi_idle_suspend = 0;
345 static void acpi_processor_idle(void)
347 struct acpi_processor *pr = NULL;
348 struct acpi_processor_cx *cx = NULL;
349 struct acpi_processor_cx *next_state = NULL;
354 * Interrupts must be disabled during bus mastering calculations and
355 * for C2/C3 transitions.
359 pr = processors[smp_processor_id()];
366 * Check whether we truly need to go idle, or should
369 if (unlikely(need_resched())) {
374 cx = pr->power.state;
375 if (!cx || acpi_idle_suspend) {
386 * Check for bus mastering activity (if required), record, and check
389 if (pr->flags.bm_check) {
391 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
396 pr->power.bm_activity <<= diff;
398 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
400 pr->power.bm_activity |= 0x1;
401 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
404 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
405 * the true state of bus mastering activity; forcing us to
406 * manually check the BMIDEA bit of each IDE channel.
408 else if (errata.piix4.bmisx) {
409 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
410 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
411 pr->power.bm_activity |= 0x1;
414 pr->power.bm_check_timestamp = jiffies;
417 * If bus mastering is or was active this jiffy, demote
418 * to avoid a faulty transition. Note that the processor
419 * won't enter a low-power state during this call (to this
420 * function) but should upon the next.
422 * TBD: A better policy might be to fallback to the demotion
423 * state (use it for this quantum only) istead of
424 * demoting -- and rely on duration as our sole demotion
425 * qualification. This may, however, introduce DMA
426 * issues (e.g. floppy DMA transfer overrun/underrun).
428 if ((pr->power.bm_activity & 0x1) &&
429 cx->demotion.threshold.bm) {
431 next_state = cx->demotion.state;
436 #ifdef CONFIG_HOTPLUG_CPU
438 * Check for P_LVL2_UP flag before entering C2 and above on
439 * an SMP system. We do it here instead of doing it at _CST/P_LVL
440 * detection phase, to work cleanly with logical CPU hotplug.
442 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
443 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
444 cx = &pr->power.states[ACPI_STATE_C1];
450 * Invoke the current Cx state to put the processor to sleep.
452 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
453 current_thread_info()->status &= ~TS_POLLING;
455 * TS_POLLING-cleared state must be visible before we
459 if (need_resched()) {
460 current_thread_info()->status |= TS_POLLING;
471 * Use the appropriate idle routine, the one that would
472 * be used without acpi C-states.
480 * TBD: Can't get time duration while in C1, as resumes
481 * go to an ISR rather than here. Need to instrument
482 * base interrupt handler.
484 * Note: the TSC better not stop in C1, sched_clock() will
487 sleep_ticks = 0xFFFFFFFF;
491 /* Get start time (ticks) */
492 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
493 /* Tell the scheduler that we are going deep-idle: */
494 sched_clock_idle_sleep_event();
496 acpi_state_timer_broadcast(pr, cx, 1);
497 acpi_cstate_enter(cx);
498 /* Get end time (ticks) */
499 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
501 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
502 /* TSC halts in C2, so notify users */
503 mark_tsc_unstable("possible TSC halt in C2");
505 /* Compute time (ticks) that we were actually asleep */
506 sleep_ticks = ticks_elapsed(t1, t2);
508 /* Tell the scheduler how much we idled: */
509 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
511 /* Re-enable interrupts */
513 /* Do not account our idle-switching overhead: */
514 sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
516 current_thread_info()->status |= TS_POLLING;
517 acpi_state_timer_broadcast(pr, cx, 0);
523 * bm_check implies we need ARB_DIS
524 * !bm_check implies we need cache flush
525 * bm_control implies whether we can do ARB_DIS
527 * That leaves a case where bm_check is set and bm_control is
528 * not set. In that case we cannot do much, we enter C3
529 * without doing anything.
531 if (pr->flags.bm_check && pr->flags.bm_control) {
532 if (atomic_inc_return(&c3_cpu_count) ==
535 * All CPUs are trying to go to C3
536 * Disable bus master arbitration
538 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
540 } else if (!pr->flags.bm_check) {
541 /* SMP with no shared cache... Invalidate cache */
542 ACPI_FLUSH_CPU_CACHE();
545 /* Get start time (ticks) */
546 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
548 acpi_state_timer_broadcast(pr, cx, 1);
549 /* Tell the scheduler that we are going deep-idle: */
550 sched_clock_idle_sleep_event();
551 acpi_cstate_enter(cx);
552 /* Get end time (ticks) */
553 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
554 if (pr->flags.bm_check && pr->flags.bm_control) {
555 /* Enable bus master arbitration */
556 atomic_dec(&c3_cpu_count);
557 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
560 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
561 /* TSC halts in C3, so notify users */
562 mark_tsc_unstable("TSC halts in C3");
564 /* Compute time (ticks) that we were actually asleep */
565 sleep_ticks = ticks_elapsed(t1, t2);
566 /* Tell the scheduler how much we idled: */
567 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
569 /* Re-enable interrupts */
571 /* Do not account our idle-switching overhead: */
572 sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
574 current_thread_info()->status |= TS_POLLING;
575 acpi_state_timer_broadcast(pr, cx, 0);
583 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
584 cx->time += sleep_ticks;
586 next_state = pr->power.state;
588 #ifdef CONFIG_HOTPLUG_CPU
589 /* Don't do promotion/demotion */
590 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
591 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
600 * Track the number of longs (time asleep is greater than threshold)
601 * and promote when the count threshold is reached. Note that bus
602 * mastering activity may prevent promotions.
603 * Do not promote above max_cstate.
605 if (cx->promotion.state &&
606 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
607 if (sleep_ticks > cx->promotion.threshold.ticks &&
608 cx->promotion.state->latency <= system_latency_constraint()) {
609 cx->promotion.count++;
610 cx->demotion.count = 0;
611 if (cx->promotion.count >=
612 cx->promotion.threshold.count) {
613 if (pr->flags.bm_check) {
615 (pr->power.bm_activity & cx->
616 promotion.threshold.bm)) {
622 next_state = cx->promotion.state;
632 * Track the number of shorts (time asleep is less than time threshold)
633 * and demote when the usage threshold is reached.
635 if (cx->demotion.state) {
636 if (sleep_ticks < cx->demotion.threshold.ticks) {
637 cx->demotion.count++;
638 cx->promotion.count = 0;
639 if (cx->demotion.count >= cx->demotion.threshold.count) {
640 next_state = cx->demotion.state;
648 * Demote if current state exceeds max_cstate
649 * or if the latency of the current state is unacceptable
651 if ((pr->power.state - pr->power.states) > max_cstate ||
652 pr->power.state->latency > system_latency_constraint()) {
653 if (cx->demotion.state)
654 next_state = cx->demotion.state;
660 * If we're going to start using a new Cx state we must clean up
661 * from the previous and prepare to use the new.
663 if (next_state != pr->power.state)
664 acpi_processor_power_activate(pr, next_state);
667 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
670 unsigned int state_is_set = 0;
671 struct acpi_processor_cx *lower = NULL;
672 struct acpi_processor_cx *higher = NULL;
673 struct acpi_processor_cx *cx;
680 * This function sets the default Cx state policy (OS idle handler).
681 * Our scheme is to promote quickly to C2 but more conservatively
682 * to C3. We're favoring C2 for its characteristics of low latency
683 * (quick response), good power savings, and ability to allow bus
684 * mastering activity. Note that the Cx state policy is completely
685 * customizable and can be altered dynamically.
689 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
690 cx = &pr->power.states[i];
695 pr->power.state = cx;
704 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
705 cx = &pr->power.states[i];
710 cx->demotion.state = lower;
711 cx->demotion.threshold.ticks = cx->latency_ticks;
712 cx->demotion.threshold.count = 1;
713 if (cx->type == ACPI_STATE_C3)
714 cx->demotion.threshold.bm = bm_history;
721 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
722 cx = &pr->power.states[i];
727 cx->promotion.state = higher;
728 cx->promotion.threshold.ticks = cx->latency_ticks;
729 if (cx->type >= ACPI_STATE_C2)
730 cx->promotion.threshold.count = 4;
732 cx->promotion.threshold.count = 10;
733 if (higher->type == ACPI_STATE_C3)
734 cx->promotion.threshold.bm = bm_history;
743 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
752 /* if info is obtained from pblk/fadt, type equals state */
753 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
754 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
756 #ifndef CONFIG_HOTPLUG_CPU
758 * Check for P_LVL2_UP flag before entering C2 and above on
761 if ((num_online_cpus() > 1) &&
762 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
766 /* determine C2 and C3 address from pblk */
767 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
768 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
770 /* determine latencies from FADT */
771 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
772 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
774 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
775 "lvl2[0x%08x] lvl3[0x%08x]\n",
776 pr->power.states[ACPI_STATE_C2].address,
777 pr->power.states[ACPI_STATE_C3].address));
782 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
784 if (!pr->power.states[ACPI_STATE_C1].valid) {
785 /* set the first C-State to C1 */
786 /* all processors need to support C1 */
787 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
788 pr->power.states[ACPI_STATE_C1].valid = 1;
790 /* the C0 state only exists as a filler in our array */
791 pr->power.states[ACPI_STATE_C0].valid = 1;
795 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
797 acpi_status status = 0;
801 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
802 union acpi_object *cst;
810 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
811 if (ACPI_FAILURE(status)) {
812 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
816 cst = buffer.pointer;
818 /* There must be at least 2 elements */
819 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
820 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
825 count = cst->package.elements[0].integer.value;
827 /* Validate number of power states. */
828 if (count < 1 || count != cst->package.count - 1) {
829 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
834 /* Tell driver that at least _CST is supported. */
835 pr->flags.has_cst = 1;
837 for (i = 1; i <= count; i++) {
838 union acpi_object *element;
839 union acpi_object *obj;
840 struct acpi_power_register *reg;
841 struct acpi_processor_cx cx;
843 memset(&cx, 0, sizeof(cx));
845 element = &(cst->package.elements[i]);
846 if (element->type != ACPI_TYPE_PACKAGE)
849 if (element->package.count != 4)
852 obj = &(element->package.elements[0]);
854 if (obj->type != ACPI_TYPE_BUFFER)
857 reg = (struct acpi_power_register *)obj->buffer.pointer;
859 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
860 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
863 /* There should be an easy way to extract an integer... */
864 obj = &(element->package.elements[1]);
865 if (obj->type != ACPI_TYPE_INTEGER)
868 cx.type = obj->integer.value;
870 * Some buggy BIOSes won't list C1 in _CST -
871 * Let acpi_processor_get_power_info_default() handle them later
873 if (i == 1 && cx.type != ACPI_STATE_C1)
876 cx.address = reg->address;
877 cx.index = current_count + 1;
879 cx.space_id = ACPI_CSTATE_SYSTEMIO;
880 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
881 if (acpi_processor_ffh_cstate_probe
882 (pr->id, &cx, reg) == 0) {
883 cx.space_id = ACPI_CSTATE_FFH;
884 } else if (cx.type != ACPI_STATE_C1) {
886 * C1 is a special case where FIXED_HARDWARE
887 * can be handled in non-MWAIT way as well.
888 * In that case, save this _CST entry info.
889 * That is, we retain space_id of SYSTEM_IO for
891 * Otherwise, ignore this info and continue.
897 obj = &(element->package.elements[2]);
898 if (obj->type != ACPI_TYPE_INTEGER)
901 cx.latency = obj->integer.value;
903 obj = &(element->package.elements[3]);
904 if (obj->type != ACPI_TYPE_INTEGER)
907 cx.power = obj->integer.value;
910 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
913 * We support total ACPI_PROCESSOR_MAX_POWER - 1
914 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
916 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
918 "Limiting number of power states to max (%d)\n",
919 ACPI_PROCESSOR_MAX_POWER);
921 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
926 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
929 /* Validate number of power states discovered */
930 if (current_count < 2)
934 kfree(buffer.pointer);
939 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
946 * C2 latency must be less than or equal to 100
949 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
950 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
951 "latency too large [%d]\n", cx->latency));
956 * Otherwise we've met all of our C2 requirements.
957 * Normalize the C2 latency to expidite policy
960 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
965 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
966 struct acpi_processor_cx *cx)
968 static int bm_check_flag;
975 * C3 latency must be less than or equal to 1000
978 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
979 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
980 "latency too large [%d]\n", cx->latency));
985 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
986 * DMA transfers are used by any ISA device to avoid livelock.
987 * Note that we could disable Type-F DMA (as recommended by
988 * the erratum), but this is known to disrupt certain ISA
989 * devices thus we take the conservative approach.
991 else if (errata.piix4.fdma) {
992 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
993 "C3 not supported on PIIX4 with Type-F DMA\n"));
997 /* All the logic here assumes flags.bm_check is same across all CPUs */
998 if (!bm_check_flag) {
999 /* Determine whether bm_check is needed based on CPU */
1000 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
1001 bm_check_flag = pr->flags.bm_check;
1003 pr->flags.bm_check = bm_check_flag;
1006 if (pr->flags.bm_check) {
1007 if (!pr->flags.bm_control) {
1008 if (pr->flags.has_cst != 1) {
1009 /* bus mastering control is necessary */
1010 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1011 "C3 support requires BM control\n"));
1014 /* Here we enter C3 without bus mastering */
1015 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1016 "C3 support without BM control\n"));
1021 * WBINVD should be set in fadt, for C3 state to be
1022 * supported on when bm_check is not required.
1024 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
1025 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1026 "Cache invalidation should work properly"
1027 " for C3 to be enabled on SMP systems\n"));
1030 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1034 * Otherwise we've met all of our C3 requirements.
1035 * Normalize the C3 latency to expidite policy. Enable
1036 * checking of bus mastering status (bm_check) so we can
1037 * use this in our C3 policy
1040 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1045 static int acpi_processor_power_verify(struct acpi_processor *pr)
1048 unsigned int working = 0;
1050 pr->power.timer_broadcast_on_state = INT_MAX;
1052 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1053 struct acpi_processor_cx *cx = &pr->power.states[i];
1061 acpi_processor_power_verify_c2(cx);
1063 acpi_timer_check_state(i, pr, cx);
1067 acpi_processor_power_verify_c3(pr, cx);
1069 acpi_timer_check_state(i, pr, cx);
1077 acpi_propagate_timer_broadcast(pr);
1082 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1088 /* NOTE: the idle thread may not be running while calling
1091 /* Zero initialize all the C-states info. */
1092 memset(pr->power.states, 0, sizeof(pr->power.states));
1094 result = acpi_processor_get_power_info_cst(pr);
1095 if (result == -ENODEV)
1096 result = acpi_processor_get_power_info_fadt(pr);
1101 acpi_processor_get_power_info_default(pr);
1103 pr->power.count = acpi_processor_power_verify(pr);
1106 * Set Default Policy
1107 * ------------------
1108 * Now that we know which states are supported, set the default
1109 * policy. Note that this policy can be changed dynamically
1110 * (e.g. encourage deeper sleeps to conserve battery life when
1113 result = acpi_processor_set_power_policy(pr);
1118 * if one state of type C2 or C3 is available, mark this
1119 * CPU as being "idle manageable"
1121 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1122 if (pr->power.states[i].valid) {
1123 pr->power.count = i;
1124 if (pr->power.states[i].type >= ACPI_STATE_C2)
1125 pr->flags.power = 1;
1132 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1144 if (!pr->flags.power_setup_done)
1147 /* Fall back to the default idle loop */
1148 pm_idle = pm_idle_save;
1149 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1151 pr->flags.power = 0;
1152 result = acpi_processor_get_power_info(pr);
1153 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1154 pm_idle = acpi_processor_idle;
1159 /* proc interface */
1161 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1163 struct acpi_processor *pr = seq->private;
1170 seq_printf(seq, "active state: C%zd\n"
1172 "bus master activity: %08x\n"
1173 "maximum allowed latency: %d usec\n",
1174 pr->power.state ? pr->power.state - pr->power.states : 0,
1175 max_cstate, (unsigned)pr->power.bm_activity,
1176 system_latency_constraint());
1178 seq_puts(seq, "states:\n");
1180 for (i = 1; i <= pr->power.count; i++) {
1181 seq_printf(seq, " %cC%d: ",
1182 (&pr->power.states[i] ==
1183 pr->power.state ? '*' : ' '), i);
1185 if (!pr->power.states[i].valid) {
1186 seq_puts(seq, "<not supported>\n");
1190 switch (pr->power.states[i].type) {
1192 seq_printf(seq, "type[C1] ");
1195 seq_printf(seq, "type[C2] ");
1198 seq_printf(seq, "type[C3] ");
1201 seq_printf(seq, "type[--] ");
1205 if (pr->power.states[i].promotion.state)
1206 seq_printf(seq, "promotion[C%zd] ",
1207 (pr->power.states[i].promotion.state -
1210 seq_puts(seq, "promotion[--] ");
1212 if (pr->power.states[i].demotion.state)
1213 seq_printf(seq, "demotion[C%zd] ",
1214 (pr->power.states[i].demotion.state -
1217 seq_puts(seq, "demotion[--] ");
1219 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1220 pr->power.states[i].latency,
1221 pr->power.states[i].usage,
1222 (unsigned long long)pr->power.states[i].time);
1229 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1231 return single_open(file, acpi_processor_power_seq_show,
1235 static const struct file_operations acpi_processor_power_fops = {
1236 .open = acpi_processor_power_open_fs,
1238 .llseek = seq_lseek,
1239 .release = single_release,
1243 static void smp_callback(void *v)
1245 /* we already woke the CPU up, nothing more to do */
1249 * This function gets called when a part of the kernel has a new latency
1250 * requirement. This means we need to get all processors out of their C-state,
1251 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1252 * wakes them all right up.
1254 static int acpi_processor_latency_notify(struct notifier_block *b,
1255 unsigned long l, void *v)
1257 smp_call_function(smp_callback, NULL, 0, 1);
1261 static struct notifier_block acpi_processor_latency_notifier = {
1262 .notifier_call = acpi_processor_latency_notify,
1266 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1267 struct acpi_device *device)
1269 acpi_status status = 0;
1270 static int first_run;
1271 struct proc_dir_entry *entry = NULL;
1276 dmi_check_system(processor_power_dmi_table);
1277 if (max_cstate < ACPI_C_STATES_MAX)
1279 "ACPI: processor limited to max C-state %d\n",
1283 register_latency_notifier(&acpi_processor_latency_notifier);
1290 if (acpi_gbl_FADT.cst_control && !nocst) {
1292 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1293 if (ACPI_FAILURE(status)) {
1294 ACPI_EXCEPTION((AE_INFO, status,
1295 "Notifying BIOS of _CST ability failed"));
1299 acpi_processor_get_power_info(pr);
1302 * Install the idle handler if processor power management is supported.
1303 * Note that we use previously set idle handler will be used on
1304 * platforms that only support C1.
1306 if ((pr->flags.power) && (!boot_option_idle_override)) {
1307 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1308 for (i = 1; i <= pr->power.count; i++)
1309 if (pr->power.states[i].valid)
1310 printk(" C%d[C%d]", i,
1311 pr->power.states[i].type);
1315 pm_idle_save = pm_idle;
1316 pm_idle = acpi_processor_idle;
1321 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1322 S_IRUGO, acpi_device_dir(device));
1326 entry->proc_fops = &acpi_processor_power_fops;
1327 entry->data = acpi_driver_data(device);
1328 entry->owner = THIS_MODULE;
1331 pr->flags.power_setup_done = 1;
1336 int acpi_processor_power_exit(struct acpi_processor *pr,
1337 struct acpi_device *device)
1340 pr->flags.power_setup_done = 0;
1342 if (acpi_device_dir(device))
1343 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1344 acpi_device_dir(device));
1346 /* Unregister the idle handler when processor #0 is removed. */
1348 pm_idle = pm_idle_save;
1351 * We are about to unload the current idle thread pm callback
1352 * (pm_idle), Wait for all processors to update cached/local
1353 * copies of pm_idle before proceeding.
1357 unregister_latency_notifier(&acpi_processor_latency_notifier);